DE102010038453A1 - Lötstellenkontrolle - Google Patents

Lötstellenkontrolle Download PDF

Info

Publication number
DE102010038453A1
DE102010038453A1 DE102010038453A DE102010038453A DE102010038453A1 DE 102010038453 A1 DE102010038453 A1 DE 102010038453A1 DE 102010038453 A DE102010038453 A DE 102010038453A DE 102010038453 A DE102010038453 A DE 102010038453A DE 102010038453 A1 DE102010038453 A1 DE 102010038453A1
Authority
DE
Germany
Prior art keywords
integrated circuit
resistance
contacting
sections
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE102010038453A
Other languages
German (de)
English (en)
Inventor
Eric Ochs
Holger Hoefer
Lutz Rauscher
Eckart Schellkes
Florian Grabmaier
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Priority to DE102010038453A priority Critical patent/DE102010038453A1/de
Priority to US13/156,208 priority patent/US8810252B2/en
Priority to JP2011163940A priority patent/JP5901170B2/ja
Publication of DE102010038453A1 publication Critical patent/DE102010038453A1/de
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0266Marks, test patterns or identification means
    • H05K1/0268Marks, test patterns or identification means for electrical inspection or testing
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65Shapes or dispositions of interconnections
    • H10W70/657Shapes or dispositions of interconnections on sidewalls or bottom surfaces of the package substrates, interposers or redistribution layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09663Divided layout, i.e. conductors divided in two or more parts
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3436Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
DE102010038453A 2010-07-27 2010-07-27 Lötstellenkontrolle Pending DE102010038453A1 (de)

Priority Applications (3)

Application Number Priority Date Filing Date Title
DE102010038453A DE102010038453A1 (de) 2010-07-27 2010-07-27 Lötstellenkontrolle
US13/156,208 US8810252B2 (en) 2010-07-27 2011-06-08 Solder joint inspection
JP2011163940A JP5901170B2 (ja) 2010-07-27 2011-07-27 集積回路および集積回路のコンタクト部とプリント基板の相応するコンタクト部との間の抵抗を求める方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE102010038453A DE102010038453A1 (de) 2010-07-27 2010-07-27 Lötstellenkontrolle

Publications (1)

Publication Number Publication Date
DE102010038453A1 true DE102010038453A1 (de) 2012-02-02

Family

ID=45471069

Family Applications (1)

Application Number Title Priority Date Filing Date
DE102010038453A Pending DE102010038453A1 (de) 2010-07-27 2010-07-27 Lötstellenkontrolle

Country Status (3)

Country Link
US (1) US8810252B2 (https=)
JP (1) JP5901170B2 (https=)
DE (1) DE102010038453A1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12498411B2 (en) 2020-10-01 2025-12-16 Endress+Hauser SE+Co. KG Electronic unit and method for testing at least one state of an electronic unit

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9635794B2 (en) 2012-02-20 2017-04-25 Trw Automotive U.S. Llc Method and apparatus for attachment of integrated circuits
US8957694B2 (en) * 2012-05-22 2015-02-17 Broadcom Corporation Wafer level package resistance monitor scheme
US9883582B2 (en) * 2015-11-20 2018-01-30 Hamilton Sundstrand Corporation Circuit boards and circuit board assemblies
WO2023209856A1 (ja) * 2022-04-27 2023-11-02 日立Astemo株式会社 車載制御装置
DE102024209901A1 (de) * 2024-10-10 2026-04-16 Robert Bosch Gesellschaft mit beschränkter Haftung Leistungsschaltereinheit

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01154546A (ja) * 1987-12-10 1989-06-16 Fujitsu Ltd 端子開放検出回路半導体装置
JP2977959B2 (ja) * 1991-07-12 1999-11-15 シチズン時計株式会社 半導体装置およびその測定方法
JP2825085B2 (ja) * 1996-08-29 1998-11-18 日本電気株式会社 半導体装置の実装構造、実装用基板および実装状態の検査方法
JP2004363146A (ja) * 2003-06-02 2004-12-24 Matsushita Electric Ind Co Ltd 回路基板に対する電子部品の接合品質評価用の検査チップとそれを用いた評価ツール及び評価方法
JP2005347469A (ja) * 2004-06-02 2005-12-15 Denso Corp 電子部品およびその半田付け検査システム
US20080218495A1 (en) * 2007-03-08 2008-09-11 Wintek Corporation Circuit capable of selectively operating in either an inspecting mode or a driving mode for a display
US8522051B2 (en) * 2007-05-07 2013-08-27 Infineon Technologies Ag Protection for circuit boards
JP5034781B2 (ja) * 2007-08-27 2012-09-26 富士通株式会社 半田バンプの高感度抵抗測定装置及び監視方法
JP2009065037A (ja) * 2007-09-07 2009-03-26 Yokogawa Electric Corp 半導体集積回路とその検査装置
JP5343555B2 (ja) * 2008-12-22 2013-11-13 富士通株式会社 半導体装置、及び、はんだ接合部破壊の検出方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12498411B2 (en) 2020-10-01 2025-12-16 Endress+Hauser SE+Co. KG Electronic unit and method for testing at least one state of an electronic unit

Also Published As

Publication number Publication date
JP5901170B2 (ja) 2016-04-06
US8810252B2 (en) 2014-08-19
US20120025863A1 (en) 2012-02-02
JP2012028786A (ja) 2012-02-09

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Legal Events

Date Code Title Description
R012 Request for examination validly filed
R016 Response to examination communication
R079 Amendment of ipc main class

Free format text: PREVIOUS MAIN CLASS: H01L0021600000

Ipc: H10W0070010000