JP5752660B2 - 半導体装置およびその製造方法 - Google Patents
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- 239000004065 semiconductor Substances 0.000 title claims description 49
- 238000004519 manufacturing process Methods 0.000 title claims description 20
- 238000005530 etching Methods 0.000 claims description 27
- 238000000034 method Methods 0.000 claims description 23
- 229910052710 silicon Inorganic materials 0.000 claims description 23
- 239000010703 silicon Substances 0.000 claims description 23
- 239000000463 material Substances 0.000 claims description 16
- 229910052751 metal Inorganic materials 0.000 claims description 11
- 239000002184 metal Substances 0.000 claims description 11
- 239000000758 substrate Substances 0.000 claims description 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 10
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 10
- 230000000149 penetrating effect Effects 0.000 claims description 7
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 7
- 229910052721 tungsten Inorganic materials 0.000 claims description 7
- 239000010937 tungsten Substances 0.000 claims description 7
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 claims description 4
- 229910052731 fluorine Inorganic materials 0.000 claims description 4
- 239000011737 fluorine Substances 0.000 claims description 4
- 150000002739 metals Chemical class 0.000 claims description 4
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 claims description 4
- 229910021342 tungsten silicide Inorganic materials 0.000 claims description 4
- WKBOTKDWSSQWDR-UHFFFAOYSA-N Bromine atom Chemical compound [Br] WKBOTKDWSSQWDR-UHFFFAOYSA-N 0.000 claims description 2
- GDTBXPJZTBHREO-UHFFFAOYSA-N bromine Substances BrBr GDTBXPJZTBHREO-UHFFFAOYSA-N 0.000 claims description 2
- 229910052794 bromium Inorganic materials 0.000 claims description 2
- 238000010030 laminating Methods 0.000 claims description 2
- 239000010408 film Substances 0.000 description 73
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 20
- 230000008569 process Effects 0.000 description 18
- 238000003860 storage Methods 0.000 description 12
- 238000001020 plasma etching Methods 0.000 description 7
- 239000012535 impurity Substances 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 230000006870 function Effects 0.000 description 4
- 239000012212 insulator Substances 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 3
- 229910052799 carbon Inorganic materials 0.000 description 3
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
- 239000000460 chlorine Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 229910052801 chlorine Inorganic materials 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 238000005036 potential barrier Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7827—Vertical transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66833—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a charge trapping gate insulator, e.g. MNOS transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
- H01L29/7926—Vertical transistors, i.e. transistors having source and drain not in the same horizontal plane
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
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- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Description
図1は、実施形態の半導体装置のメモリセルアレイを模式的に示す斜視図である。図1では、メモリホールMHの内壁に形成された絶縁膜以外の絶縁部材は、簡単のため、省略してある。図2は、図1のメモリセルアレイにおける1つのメモリストリングMSを模式的に示す断面図である。図3は、図1のメモリセルMCが設けられた部分を拡大して示す断面図である。
Claims (6)
- 半導体基板と、
前記半導体基板上に設けられたバックゲート層と、
前記バックゲート層上に設けられ、複数の絶縁層と複数の電極層とを交互に積層してなる積層体であって、前記複数の電極層のうち最も下層の電極層は金属を含み、前記複数の電極層のうち前記最も下層の電極層を除いた残りの電極層は前記金属を含まない前記積層体と、
前記積層体を貫通する一対の柱状の半導体層と、
前記一対の柱状の半導体層の下部を連結する、前記バックゲート層の表面に埋め込まれた半導体層とを具備してなり、
前記複数の絶縁層の材料はシリコン酸化物を含み、前記最も下層の電極層の材料はタングステンまたはタングステンシリサイドを含み、前記残りの電極層の材料はシリコンを含むことを特徴とする半導体装置。 - 半導体基板と、
前記半導体基板上に設けられたバックゲート層と、
前記バックゲート層上に設けられ、複数の絶縁層と複数の電極層とを交互に積層してなる積層体であって、前記複数の電極層のうち最も下層の電極層は金属を含み、前記複数の電極層のうち前記最も下層の電極層を除いた残りの電極層は前記金属を含まない前記積層体と、
前記積層体を貫通する一対の柱状の半導体層と、
前記一対の柱状の半導体層の下部を連結する、前記バックゲート層の表面に埋め込まれた半導体層と
を具備し、
前記複数の絶縁層のエッチングレートが前記最も下層の電極層のエッチングレートよりも高く、かつ、前記残りの電極層のエッチングレートが前記最も下層の電極層のエッチングレートよりも高くなるように、前記複数の絶縁層の材料、前記最も下層の電極層の材料および前記残りの電極層の材料が選択されていることを特徴とする半導体装置。 - 前記複数の絶縁層の材料はシリコン酸化物を含み、前記最も下層の電極層の材料はタングステンまたはタングステンシリサイドを含み、前記残りの電極層の材料はシリコンを含むことを特徴とする請求項2に記載の半導体装置。
- 半導体基板上にバックゲート層を形成する工程と、
前記バックゲート層の表面に凹部を形成する工程と、
前記凹部内を犠牲膜で埋め込む工程と、
前記バックゲート層上に、複数の絶縁層と複数の電極層とを交互に積層してなる積層体を形成する工程であって、前記複数の電極層のうち最も下層の電極層は金属を含み、前記複数の電極層のうち前記最も下層の電極層を除いた残りの電極層は前記金属を含まない前記工程と、
前記残りの電極層および前記複数の絶縁層のエッチングレートが、前記最も下層の電極層のエッチングレートよりも高くなるガスを用いて、前記最も下層の電極層をエッチングストッパとして、前記積層体をエッチングすることにより、前記積層体の途中の深さまで達する一対のホールを形成する工程と、
前記一対のホールよりも下の部分の前記積層体をエッチングすることにより、前記犠牲膜に達するように前記一対のホールを深くする工程と、
前記一対のホールを通じて前記犠牲膜を除去して、前記一対のホールおよび前記凹部を繋げる工程と、
前記一対のホール内に一対の柱状の半導体層を形成し、前記凹部内に前記一対の柱状の半導体層の下部を連結する半導体層を形成する工程と
を具備してなることを特徴とする半導体装置の製造方法。 - 前記積層体の途中の深さまで達する一対のホールを形成する工程は、前記複数の絶縁層および前記残りの電極層を同じガスを用いて一括してエッチングすることを含むことを特徴とする請求項4に記載の半導体装置の製造方法。
- 前記複数の絶縁層の材料がシリコン酸化物を含み、前記最も下層の電極層の材料がタングステンまたはタングステンシリサイドを含み、前記残りの電極層の材料がシリコンを含む場合、前記同じガスは、臭素を含むガスとフッ素を含むガスとの混合ガスであることを特徴とする請求項5に記載の半導体装置の製造方法。
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US13/926,307 US9318602B2 (en) | 2012-09-21 | 2013-06-25 | Semiconductor device and method for manufacturing semiconductor device |
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US10879261B2 (en) | 2018-09-20 | 2020-12-29 | Toshiba Memory Corporation | Semiconductor memory with stacked memory pillars |
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CN106463534B (zh) * | 2014-06-23 | 2020-12-11 | 英特尔公司 | 用于形成垂直晶体管架构的技术 |
CN115955842A (zh) | 2016-09-21 | 2023-04-11 | 铠侠股份有限公司 | 半导体装置 |
JP2018142654A (ja) * | 2017-02-28 | 2018-09-13 | 東芝メモリ株式会社 | 半導体装置及びその製造方法 |
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JPH07263415A (ja) * | 1994-03-18 | 1995-10-13 | Fujitsu Ltd | 半導体装置の製造方法 |
JPH09129757A (ja) * | 1995-10-27 | 1997-05-16 | Nkk Corp | 不揮発性半導体メモリ装置およびその製造方法 |
JPH10256503A (ja) * | 1997-03-14 | 1998-09-25 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
JP2010192646A (ja) * | 2009-02-18 | 2010-09-02 | Toshiba Corp | 半導体装置及びその製造方法 |
JP5380190B2 (ja) | 2009-07-21 | 2014-01-08 | 株式会社東芝 | 不揮発性半導体記憶装置及びその製造方法 |
JP2011049206A (ja) | 2009-08-25 | 2011-03-10 | Toshiba Corp | 半導体装置の製造方法及び半導体装置 |
JP2011108921A (ja) * | 2009-11-19 | 2011-06-02 | Toshiba Corp | 不揮発性半導体記憶装置及びその製造方法 |
JP2011165815A (ja) | 2010-02-08 | 2011-08-25 | Toshiba Corp | 不揮発性半導体記憶装置 |
JP2011187794A (ja) | 2010-03-10 | 2011-09-22 | Toshiba Corp | 半導体記憶装置及びその製造方法 |
JP5504053B2 (ja) * | 2010-05-27 | 2014-05-28 | 株式会社東芝 | 半導体装置及びその製造方法 |
US9000509B2 (en) * | 2010-05-31 | 2015-04-07 | Hynix Semiconductor Inc. | Three dimensional pipe gate nonvolatile memory device |
JP5431386B2 (ja) * | 2011-02-22 | 2014-03-05 | 株式会社東芝 | 半導体記憶装置 |
KR20130072516A (ko) * | 2011-12-22 | 2013-07-02 | 에스케이하이닉스 주식회사 | 반도체 소자 및 그 제조 방법 |
JP2013187294A (ja) * | 2012-03-07 | 2013-09-19 | Toshiba Corp | 半導体記憶装置 |
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US10879261B2 (en) | 2018-09-20 | 2020-12-29 | Toshiba Memory Corporation | Semiconductor memory with stacked memory pillars |
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