JP5711320B2 - 窒化物半導体素子及びその製造方法 - Google Patents
窒化物半導体素子及びその製造方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims description 69
- 238000004519 manufacturing process Methods 0.000 title claims description 24
- 150000004767 nitrides Chemical class 0.000 title description 15
- 239000002019 doping agent Substances 0.000 claims description 51
- 229910002704 AlGaN Inorganic materials 0.000 claims description 47
- 238000000034 method Methods 0.000 claims description 30
- 239000000758 substrate Substances 0.000 claims description 24
- 238000000231 atomic layer deposition Methods 0.000 claims description 11
- 239000013078 crystal Substances 0.000 claims description 11
- 229910052751 metal Inorganic materials 0.000 claims description 9
- 239000002184 metal Substances 0.000 claims description 9
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 9
- 238000005229 chemical vapour deposition Methods 0.000 claims description 8
- 230000007423 decrease Effects 0.000 claims description 6
- 238000001451 molecular beam epitaxy Methods 0.000 claims description 6
- 238000004544 sputter deposition Methods 0.000 claims description 5
- 150000004678 hydrides Chemical class 0.000 claims description 4
- 238000007740 vapor deposition Methods 0.000 claims description 4
- 238000013459 approach Methods 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 281
- 229910002601 GaN Inorganic materials 0.000 description 187
- 239000010408 film Substances 0.000 description 17
- 239000011229 interlayer Substances 0.000 description 13
- 239000000463 material Substances 0.000 description 10
- 239000010409 thin film Substances 0.000 description 10
- 230000007547 defect Effects 0.000 description 9
- 238000002248 hydride vapour-phase epitaxy Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 5
- 239000000203 mixture Substances 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 3
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 2
- 229910005191 Ga 2 O 3 Inorganic materials 0.000 description 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 230000014509 gene expression Effects 0.000 description 2
- 239000002994 raw material Substances 0.000 description 2
- 229910052594 sapphire Inorganic materials 0.000 description 2
- 239000010980 sapphire Substances 0.000 description 2
- 238000000927 vapour-phase epitaxy Methods 0.000 description 2
- XLOMVQKBTHCTTD-UHFFFAOYSA-N zinc oxide Inorganic materials [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- 238000004891 communication Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000000446 fuel Substances 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910003465 moissanite Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 230000005533 two-dimensional electron gas Effects 0.000 description 1
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Description
図6を参照すると、一般的なHFET10は、ドレイン電極16からソース電極15に流れる2DEG電流をショットキー(schottky)ゲート電極14によりスイッチングすることができる。
よって、HFETの漏れ電流を低減して降伏電圧を最大化する技術が必要である。
本発明の一態様において、前記FexNy層の厚さは、1nm〜20nmであってもよい。
本発明の一態様において、前記FexNy層は、複数であってもよい。
本発明の一態様において、前記複数のGaN層は、p型ドーパントがドーピングされたものであってもよい。
本発明の一態様において、前記p型ドーパントは、C、Mg及びFeの少なくとも1つであってもよい。
本発明の一態様において、前記最小のドーピング量は、1017/cm3であってもよい。
本発明の一態様において、前記FexNy層は、複数のFexNy結晶体が前記第1GaN層の積層方向と垂直に離隔して配置される島状に形成されたものであってもよい。
本発明の一態様において、前記FexNy層は、Feソース及びSi3H4ガスにより形成されてもよい。
また、結晶欠陥を最小限に抑えるためには、成長条件を最適化する方法があり、GaNの成長中にインターレイヤーを挿入する方法がある。
本明細書に開示された一実施形態による半導体素子は、第1GaN層と、前記第1GaN層上に形成されるAlGaN層と、前記AlGaN層上に形成される第2GaN層と、前記第2GaN層の一部領域上に形成されるソース電極、ドレイン電極及びゲート電極とを含み、前記第1GaN層は、複数のGaN層及び前記複数のGaN層間に形成されるFexNy層を含んでもよい。
ここで、第1GaN層110は、基板(図示せず)上に形成されてもよい。
第1GaN層110は、GaNからなり、0.1μm〜10μmの厚さを有するようにしてもよい。
本明細書に開示された第1実施形態は、前述した実施形態が含む構成又は段階の一部もしくは組み合わせで実現し、又は、実施形態の組み合わせで実現することができる。以下、本明細書に開示された第1実施形態をより明確にするために、重複する説明は省略する。
本明細書に開示された第1実施形態による半導体素子は、第1GaN層と、前記第1GaN層上に形成されるAlGaN層と、前記AlGaN層上に形成される第2GaN層と、前記第2GaN層の一部領域上に形成されるソース電極、ドレイン電極及びゲート電極とを含み、前記第1GaN層は、複数のGaN層及び前記複数のGaN層間に形成されるFexNy層を含んでもよい。
第1実施形態によれば、前記p型ドーパントのドーピング量(又はドーピング濃度)は、1017/cm3〜1019/cm3であってもよい。
また、第1実施形態によれば、前記p型ドーパントのドーピング量は、前記AlGaN層の下部から特定の深さまで最小のドーピング量以下となるようにしてもよい。
本明細書に開示された第2実施形態は、前述した実施形態が含む構成又は段階の一部もしくは組み合わせで実現し、又は、実施形態の組み合わせで実現することができる。以下、本明細書に開示された第2実施形態をより明確にするために、重複する説明は省略する。
本明細書に開示された第2実施形態による半導体素子は、第1GaN層と、前記第1GaN層上に形成されるAlGaN層と、前記AlGaN層上に形成される第2GaN層と、前記第2GaN層の一部領域上に形成されるソース電極、ドレイン電極及びゲート電極とを含み、前記第1GaN層は、複数のGaN層及び前記複数のGaN層間に形成されるFexNy層を含んでもよい。
図3に示すように、本明細書に開示された第2実施形態による半導体素子は、島状のFexNy層112a、112bを備えてもよい。
本明細書に開示された一実施形態による半導体素子の製造方法は、基板上に第1GaN層を形成する段階と、前記第1GaN層上にAlGaN層を形成する段階と、前記AlGaN層上に第2GaN層を形成する段階と、前記第2GaN層の一部領域上にソース電極、ドレイン電極及びゲート電極を形成する段階とを含み、前記第1GaN層は、FexNy層を介して互いに離隔するように積層された複数のGaN層を含んでもよい。
図4に示すように、本明細書に開示された一実施形態による半導体素子の製造方法は、次のような段階からなるようにしてもよい。
次に、前記AlGaN層上に第2GaN層を形成する(S130)。
次に、前記第2GaN層の一部領域上にソース電極、ドレイン電極及びゲート電極を形成する(S140)。
このようにして第1GaN層110を成長させた後、活性層であるAlGaN層120を成長させる(図5D)。
酸化膜層170は、表面漏れ電流を低減する役割を果たす。
110 第1GaN層
120 AlGaN層
130 第2GaN層
140 ゲート電極
150 ソース電極
160 ドレイン電極
170 酸化膜層
Claims (15)
- 第1GaN層と、
前記第1GaN層上に形成されるAlGaN層と、
前記AlGaN層上に形成される第2GaN層と、
前記第2GaN層の一部領域上に形成されるソース電極、ドレイン電極及びゲート電極とを含み、
前記第1GaN層は、複数のGaN層及び前記複数のGaN層間に形成されるFexNy層を含み、
前記Fe x N y 層が複数であり、
前記複数のGaN層が、前記複数のFe x N y 層のそれぞれを介して互いに離隔するように積層されたものである、半導体素子。 - 前記第1GaN層の厚さが0.1μm〜10μmである、請求項1に記載の半導体素子。
- 前記FexNy層の厚さが1nm〜20nmである、請求項1に記載の半導体素子。
- 前記FexNy層の数が2〜20である、請求項1に記載の半導体素子。
- 前記複数のGaN層は、p型ドーパントがドーピングされたものである、請求項1に記載の半導体素子。
- 前記p型ドーパントが、C、Mg及びFeの少なくとも1つである、請求項5に記載の半導体素子。
- 前記p型ドーパントのドーピング量が1017/cm3〜1019/cm3である、請求項5に記載の半導体素子。
- 前記p型ドーパントが、前記第1GaN層の積層方向への前記p型ドーパントのドーピング量を示すドーピングプロファイルに基づいてドーピングされるものである、請求項5に記載の半導体素子。
- 前記ドーピングプロファイルが、前記AlGaN層に近くなるほど前記p型ドーパントのドーピング量が特定の勾配で減少する形態のドーピングプロファイルである、請求項8に記載の半導体素子。
- 前記p型ドーパントのドーピング量が、前記AlGaN層の下部から特定の深さまで最小のドーピング量以下である、請求項5に記載の半導体素子。
- 前記特定の深さが2nm〜50nmである、請求項10に記載の半導体素子。
- 前記最小のドーピング量が1017/cm3である、請求項10に記載の半導体素子。
- 前記FexNy層は、複数のFexNy結晶体が前記第1GaN層の積層方向と垂直に離隔して配置される島状に形成されたものである、請求項1に記載の半導体素子。
- GaNを含まない基板上に第1GaN層を形成する段階と、
前記第1GaN層上にAlGaN層を形成する段階と、
前記AlGaN層上に第2GaN層を形成する段階と、
前記第2GaN層の一部領域上にソース電極、ドレイン電極及びゲート電極を形成する段階とを含み、
前記第1GaN層は、FexNy層を介して互いに離隔するように積層された複数のGaN層を含む、半導体素子の製造方法。 - 前記第1GaN層、前記AlGaN層及び前記第2GaN層が、有機金属気相成長法(MOCVD)、分子線エピタキシー法(MBE)、ハイドライド気相成長法(HVPE)、プラズマ化学気相成長法(PECVD)、スパッタリング及び原子層堆積法(ALD)の少なくとも1つにより形成される、請求項14に記載の半導体素子の製造方法。
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