JP5693879B2 - Icチップの基板が薄くなった箇所を検出する装置 - Google Patents
Icチップの基板が薄くなった箇所を検出する装置 Download PDFInfo
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- JP5693879B2 JP5693879B2 JP2010134365A JP2010134365A JP5693879B2 JP 5693879 B2 JP5693879 B2 JP 5693879B2 JP 2010134365 A JP2010134365 A JP 2010134365A JP 2010134365 A JP2010134365 A JP 2010134365A JP 5693879 B2 JP5693879 B2 JP 5693879B2
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- 239000000758 substrate Substances 0.000 title claims description 90
- 239000010410 layer Substances 0.000 claims description 24
- 239000013078 crystal Substances 0.000 claims description 12
- 238000001514 detection method Methods 0.000 claims description 11
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 9
- 229920005591 polysilicon Polymers 0.000 claims description 9
- 150000004767 nitrides Chemical class 0.000 claims description 7
- 239000011241 protective layer Substances 0.000 claims description 5
- 230000008859 change Effects 0.000 description 13
- 239000004065 semiconductor Substances 0.000 description 9
- 230000000694 effects Effects 0.000 description 4
- 230000004044 response Effects 0.000 description 4
- 230000009471 action Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 238000004364 calculation method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 230000006378 damage Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000011016 integrity testing Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
- G01L9/00—Measuring steady of quasi-steady pressure of fluid or fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means
- G01L9/0041—Transmitting or indicating the displacement of flexible diaphragms
- G01L9/0042—Constructional details associated with semiconductive diaphragm sensors, e.g. etching, or constructional details of non-semiconductive diaphragms
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
- G06K19/07309—Means for preventing undesired reading or writing from or onto record carriers
- G06K19/07363—Means for preventing undesired reading or writing from or onto record carriers by preventing analysis of the circuit, e.g. dynamic or static power analysis or current analysis
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
- G06K19/07309—Means for preventing undesired reading or writing from or onto record carriers
- G06K19/07372—Means for preventing undesired reading or writing from or onto record carriers by detecting tampering with the circuit
- G06K19/07381—Means for preventing undesired reading or writing from or onto record carriers by detecting tampering with the circuit with deactivation or otherwise incapacitation of at least a part of the circuit upon detected tampering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/57—Protection from inspection, reverse engineering or tampering
- H01L23/576—Protection from inspection, reverse engineering or tampering using active circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- General Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Security & Cryptography (AREA)
- Theoretical Computer Science (AREA)
- Automation & Control Theory (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Analytical Chemistry (AREA)
- Semiconductor Integrated Circuits (AREA)
Description
3 支持基板
5 活性層
7 絶縁層
9 接続層
11 入出力チップ端子
M1〜M3 接続層
21 抵抗領域
23 軽度にドープされたP型半導体基板の領域
25 絶縁領域
27 伝導パッド
31,33,35,37 抵抗
41,43,45,47 抵抗
51,53,55,57 抵抗
61 ポリシリコン層
63 窒化物層
71,73,75,77 抵抗
Claims (4)
- 基板の活性領域に、ホイートストン・ブリッジとして接続された、棒形状の分散された複数の抵抗を備え、
前記ブリッジの第1の対向する抵抗の組は、第1の方向に向いており、
前記ブリッジの第2の対向する抵抗の組は、第2の方向に向いており、
前記第1及び前記第2の方向は、前記基板が薄くなった箇所が前記ブリッジの不均衡値を変化させる方向であり、
前記基板の主表面は、前記基板の結晶構造の面[001]であり、
前記分散された複数の抵抗は、P型の基板領域に形成されており、
前記第1及び前記第2の方向は、前記基板の結晶構造の方向(100)及び方向(110)のそれぞれに対応しており、
前記第2の対向する抵抗の組のそれぞれは、ポリシリコン層で覆われた絶縁領域により囲まれていて、窒化物の保護層で覆われている
ICチップの基板が薄くなった箇所を検出する装置。 - 基板の活性領域に、ホイートストン・ブリッジとして接続された、棒形状の分散された複数の抵抗を備え、
前記ブリッジの第1の対向する抵抗の組は、第1の方向に向いており、
前記ブリッジの第2の対向する抵抗の組は、第2の方向に向いており、
前記第1及び前記第2の方向は、前記基板が薄くなった箇所が前記ブリッジの不均衡値を変化させる方向であり、
前記基板の主表面は、前記基板の結晶構造の面[001]であり、
前記分散された複数の抵抗は、N型の基板領域に形成されており、
前記第1及び前記第2の方向は、前記基板の結晶構造の方向(100)及び方向(110)のそれぞれに対応しており、
前記第1の対向する抵抗の組のそれぞれは、ポリシリコン層で覆われた絶縁領域により囲まれていて、窒化物の保護層で覆われている
ICチップの基板が薄くなった箇所を検出する装置。 - 請求項1または2に記載のICチップの基板が薄くなった箇所を検出する装置を少なくとも一つ備えるとともに、
前記少なくとも一つの装置の不均衡を測定する手段を備える
ICチップの基板が薄くなった箇所を検出する回路。 - 少なくとも一つの比較器が、前記少なくとも一つの比較器の出力値に基づく前記検出回路の出力状態である前記少なくとも一つの装置の不均衡値と、閾値とを比較する
請求項3に記載のICチップの基板が薄くなった箇所を検出する回路。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0953968 | 2009-06-15 | ||
FR0953968A FR2946775A1 (fr) | 2009-06-15 | 2009-06-15 | Dispositif de detection d'amincissement du substrat d'une puce de circuit integre |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2010287894A JP2010287894A (ja) | 2010-12-24 |
JP5693879B2 true JP5693879B2 (ja) | 2015-04-01 |
Family
ID=41510993
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2010134365A Active JP5693879B2 (ja) | 2009-06-15 | 2010-06-11 | Icチップの基板が薄くなった箇所を検出する装置 |
Country Status (5)
Country | Link |
---|---|
US (2) | US8618821B2 (ja) |
EP (1) | EP2267772B1 (ja) |
JP (1) | JP5693879B2 (ja) |
CN (1) | CN101924097B (ja) |
FR (1) | FR2946775A1 (ja) |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
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FR2950969B1 (fr) * | 2009-10-02 | 2011-12-09 | St Microelectronics Rousset | Dispositif de detection de variations de temperature dans une puce |
CH704694A1 (de) * | 2011-03-25 | 2012-09-28 | Melexis Tessenderlo Nv | Stresssensor zur Erfassung mechanischer Spannungen in einem Halbleiterchip und stresskompensierter Hallsensor. |
FR2980303A1 (fr) * | 2011-09-19 | 2013-03-22 | St Microelectronics Rousset | Detection d'une attaque laser en face arriere d'un dispositif electronique, et support semiconducteur correspondant |
FR2986356B1 (fr) * | 2012-01-27 | 2014-02-28 | St Microelectronics Rousset | Dispositif de protection d'un circuit integre contre des attaques en face arriere |
FR2998419B1 (fr) | 2012-11-21 | 2015-01-16 | St Microelectronics Rousset | Protection d'un circuit integre contre des attaques |
CN104218026B (zh) * | 2013-06-05 | 2017-05-31 | 中芯国际集成电路制造(上海)有限公司 | 半导体检测结构及检测方法 |
JP2015175833A (ja) * | 2014-03-18 | 2015-10-05 | セイコーエプソン株式会社 | 物理量センサー、高度計、電子機器および移動体 |
EP3188231B1 (en) | 2015-12-29 | 2023-01-04 | Secure-IC SAS | System and method for protecting an integrated circuit (ic) device |
FR3048103B1 (fr) | 2016-02-22 | 2018-03-23 | Stmicroelectronics (Rousset) Sas | Procede de detection d'un amincissement du substrat semi-conducteur d'un circuit integre depuis sa face arriere et circuit integre correspondant |
US10107873B2 (en) * | 2016-03-10 | 2018-10-23 | Allegro Microsystems, Llc | Electronic circuit for compensating a sensitivity drift of a hall effect element due to stress |
GB201607589D0 (en) * | 2016-04-29 | 2016-06-15 | Nagravision Sa | Integrated circuit device |
US10162017B2 (en) | 2016-07-12 | 2018-12-25 | Allegro Microsystems, Llc | Systems and methods for reducing high order hall plate sensitivity temperature coefficients |
US10250258B2 (en) | 2016-09-28 | 2019-04-02 | Nxp B.V. | Device and method for detecting semiconductor substrate thickness |
CN106503780B (zh) * | 2016-10-31 | 2019-05-14 | 天津大学 | 用于芯片顶层金属防护层的完整性检测方法及装置 |
US9754901B1 (en) | 2016-11-21 | 2017-09-05 | Cisco Technology, Inc. | Bulk thinning detector |
CN108257941B (zh) * | 2016-12-28 | 2020-05-12 | 无锡华润上华科技有限公司 | 半导体器件的测试结构和测试方法 |
FR3063385B1 (fr) * | 2017-02-28 | 2019-04-26 | Stmicroelectronics (Rousset) Sas | Circuit integre avec detection d'amincissement par la face arriere et condensateurs de decouplage |
WO2018162805A1 (fr) | 2017-03-09 | 2018-09-13 | Stmicroelectronics (Rousset) Sas | Puce electronique |
US10520559B2 (en) | 2017-08-14 | 2019-12-31 | Allegro Microsystems, Llc | Arrangements for Hall effect elements and vertical epi resistors upon a substrate |
FR3072211B1 (fr) * | 2017-10-11 | 2021-12-10 | St Microelectronics Rousset | Procede de detection d'une injection de fautes et d'un amincissement du substrat dans un circuit integre, et circuit integre associe |
FR3077678B1 (fr) | 2018-02-07 | 2022-10-21 | St Microelectronics Rousset | Procede de detection d'une atteinte a l'integrite d'un substrat semi-conducteur d'un circuit integre depuis sa face arriere, et dispositif correspondant |
US11610846B2 (en) * | 2019-04-12 | 2023-03-21 | Adeia Semiconductor Bonding Technologies Inc. | Protective elements for bonded structures including an obstructive element |
US11373963B2 (en) | 2019-04-12 | 2022-06-28 | Invensas Bonding Technologies, Inc. | Protective elements for bonded structures |
US11205625B2 (en) | 2019-04-12 | 2021-12-21 | Invensas Bonding Technologies, Inc. | Wafer-level bonding of obstructive elements |
US11385278B2 (en) | 2019-05-23 | 2022-07-12 | Invensas Bonding Technologies, Inc. | Security circuitry for bonded structures |
CN112320754B (zh) * | 2020-10-28 | 2023-09-29 | 东南大学 | 一种半导体导电薄膜线宽的在线测试结构及方法 |
CN113267118B (zh) * | 2021-06-23 | 2022-05-17 | 东南大学 | 一种半导体导电薄膜厚度在线测试结构及其测试方法 |
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-
2009
- 2009-06-15 FR FR0953968A patent/FR2946775A1/fr not_active Withdrawn
-
2010
- 2010-05-21 EP EP10163673.6A patent/EP2267772B1/fr active Active
- 2010-06-09 CN CN201010199203.XA patent/CN101924097B/zh active Active
- 2010-06-10 US US12/797,897 patent/US8618821B2/en active Active
- 2010-06-11 JP JP2010134365A patent/JP5693879B2/ja active Active
-
2013
- 2013-11-18 US US14/082,818 patent/US9121896B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
EP2267772B1 (fr) | 2015-07-29 |
US20100315108A1 (en) | 2010-12-16 |
CN101924097B (zh) | 2015-02-04 |
US8618821B2 (en) | 2013-12-31 |
FR2946775A1 (fr) | 2010-12-17 |
EP2267772A1 (fr) | 2010-12-29 |
US9121896B2 (en) | 2015-09-01 |
US20140070829A1 (en) | 2014-03-13 |
JP2010287894A (ja) | 2010-12-24 |
CN101924097A (zh) | 2010-12-22 |
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R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |