FR3048103B1 - Procede de detection d'un amincissement du substrat semi-conducteur d'un circuit integre depuis sa face arriere et circuit integre correspondant - Google Patents

Procede de detection d'un amincissement du substrat semi-conducteur d'un circuit integre depuis sa face arriere et circuit integre correspondant Download PDF

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Publication number
FR3048103B1
FR3048103B1 FR1651424A FR1651424A FR3048103B1 FR 3048103 B1 FR3048103 B1 FR 3048103B1 FR 1651424 A FR1651424 A FR 1651424A FR 1651424 A FR1651424 A FR 1651424A FR 3048103 B1 FR3048103 B1 FR 3048103B1
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France
Prior art keywords
integrated circuit
slimming
detecting
semiconductor substrate
back side
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Active
Application number
FR1651424A
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English (en)
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FR3048103A1 (fr
Inventor
Pascal FORNARA
Christian Rivero
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STMicroelectronics Rousset SAS
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STMicroelectronics Rousset SAS
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Priority to FR1651424A priority Critical patent/FR3048103B1/fr
Priority to CN201610579779.6A priority patent/CN107104062B/zh
Priority to CN201620774874.7U priority patent/CN205828352U/zh
Priority to US15/218,261 priority patent/US9916902B2/en
Priority to DE102016116228.0A priority patent/DE102016116228A1/de
Publication of FR3048103A1 publication Critical patent/FR3048103A1/fr
Priority to US15/886,243 priority patent/US10580498B2/en
Application granted granted Critical
Publication of FR3048103B1 publication Critical patent/FR3048103B1/fr
Priority to US16/747,995 priority patent/US10878918B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/22—Safety or protection circuits preventing unauthorised or accidental access to memory cells
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/86—Secure or tamper-resistant housings
    • G06F21/87—Secure or tamper-resistant housings by means of encapsulation, e.g. for integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823475—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type interconnection or wiring or contact manufacturing related aspects
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823481—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823892—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the wells or tubs, e.g. twin tubs, high energy well implants, buried implanted layers for lateral isolation [BILLI]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/57—Protection from inspection, reverse engineering or tampering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/57—Protection from inspection, reverse engineering or tampering
    • H01L23/576—Protection from inspection, reverse engineering or tampering using active circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
    • H01L29/7846—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being located in the lateral device isolation region, e.g. STI
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Security & Cryptography (AREA)
  • Automation & Control Theory (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Memories (AREA)
FR1651424A 2016-02-22 2016-02-22 Procede de detection d'un amincissement du substrat semi-conducteur d'un circuit integre depuis sa face arriere et circuit integre correspondant Active FR3048103B1 (fr)

Priority Applications (7)

Application Number Priority Date Filing Date Title
FR1651424A FR3048103B1 (fr) 2016-02-22 2016-02-22 Procede de detection d'un amincissement du substrat semi-conducteur d'un circuit integre depuis sa face arriere et circuit integre correspondant
CN201610579779.6A CN107104062B (zh) 2016-02-22 2016-07-21 用于从其背面检测集成电路的半导体衬底的薄化的方法和对应的集成电路
CN201620774874.7U CN205828352U (zh) 2016-02-22 2016-07-21 集成电路
US15/218,261 US9916902B2 (en) 2016-02-22 2016-07-25 Method for detecting a thinning of the semiconductor substrate of an integrated circuit from its back face and corresponding integrated circuit
DE102016116228.0A DE102016116228A1 (de) 2016-02-22 2016-08-31 Verfahren zur Erkennung einer Verdünnung des Halbleitersubstrats einer integrierten Schaltung von ihrer Rückseite aus und entsprechende integrierte Schaltung
US15/886,243 US10580498B2 (en) 2016-02-22 2018-02-01 Method for detecting a thinning of the semiconductor substrate of an integrated circuit from its back face and corresponding integrated circuit
US16/747,995 US10878918B2 (en) 2016-02-22 2020-01-21 Method for detecting a thinning of the semiconductor substrate of an integrated circuit from its back face and corresponding integrated circuit

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1651424 2016-02-22
FR1651424A FR3048103B1 (fr) 2016-02-22 2016-02-22 Procede de detection d'un amincissement du substrat semi-conducteur d'un circuit integre depuis sa face arriere et circuit integre correspondant

Publications (2)

Publication Number Publication Date
FR3048103A1 FR3048103A1 (fr) 2017-08-25
FR3048103B1 true FR3048103B1 (fr) 2018-03-23

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FR1651424A Active FR3048103B1 (fr) 2016-02-22 2016-02-22 Procede de detection d'un amincissement du substrat semi-conducteur d'un circuit integre depuis sa face arriere et circuit integre correspondant

Country Status (4)

Country Link
US (3) US9916902B2 (fr)
CN (2) CN205828352U (fr)
DE (1) DE102016116228A1 (fr)
FR (1) FR3048103B1 (fr)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3048103B1 (fr) 2016-02-22 2018-03-23 Stmicroelectronics (Rousset) Sas Procede de detection d'un amincissement du substrat semi-conducteur d'un circuit integre depuis sa face arriere et circuit integre correspondant
FR3063385B1 (fr) 2017-02-28 2019-04-26 Stmicroelectronics (Rousset) Sas Circuit integre avec detection d'amincissement par la face arriere et condensateurs de decouplage
FR3069954B1 (fr) * 2017-08-01 2020-02-07 Stmicroelectronics (Rousset) Sas Procede de detection d'un amincissement du substrat d'un circuit integre par sa face arriere, et circuit integre associe
FR3077678B1 (fr) 2018-02-07 2022-10-21 St Microelectronics Rousset Procede de detection d'une atteinte a l'integrite d'un substrat semi-conducteur d'un circuit integre depuis sa face arriere, et dispositif correspondant
FR3096175B1 (fr) * 2019-05-13 2021-05-07 St Microelectronics Rousset Procédé de détection d’une atteinte éventuelle à l’intégrité d’un substrat semi-conducteur d’un circuit intégré depuis sa face arrière, et circuit intégré correspondant
FR3115631B1 (fr) * 2020-10-23 2022-11-04 St Microelectronics Crolles 2 Sas Composant semiconducteur de circuit intégré

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4600707B2 (ja) * 2000-08-31 2010-12-15 信越半導体株式会社 半導体シリコン基板の抵抗率測定方法、半導体シリコン基板の導電型判定方法、及び半導体シリコン基板の製造方法
DE10140045B4 (de) * 2001-08-16 2006-05-04 Infineon Technologies Ag IC-Chip mit Schutzstruktur
KR100669644B1 (ko) * 2003-08-02 2007-01-15 동부일렉트로닉스 주식회사 화학기계적연마 장치 및 방법
CA2598307C (fr) * 2005-02-26 2014-12-30 Basf Plant Science Gmbh Cassettes d'expression destinees a une expression preferentielle de semences chez des plantes
JP2008010474A (ja) * 2006-06-27 2008-01-17 Canon Inc 記録ヘッド及び該記録ヘッドを用いた記録装置
TW200842318A (en) * 2007-04-24 2008-11-01 Nanya Technology Corp Method for measuring thin film thickness
CN101772775B (zh) 2007-08-02 2013-07-10 Nxp股份有限公司 抗篡改半导体器件以及制造该抗篡改半导体器件的方法
FR2946775A1 (fr) * 2009-06-15 2010-12-17 St Microelectronics Rousset Dispositif de detection d'amincissement du substrat d'une puce de circuit integre
JP5434360B2 (ja) 2009-08-20 2014-03-05 ソニー株式会社 半導体装置及びその製造方法
FR2986356B1 (fr) * 2012-01-27 2014-02-28 St Microelectronics Rousset Dispositif de protection d'un circuit integre contre des attaques en face arriere
CN105845544B (zh) * 2015-01-14 2021-02-19 中芯国际集成电路制造(上海)有限公司 一种半导体器件的制造方法和电子装置
FR3048103B1 (fr) * 2016-02-22 2018-03-23 Stmicroelectronics (Rousset) Sas Procede de detection d'un amincissement du substrat semi-conducteur d'un circuit integre depuis sa face arriere et circuit integre correspondant

Also Published As

Publication number Publication date
CN205828352U (zh) 2016-12-21
US20180158530A1 (en) 2018-06-07
US20200160916A1 (en) 2020-05-21
US20170243652A1 (en) 2017-08-24
US9916902B2 (en) 2018-03-13
US10580498B2 (en) 2020-03-03
FR3048103A1 (fr) 2017-08-25
CN107104062B (zh) 2021-04-06
US10878918B2 (en) 2020-12-29
CN107104062A (zh) 2017-08-29
DE102016116228A1 (de) 2017-08-24

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