JP5642628B2 - 基板反り除去装置、基板反り除去方法及び記憶媒体 - Google Patents

基板反り除去装置、基板反り除去方法及び記憶媒体 Download PDF

Info

Publication number
JP5642628B2
JP5642628B2 JP2011119528A JP2011119528A JP5642628B2 JP 5642628 B2 JP5642628 B2 JP 5642628B2 JP 2011119528 A JP2011119528 A JP 2011119528A JP 2011119528 A JP2011119528 A JP 2011119528A JP 5642628 B2 JP5642628 B2 JP 5642628B2
Authority
JP
Japan
Prior art keywords
substrate
thin film
pattern
warp
processing liquid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2011119528A
Other languages
English (en)
Japanese (ja)
Other versions
JP2012248695A (ja
JP2012248695A5 (enExample
Inventor
豊 久 ▲鶴▼田
豊 久 ▲鶴▼田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Priority to JP2011119528A priority Critical patent/JP5642628B2/ja
Priority to US13/479,673 priority patent/US8801891B2/en
Priority to KR1020120055393A priority patent/KR101591478B1/ko
Publication of JP2012248695A publication Critical patent/JP2012248695A/ja
Publication of JP2012248695A5 publication Critical patent/JP2012248695A5/ja
Application granted granted Critical
Publication of JP5642628B2 publication Critical patent/JP5642628B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B38/00—Ancillary operations in connection with laminating processes
    • B32B38/10—Removing layers, or parts of layers, mechanically or chemically
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B41/00—Arrangements for controlling or monitoring lamination processes; Safety arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67288—Monitoring of warpage, curvature, damage, defects or the like
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68735—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by edge profile or support profile
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/6875—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a plurality of individual support members, e.g. support posts or protrusions
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2457/00—Electrical equipment
    • B32B2457/20—Displays, e.g. liquid crystal displays, plasma displays
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/11—Methods of delaminating, per se; i.e., separating at bonding face
    • Y10T156/1105—Delaminating process responsive to feed or shape at delamination
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/19—Delaminating means
    • Y10T156/1906—Delaminating means responsive to feed or shape at delamination

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Weting (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
JP2011119528A 2011-05-27 2011-05-27 基板反り除去装置、基板反り除去方法及び記憶媒体 Active JP5642628B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2011119528A JP5642628B2 (ja) 2011-05-27 2011-05-27 基板反り除去装置、基板反り除去方法及び記憶媒体
US13/479,673 US8801891B2 (en) 2011-05-27 2012-05-24 Substrate warpage removal apparatus and substrate processing apparatus
KR1020120055393A KR101591478B1 (ko) 2011-05-27 2012-05-24 기판 휨 제거 장치, 기판 휨 제거 방법 및 기억 매체

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011119528A JP5642628B2 (ja) 2011-05-27 2011-05-27 基板反り除去装置、基板反り除去方法及び記憶媒体

Publications (3)

Publication Number Publication Date
JP2012248695A JP2012248695A (ja) 2012-12-13
JP2012248695A5 JP2012248695A5 (enExample) 2013-08-01
JP5642628B2 true JP5642628B2 (ja) 2014-12-17

Family

ID=47219434

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011119528A Active JP5642628B2 (ja) 2011-05-27 2011-05-27 基板反り除去装置、基板反り除去方法及び記憶媒体

Country Status (3)

Country Link
US (1) US8801891B2 (enExample)
JP (1) JP5642628B2 (enExample)
KR (1) KR101591478B1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10804221B2 (en) 2018-09-14 2020-10-13 Toshiba Memory Corporation Substrate treatment apparatus, method of manufacturing semiconductor device and workpiece substrate

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20120047628A (ko) * 2010-11-04 2012-05-14 삼성전기주식회사 레지스트 잉크 인쇄 장치
JP6186984B2 (ja) * 2013-07-25 2017-08-30 三菱電機株式会社 半導体装置の製造方法
JP2015060852A (ja) * 2013-09-17 2015-03-30 株式会社東芝 半導体装置の製造方法及び製造装置
JP6396756B2 (ja) * 2013-11-28 2018-09-26 京セラ株式会社 複合体およびその製造方法ならびに複合基板の製造方法
US9397051B2 (en) 2013-12-03 2016-07-19 Invensas Corporation Warpage reduction in structures with electrical circuitry
KR102396000B1 (ko) * 2015-09-24 2022-05-10 삼성전자주식회사 메모리 모듈 및 이를 갖는 솔리드 스테이트 드라이브
USD811457S1 (en) * 2015-11-02 2018-02-27 Hirata Corporation Substrate conveyance arm
US9978582B2 (en) * 2015-12-16 2018-05-22 Ostendo Technologies, Inc. Methods for improving wafer planarity and bonded wafer assemblies made from the methods
JP6444909B2 (ja) * 2016-02-22 2018-12-26 東京エレクトロン株式会社 基板処理方法、基板処理装置及びコンピュータ読み取り可能な記録媒体
JP6761271B2 (ja) * 2016-04-05 2020-09-23 キヤノン株式会社 処理装置及び物品の製造方法
JP7164289B2 (ja) * 2016-09-05 2022-11-01 東京エレクトロン株式会社 半導体プロセッシング中のオーバレイを制御するための湾曲を制御する応力の位置特定チューニング
JP6789187B2 (ja) * 2017-07-07 2020-11-25 東京エレクトロン株式会社 基板反り検出装置及び基板反り検出方法、並びにこれらを用いた基板処理装置及び基板処理方法
EP3457109B1 (en) * 2017-07-18 2021-09-01 Ias Inc. Nozzle for substrate analysis and substrate analysis method
JP7001400B2 (ja) * 2017-09-11 2022-01-19 東京エレクトロン株式会社 基板処理装置
JP7273660B2 (ja) * 2019-08-30 2023-05-15 キオクシア株式会社 半導体製造装置、および半導体装置の製造方法
WO2024215502A1 (en) * 2023-04-10 2024-10-17 Lam Research Corporation Bow compensation of semiconductor substrate using plasma jet

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63254733A (ja) * 1987-04-13 1988-10-21 Nec Corp 半導体装置の製造装置
US6743722B2 (en) * 2002-01-29 2004-06-01 Strasbaugh Method of spin etching wafers with an alkali solution
JP4232605B2 (ja) 2003-10-30 2009-03-04 住友電気工業株式会社 窒化物半導体基板の製造方法と窒化物半導体基板
DE102004054566B4 (de) * 2004-11-11 2008-04-30 Siltronic Ag Verfahren und Vorrichtung zum Einebnen einer Halbleiterscheibe sowie Halbleiterscheibe mit verbesserter Ebenheit
JP4781901B2 (ja) * 2006-05-08 2011-09-28 東京エレクトロン株式会社 熱処理方法，プログラム及び熱処理装置
JP4291343B2 (ja) * 2006-08-23 2009-07-08 エルピーダメモリ株式会社 半導体装置の製造方法
JP4372178B2 (ja) * 2007-04-27 2009-11-25 株式会社東芝 光反射型マスクと光反射型マスクの作製方法及び半導体装置の製造方法
JP5072082B2 (ja) * 2007-09-07 2012-11-14 株式会社アルバック ドライエッチング方法
US8073316B2 (en) * 2008-01-31 2011-12-06 Kabushiki Kaisha Toshiba Oven for semiconductor wafer
JP4898753B2 (ja) * 2008-08-26 2012-03-21 ヤマハ発動機株式会社 部品実装システム、部品実装方法、基板貼付状態検出装置、動作条件データ作成装置、基板貼付装置、部品搭載装置および検査装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10804221B2 (en) 2018-09-14 2020-10-13 Toshiba Memory Corporation Substrate treatment apparatus, method of manufacturing semiconductor device and workpiece substrate

Also Published As

Publication number Publication date
KR101591478B1 (ko) 2016-02-03
US8801891B2 (en) 2014-08-12
JP2012248695A (ja) 2012-12-13
KR20120132386A (ko) 2012-12-05
US20120301832A1 (en) 2012-11-29

Similar Documents

Publication Publication Date Title
JP5642628B2 (ja) 基板反り除去装置、基板反り除去方法及び記憶媒体
JP5681560B2 (ja) 基板乾燥方法及び基板処理装置
JP5443070B2 (ja) インプリントシステム
TWI464823B (zh) Liquid treatment device and liquid treatment method
JP2012248695A5 (enExample)
JP5616205B2 (ja) 基板処理システム、基板処理方法、プログラム及びコンピュータ記憶媒体
US7878213B2 (en) Substrate processing apparatus
TWI656570B (zh) Substrate liquid processing device, substrate liquid processing method, and memory medium
JP4118659B2 (ja) 基板用トレイ
US8342761B2 (en) Coating/developing apparatus and coating/developing method
JP5478586B2 (ja) 洗浄装置、剥離システム、洗浄方法、プログラム及びコンピュータ記憶媒体
TW202220094A (zh) 基板處理裝置、基板處理方法及記錄媒體
TWI887041B (zh) 用於晶圓處理的化學機械研磨系統
JP6325067B2 (ja) 基板乾燥方法及び基板処理装置
JP6017922B2 (ja) 基板乾燥方法、液処理システムおよび記憶媒体
JP7001400B2 (ja) 基板処理装置
JP7052280B2 (ja) 基板処理装置、基板処理方法及び記憶媒体
JP6356207B2 (ja) 基板乾燥方法及び基板処理装置
JP2015092619A (ja) 基板乾燥方法及び基板処理装置
TW201919776A (zh) 基板處理裝置、基板處理方法及記憶媒體
JP4941570B2 (ja) 液処理装置、液処理方法及び記憶媒体
JP6888393B2 (ja) エッチング装置、エッチング方法及び記憶媒体
JP2011104910A (ja) テンプレート処理方法、プログラム、コンピュータ記憶媒体、テンプレート処理装置及びインプリントシステム
TWI819538B (zh) 基板處理設備及基板處理方法
JP2011035186A (ja) 塗布処理装置、塗布処理方法、プログラム及びコンピュータ記憶媒体

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20130614

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20130614

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20140220

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20140225

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20140324

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20141003

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20141029

R150 Certificate of patent or registration of utility model

Ref document number: 5642628

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250