JP5585080B2 - 電極構造及びその製造方法、回路基板、半導体モジュール - Google Patents
電極構造及びその製造方法、回路基板、半導体モジュール Download PDFInfo
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- JP5585080B2 JP5585080B2 JP2009544701A JP2009544701A JP5585080B2 JP 5585080 B2 JP5585080 B2 JP 5585080B2 JP 2009544701 A JP2009544701 A JP 2009544701A JP 2009544701 A JP2009544701 A JP 2009544701A JP 5585080 B2 JP5585080 B2 JP 5585080B2
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Description
本発明の電極構造は、金属回路板上に、ニッケル(Ni)層、リン(P)が添加されたパラジウム(Pd)層、金(Au)層が順次積層されて形成された被覆層が形成された電極構造であって、前記Au層は置換型めっきにより形成され、前記Pd層における平均のP濃度は2.6質量%を越え6.0質量%以下の範囲であり、前記Pd層における前記Au層と接する側におけるP濃度は、前記Pd層における前記Ni層と接する側におけるP濃度よりも1質量%以上高いことを特徴とする。
本発明の電極構造において、前記Pd層はアモルファス構造であることを特徴とする。
本発明の電極構造において、前記Ni層には、Pが添加されていることを特徴とする。
本発明の電極構造において、前記金属回路板は銅又は銅合金で形成されることを特徴とする。
本発明の電極構造において、前記Pd層の厚さは0.05〜0.2μmの範囲であることを特徴とする。
本発明の電極構造において、前記Au層の厚さは0.05〜0.2μmの範囲であることを特徴とする。
本発明の電極構造の製造方法は、前記電極構造の製造方法であって、前記金属回路板上にめっきによって前記Ni層を形成するNi層形成工程と、前記Ni層上にめっきによって前記Pd層を形成するPd層形成工程と、前記Pd層上に置換型めっきによって前記Au層を形成するAu層形成工程と、を具備することを特徴とする。
本発明の電極構造の製造方法において、前記置換型めっきは、めっき液の温度が50〜80℃、PHが4.0〜9.0の範囲で行われることを特徴とする。
本発明の電極構造の製造方法において、前記Au層形成工程の後に、還元型めっきによって更にAu層を形成する追加Au層形成工程を行うことを特徴とする。
本発明の回路基板は、セラミックス基板上に前記電極構造が形成されたことを特徴とする。
本発明の半導体モジュールは、前記回路基板上に半導体チップが搭載され、該半導体チップと前記電極構造との間に電気的接続がなされたことを特徴とする。
本発明の半導体モジュールにおいて、前記電気的接続はボンディングワイヤによりなされることを特徴とする。
本発明の半導体モジュールにおいて、前記ボンディングワイヤの材質は、アルミニウム又は金を主成分とすることを特徴とする。
本発明の半導体モジュールにおいて、前記ボンディングワイヤは超音波接合により前記電極構造に接続されることを特徴とする。
本発明の電極構造は、ベース電極上に、ニッケル(Ni)層、リン(P)が添加されたパラジウム(Pd)層、金(Au)層が順次積層されて形成された被覆層が形成された電極構造であって、前記Au層は置換型めっきにより形成され、前記Pd層における平均のP濃度は2.6質量%を越え6.0質量%以下の範囲であり、前記Pd層における前記Au層と接する側におけるP濃度は、前記Pd層における前記Ni層と接する側におけるP濃度よりも1質量%以上高いことを特徴とする。
本発明の電極構造において、前記Pd層はアモルファス構造であることを特徴とする。
本発明の電極構造において、前記Ni層には、Pが添加されていることを特徴とする。
本発明の電極構造において、前記ベース電極は銅又は銅合金で形成されることを特徴とする。
本発明の電極構造において、前記Pd層の厚さは0.05〜0.2μmの範囲であることを特徴とする。
本発明の電極構造において、前記Au層の厚さは0.05〜0.2μmの範囲であることを特徴とする。
本発明の電極構造の製造方法は、前記電極構造の製造方法であって、前記ベース電極上にめっきによって前記Ni層を形成するNi層形成工程と、前記Ni層上にめっきによって前記Pd層を形成するPd層形成工程と、前記Pd層上に置換型めっきによって前記Au層を形成するAu層形成工程と、を具備することを特徴とする。
本発明の電極構造の製造方法において、前記置換型めっきは、めっき液の温度が50〜80℃、PHが4.0〜9.0の範囲で行われることを特徴とする。
本発明の電極構造の製造方法において、前記Au層形成工程の後に、還元型めっきによって更にAu層を形成する追加Au層形成工程を行うことを特徴とする。
本発明の積層基板は、セラミックス層を積層し、内部の導体パターンと接続する電極を外部に露出するようにセラミックス層に形成した積層基板であって、前記電極に前記電極構造を具備することを特徴とする。
本発明の高周波電子部品は、前記積層基板上に半導体チップが搭載され、該半導体チップと前記電極構造との間に電気的接続がなされたことを特徴とする。
本発明の高周波電子部品において、前記電気的接続はボンディングワイヤによりなされることを特徴とする。
本発明の高周波電子部品において、前記ボンディングワイヤの材質は、アルミニウム又は金を主成分とすることを特徴とする。
本発明の高周波電子部品において、前記ボンディングワイヤは超音波接合により前記電極構造に接続されることを特徴とする。
11、81 半導体チップ
20、90 回路基板
21、91 セラミックス基板
22、92 金属回路板
23、43、93 ボンディングワイヤ
24、94、421 被覆層
30 高周波電子部品
31 半導体素子
40 積層基板
41 セラミック層
42 電極(パッド)
44 導体パターン
45 電子部品
46 キャビティ
241、941、421a Ni層
242 P分布Pd層(Pd層)
243、943、421c Au層
420 ベース電極
421b、942 Pd層
Claims (28)
- 金属回路板上に、ニッケル(Ni)層、リン(P)が添加されたパラジウム(Pd)層、金(Au)層が順次積層されて形成された被覆層が形成された電極構造であって、
前記Au層は置換型めっきにより形成され、
前記Pd層における平均のP濃度は2.6質量%を越え6.0質量%以下の範囲であり、前記Pd層における前記Au層と接する側におけるP濃度は、前記Pd層における前記Ni層と接する側におけるP濃度よりも1質量%以上高いことを特徴とする電極構造。 - 前記Pd層はアモルファス構造であることを特徴とする請求項1に記載の電極構造。
- 前記Ni層には、Pが添加されていることを特徴とする請求項1または2に記載の電極構造。
- 前記金属回路板は銅又は銅合金で形成されることを特徴とする請求項1から3までのいずれか1項に記載の電極構造。
- 前記Pd層の厚さは0.05〜0.2μmの範囲であることを特徴とする請求項1から請求項4までのいずれか1項に記載の電極構造。
- 前記Au層の厚さは0.05〜0.2μmの範囲であることを特徴とする請求項1から請求項5までのいずれか1項に記載の電極構造。
- 請求項1から請求項6までのいずれか1項に記載の電極構造の製造方法であって、
前記金属回路板上にめっきによって前記Ni層を形成するNi層形成工程と、
前記Ni層上にめっきによって前記Pd層を形成するPd層形成工程と、
前記Pd層上に置換型めっきによって前記Au層を形成するAu層形成工程と、
を具備することを特徴とする電極構造の製造方法。 - 前記置換型めっきは、めっき液の温度が50〜80℃、PHが4.0〜9.0の範囲で行われることを特徴とする請求項7に記載の電極構造の製造方法。
- 前記Au層形成工程の後に、還元型めっきによって更にAu層を形成する追加Au層形成工程を行うことを特徴とする請求項7または8に記載の電極構造の製造方法。
- セラミックス基板上に請求項1から請求項6までのいずれか1項に記載の電極構造が形成されたことを特徴とする回路基板。
- 請求項10に記載の回路基板上に半導体チップが搭載され、該半導体チップと前記電極構造との間に電気的接続がなされたことを特徴とする半導体モジュール。
- 前記電気的接続はボンディングワイヤによりなされることを特徴とする請求項11に記載の半導体モジュール。
- 前記ボンディングワイヤの材質は、アルミニウム又は金を主成分とすることを特徴とする請求項12に記載の半導体モジュール。
- 前記ボンディングワイヤは超音波接合により前記電極構造に接続されることを特徴とする請求項12又は13に記載の半導体モジュール。
- ベース電極上に、ニッケル(Ni)層、リン(P)が添加されたパラジウム(Pd)層、金(Au)層が順次積層されて形成された被覆層が形成された電極構造であって、
前記Au層は置換型めっきにより形成され、
前記Pd層における平均のP濃度は2.6質量%を越え6.0質量%以下の範囲であり、前記Pd層における前記Au層と接する側におけるP濃度は、前記Pd層における前記Ni層と接する側におけるP濃度よりも1質量%以上高いことを特徴とする電極構造。 - 前記Pd層はアモルファス構造であることを特徴とする請求項15に記載の電極構造。
- 前記Ni層には、Pが添加されていることを特徴とする請求項15または16に記載の電極構造。
- 前記ベース電極は銅又は銅合金で形成されることを特徴とする請求項15から17までのいずれか1項に記載の電極構造。
- 前記Pd層の厚さは0.05〜0.2μmの範囲であることを特徴とする請求項15から請求項18までのいずれか1項に記載の電極構造。
- 前記Au層の厚さは0.05〜0.2μmの範囲であることを特徴とする請求項15から請求項19までのいずれか1項に記載の電極構造。
- 請求項15から請求項20までのいずれか1項に記載の電極構造の製造方法であって、
前記ベース電極上にめっきによって前記Ni層を形成するNi層形成工程と、
前記Ni層上にめっきによって前記Pd層を形成するPd層形成工程と、
前記Pd層上に置換型めっきによって前記Au層を形成するAu層形成工程と、
を具備することを特徴とする電極構造の製造方法。 - 前記置換型めっきは、めっき液の温度が50〜80℃、PHが4.0〜9.0の範囲で行われることを特徴とする請求項21に記載の電極構造の製造方法。
- 前記Au層形成工程の後に、還元型めっきによって更にAu層を形成する追加Au層形成工程を行うことを特徴とする請求項21または22に記載の電極構造の製造方法。
- セラミックス層を積層し、内部の導体パターンと接続する電極を外部に露出するようにセラミックス層に形成した積層基板であって、前記電極に請求項15から請求項20までのいずれか1項に記載の電極構造を具備することを特徴とする積層基板。
- 請求項24に記載の積層基板上に半導体チップが搭載され、該半導体チップと前記電極構造との間に電気的接続がなされたことを特徴とする高周波電子部品。
- 前記電気的接続はボンディングワイヤによりなされることを特徴とする請求項25に記載の高周波電子部品。
- 前記ボンディングワイヤの材質は、アルミニウム又は金を主成分とすることを特徴とする請求項26に記載の高周波電子部品。
- 前記ボンディングワイヤは超音波接合により前記電極構造に接続されることを特徴とする請求項26又は27に記載の高周波電子部品。
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US20120001336A1 (en) * | 2010-07-02 | 2012-01-05 | Texas Instruments Incorporated | Corrosion-resistant copper-to-aluminum bonds |
JP5552934B2 (ja) | 2010-07-20 | 2014-07-16 | Tdk株式会社 | 被覆体及び電子部品 |
EP2535929A1 (en) * | 2011-06-14 | 2012-12-19 | Atotech Deutschland GmbH | Wire bondable surface for microelectronic devices |
JP6020070B2 (ja) * | 2011-11-17 | 2016-11-02 | Tdk株式会社 | 被覆体及び電子部品 |
US9548276B2 (en) * | 2012-04-18 | 2017-01-17 | Win Semiconductors Corp. | Structure of backside copper metallization for semiconductor devices and a fabrication method thereof |
US9388497B2 (en) * | 2012-07-13 | 2016-07-12 | Toyo Kohan Co., Ltd. | Method of electroless gold plating |
EP2740818B1 (en) * | 2012-12-05 | 2016-03-30 | ATOTECH Deutschland GmbH | Method for manufacture of wire bondable and solderable surfaces on noble metal electrodes |
CN110070970B (zh) * | 2013-04-04 | 2022-06-03 | 罗姆股份有限公司 | 芯片构件、电路组件及电子设备 |
CN103258747B (zh) * | 2013-05-16 | 2016-10-12 | 中国电子科技集团公司第四十一研究所 | 一种在金导体薄膜电路上进行铝丝键合的方法 |
US9343422B2 (en) * | 2014-03-31 | 2016-05-17 | Freescale Semiconductor, Inc. | Structure for aluminum pad metal under ball bond |
US10840008B2 (en) * | 2015-01-15 | 2020-11-17 | Murata Manufacturing Co., Ltd. | Electronic component and electronic component-mounted structure |
CN106558564B (zh) * | 2015-09-29 | 2019-08-27 | 稳懋半导体股份有限公司 | 半导体元件背面铜金属的改良结构 |
US20170100744A1 (en) * | 2015-10-12 | 2017-04-13 | Tyco Electronics Corporation | Electronic Component and Process of Producing Electronic Component |
WO2020071025A1 (ja) * | 2018-10-02 | 2020-04-09 | 国立研究開発法人科学技術振興機構 | ヘテロエピタキシャル構造体及びその作製方法、並びにヘテロエピタキシャル構造を含む金属積層体及びその作製方法、ナノギャップ電極及びナノギャップ電極の作製方法 |
WO2021049235A1 (ja) * | 2019-09-13 | 2021-03-18 | 昭和電工株式会社 | 積層体およびその製造方法 |
JP7472770B2 (ja) * | 2020-12-15 | 2024-04-23 | トヨタ自動車株式会社 | 金属めっき皮膜の成膜装置及び成膜方法 |
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