JP5449032B2 - メモリシステム - Google Patents

メモリシステム Download PDF

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Publication number
JP5449032B2
JP5449032B2 JP2010121728A JP2010121728A JP5449032B2 JP 5449032 B2 JP5449032 B2 JP 5449032B2 JP 2010121728 A JP2010121728 A JP 2010121728A JP 2010121728 A JP2010121728 A JP 2010121728A JP 5449032 B2 JP5449032 B2 JP 5449032B2
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JP
Japan
Prior art keywords
data
memory
output
nth
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2010121728A
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English (en)
Japanese (ja)
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JP2011008779A5 (enExample
JP2011008779A (ja
Inventor
利行 本多
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP2010121728A priority Critical patent/JP5449032B2/ja
Publication of JP2011008779A publication Critical patent/JP2011008779A/ja
Publication of JP2011008779A5 publication Critical patent/JP2011008779A5/ja
Application granted granted Critical
Publication of JP5449032B2 publication Critical patent/JP5449032B2/ja
Expired - Fee Related legal-status Critical Current
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Memory System (AREA)
JP2010121728A 2009-05-28 2010-05-27 メモリシステム Expired - Fee Related JP5449032B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2010121728A JP5449032B2 (ja) 2009-05-28 2010-05-27 メモリシステム

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2009128461 2009-05-28
JP2009128461 2009-05-28
JP2010121728A JP5449032B2 (ja) 2009-05-28 2010-05-27 メモリシステム

Publications (3)

Publication Number Publication Date
JP2011008779A JP2011008779A (ja) 2011-01-13
JP2011008779A5 JP2011008779A5 (enExample) 2013-07-04
JP5449032B2 true JP5449032B2 (ja) 2014-03-19

Family

ID=43301613

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010121728A Expired - Fee Related JP5449032B2 (ja) 2009-05-28 2010-05-27 メモリシステム

Country Status (2)

Country Link
US (1) US8375238B2 (enExample)
JP (1) JP5449032B2 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101188264B1 (ko) * 2010-12-01 2012-10-05 에스케이하이닉스 주식회사 반도체 시스템, 반도체 메모리 장치 및 이를 이용한 데이터 출력 방법
US10083137B2 (en) * 2015-04-02 2018-09-25 Atmel Corporation Peripheral interface circuit for serial memory
US12002541B2 (en) 2021-12-08 2024-06-04 Advanced Micro Devices, Inc. Read clock toggle at configurable PAM levels
US12394467B2 (en) * 2021-12-08 2025-08-19 Advanced Micro Devices, Inc. Read clock start and stop for synchronous memories

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IL96808A (en) 1990-04-18 1996-03-31 Rambus Inc Introductory / Origin Circuit Agreed Using High-Performance Brokerage
JPH05298241A (ja) * 1992-04-23 1993-11-12 Meidensha Corp バースト転送方式
JP3276798B2 (ja) * 1995-02-02 2002-04-22 株式会社日立国際電気 デジタルオシロスコープにおける波形の表示方法及び装置
JP2003140962A (ja) * 2001-10-30 2003-05-16 Mitsubishi Electric Corp 信号送受信システム
JP2002304323A (ja) * 2002-02-04 2002-10-18 Hitachi Ltd 情報処理装置
JP2003257200A (ja) * 2002-03-01 2003-09-12 Mitsubishi Electric Corp 半導体記憶装置
EP1501100B1 (en) * 2003-07-22 2018-11-28 Samsung Electronics Co., Ltd. Nonvolatile memory device, memory system, and operating methods
KR100546418B1 (ko) 2004-07-27 2006-01-26 삼성전자주식회사 데이터 출력시 ｄｄｒ 동작을 수행하는 비휘발성 메모리장치 및 데이터 출력 방법
JP2006277892A (ja) 2005-03-30 2006-10-12 Elpida Memory Inc 半導体記憶装置
WO2007127678A2 (en) * 2006-04-24 2007-11-08 Sandisk Corporation High-performance flash memory data transfer
JP4267002B2 (ja) * 2006-06-08 2009-05-27 エルピーダメモリ株式会社 コントローラ及びメモリを備えるシステム
US8015382B1 (en) * 2007-02-28 2011-09-06 Altera Corporation Method and apparatus for strobe-based source-synchronous capture using a first-in-first-out unit

Also Published As

Publication number Publication date
US20100313055A1 (en) 2010-12-09
US8375238B2 (en) 2013-02-12
JP2011008779A (ja) 2011-01-13

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