JP5440803B2 - Mfms型電界効果トランジスタ及び強誘電体メモリ装置並びにこれらの製造方法 - Google Patents
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- 229910021521 yttrium barium copper oxide Inorganic materials 0.000 description 1
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- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
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Description
(Metal−Ferroelectric−Metal−Substrate)型電界効果トランジスタ及び強誘電体メモリ装置に関する。
2,3 ドレイン領域
4 チャネル領域
5 強誘電体層
6 ソース電極
7 ドレイン電極
8 ゲート電極
30 バッファ層
31 強誘電体層
32 ゲート電極
Claims (17)
- ソース及びドレイン領域とその間にチャネル領域が形成される基板と、
前記基板のチャネル領域の上側に形成されるバッファ層と、
前記バッファ層上に形成される強誘電体層と、
前記強誘電体層上に形成されるゲート電極と、を備え、
前記バッファ層が導電性材質で構成され、
前記強誘電体層がバッファ層を全体として被覆するように形成されたことを特徴とするMFMS型強誘電体メモリ装置。 - 前記導電性材質が金属を含むことを特徴とする請求項1に記載のMFMS型強誘電体メモリ装置。
- 前記導電性材質が伝導性金属酸化物と伝導性金属酸化物の合金または化合物のうち一つを含むことを特徴とする請求項1に記載のMFMS型強誘電体メモリ装置。
- 前記導電性材質が伝導性有機物を含むことを特徴とする請求項1に記載のMFMS型強誘電体メモリ装置。
- 前記導電性材質がシリサイドを含むことを特徴とする請求項1に記載のMFMS型強誘電体メモリ装置。
- 前記バッファ層が多層構造で構成されることを特徴とする請求項1に記載のMFMS型強誘電体メモリ装置。
- 前記強誘電体層が酸化物強誘電体、高分子強誘電体、フッ化物強誘電体、強誘電体半導体またはこれら強誘電体の固形体のうち少なくとも一つを含んで構成されることを特徴とする請求項1に記載のMFMS型強誘電体メモリ装置。
- 前記バッファ層がTiNであり、前記強誘電体層がBLTを含んで構成されることを特徴とする請求項1に記載のMFMS型強誘電体メモリ装置。
- 前記ソース及びドレイン領域と前記バッファ層を遮蔽させるための絶縁層をさらに含んで構成されることを特徴とする請求項1に記載のMFMS型強誘電体メモリ装置。
- ソース及びドレイン領域とその間にチャネル領域が形成される基板と、
前記基板のチャネル領域の上側に形成されるバッファ層と、
前記バッファ層上に形成される強誘電体層と、
前記強誘電体層上に形成されるゲート電極を備えて構成され、
前記バッファ層が導電性材質で構成され、
前記強誘電体層がバッファ層を全体として被覆するように形成されたことを特徴とするMFMS型電界効果トランジスタ。 - 前記バッファ層が多層構造で構成されることを特徴とする請求項10に記載のMFMS型電界効果トランジスタ。
- 前記ソース及びドレイン領域と前記バッファ層を遮蔽させるための絶縁層をさらに含んで構成されることを特徴とする請求項10に記載のMFMS型電界効果トランジスタ。
- 前記バッファ層がTiNであり、前記強誘電体層がBLTを含んで構成されることを特徴とする請求項10に記載のMFMS型電界効果トランジスタ。
- 強誘電体メモリ装置を製造する方法において、
基板にソース、ドレイン及びチャネル領域を形成する段階と、
前記基板上のチャネル領域に対応する部分に導電性材質で構成されるバッファ層を形成する段階と、
前記バッファ層の上側に強誘電体層を形成する段階と、
前記強誘電体層の上側にゲート電極を形成する段階とを含んで構成され、
前記強誘電体層の形成段階は強誘電体層がバッファ層を全体として被覆するように強誘電体層を形成することを特徴とするMFMS型強誘電体メモリ装置の製造方法。 - 前記ソース及びドレイン領域と前記バッファ層を遮蔽させるための絶縁層を形成する段階をさらに含んで構成されることを特徴とする請求項14に記載のMFMS型強誘電体メモリ装置の製造方法。
- 電界効果トランジスタを製造する方法において、
基板にソース、ドレイン及びチャネル領域を形成する段階と、
前記基板上のチャネル領域に対応する部分に導電性材質で構成されるバッファ層を形成する段階と、
前記バッファ層の上側に強誘電体層を形成する段階と、
前記強誘電体層の上側にゲート電極を形成する段階と、を含んで構成され、
前記強誘電体層の形成段階は強誘電体層がバッファ層を全体として被覆するように強誘電体層を形成することを特徴とするMFMS型電界効果トランジスタの製造方法。 - 前記ソース及びドレイン領域と前記バッファ層を遮蔽させるための絶縁層を形成する段階をさらに含んで構成されることを特徴とする請求項16に記載のMFMS型電界効果トランジスタの製造方法。
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KR20070108508 | 2007-10-26 | ||
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KR10-2008-0105121 | 2008-10-27 | ||
PCT/KR2008/006326 WO2009054707A2 (en) | 2007-10-26 | 2008-10-27 | Mfms-fet, ferroelectric memory device, and methods of manufacturing the same |
KR1020080105121A KR101559995B1 (ko) | 2007-10-26 | 2008-10-27 | 엠에프엠에스형 전계효과 트랜지스터 및 강유전체 메모리 장치와 이들의 제조방법 |
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WO2018125118A1 (en) * | 2016-12-29 | 2018-07-05 | Intel Corporation | Back-end ferroelectric field-effect transistor devices |
KR20190008049A (ko) * | 2017-07-14 | 2019-01-23 | 에스케이하이닉스 주식회사 | 강유전성 메모리 소자의 제조 방법 |
CN107611033B (zh) * | 2017-08-25 | 2020-03-20 | 深圳大学 | 基于铁电栅介质的负电容二硫化钼晶体管及其制备方法 |
US11430510B2 (en) * | 2020-12-11 | 2022-08-30 | International Business Machines Corporation | Multi-level ferroelectric field-effect transistor devices |
US20240088065A1 (en) * | 2022-09-08 | 2024-03-14 | International Business Machines Corporation | Ferroelectric memory device erasure |
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JP3169406B2 (ja) * | 1991-11-11 | 2001-05-28 | ローム株式会社 | 不揮発性半導体記憶装置 |
JPH0689981A (ja) * | 1991-11-27 | 1994-03-29 | Tdk Corp | 不揮発性メモリセル |
US5807774A (en) * | 1996-12-06 | 1998-09-15 | Sharp Kabushiki Kaisha | Simple method of fabricating ferroelectric capacitors |
JP4080050B2 (ja) * | 1997-03-07 | 2008-04-23 | シャープ株式会社 | 強誘電体メモリセル、半導体構造およびそれらの製造方法 |
US6011285A (en) * | 1998-01-02 | 2000-01-04 | Sharp Laboratories Of America, Inc. | C-axis oriented thin film ferroelectric transistor memory cell and method of making the same |
US6242771B1 (en) * | 1998-01-02 | 2001-06-05 | Sharp Laboratories Of America, Inc. | Chemical vapor deposition of PB5GE3O11 thin film for ferroelectric applications |
DE19850852A1 (de) * | 1998-11-04 | 2000-05-11 | Siemens Ag | Ferroelektrischer Transistor und Verfahren zu dessen Herstellung |
US6048740A (en) * | 1998-11-05 | 2000-04-11 | Sharp Laboratories Of America, Inc. | Ferroelectric nonvolatile transistor and method of making same |
US6151241A (en) * | 1999-05-19 | 2000-11-21 | Symetrix Corporation | Ferroelectric memory with disturb protection |
JP2003068890A (ja) * | 2001-08-23 | 2003-03-07 | Rikogaku Shinkokai | 不揮発性半導体記憶装置および不揮発性メモリ素子 |
US7297602B2 (en) * | 2003-09-09 | 2007-11-20 | Sharp Laboratories Of America, Inc. | Conductive metal oxide gate ferroelectric memory transistor |
JP2007134354A (ja) * | 2005-11-07 | 2007-05-31 | Seiko Epson Corp | 有機強誘電体キャパシタの製造方法、有機強誘電体キャパシタ、有機強誘電体メモリ、および電子機器 |
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- 2008-10-27 KR KR1020080105121A patent/KR101559995B1/ko active IP Right Grant
- 2008-10-27 US US12/739,953 patent/US20100252867A1/en not_active Abandoned
- 2008-10-27 JP JP2010530937A patent/JP5440803B2/ja not_active Expired - Fee Related
- 2008-10-27 CN CN2008801144347A patent/CN101919055A/zh active Pending
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KR101559995B1 (ko) | 2015-10-15 |
US20100252867A1 (en) | 2010-10-07 |
KR20090042747A (ko) | 2009-04-30 |
JP2011501461A (ja) | 2011-01-06 |
CN101919055A (zh) | 2010-12-15 |
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