JP5436101B2 - 半導体装置の作製方法 - Google Patents

半導体装置の作製方法 Download PDF

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Publication number
JP5436101B2
JP5436101B2 JP2009200230A JP2009200230A JP5436101B2 JP 5436101 B2 JP5436101 B2 JP 5436101B2 JP 2009200230 A JP2009200230 A JP 2009200230A JP 2009200230 A JP2009200230 A JP 2009200230A JP 5436101 B2 JP5436101 B2 JP 5436101B2
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JP
Japan
Prior art keywords
film
semiconductor film
glass substrate
electrode layer
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2009200230A
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English (en)
Japanese (ja)
Other versions
JP2010087487A (ja
JP2010087487A5 (enExample
Inventor
英人 大沼
直樹 奥野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Publication date
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Priority to JP2009200230A priority Critical patent/JP5436101B2/ja
Publication of JP2010087487A publication Critical patent/JP2010087487A/ja
Publication of JP2010087487A5 publication Critical patent/JP2010087487A5/ja
Application granted granted Critical
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Expired - Fee Related legal-status Critical Current
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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0221—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies
    • H10D86/0223—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies comprising crystallisation of amorphous, microcrystalline or polycrystalline semiconductor materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02422—Non-crystalline insulating materials, e.g. glass, polymers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H01L21/67115—Apparatus for thermal treatment mainly by radiation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/6737—Thin-film transistors [TFT] characterised by the electrodes characterised by the electrode materials
    • H10D30/6739—Conductor-insulator-semiconductor electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/411—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by materials, geometry or structure of the substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/40—Crystalline structures

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Toxicology (AREA)
  • Materials Engineering (AREA)
  • Health & Medical Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)
  • Liquid Crystal (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2009200230A 2008-09-05 2009-08-31 半導体装置の作製方法 Expired - Fee Related JP5436101B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009200230A JP5436101B2 (ja) 2008-09-05 2009-08-31 半導体装置の作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2008228134 2008-09-05
JP2008228134 2008-09-05
JP2009200230A JP5436101B2 (ja) 2008-09-05 2009-08-31 半導体装置の作製方法

Publications (3)

Publication Number Publication Date
JP2010087487A JP2010087487A (ja) 2010-04-15
JP2010087487A5 JP2010087487A5 (enExample) 2012-09-06
JP5436101B2 true JP5436101B2 (ja) 2014-03-05

Family

ID=41799649

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009200230A Expired - Fee Related JP5436101B2 (ja) 2008-09-05 2009-08-31 半導体装置の作製方法

Country Status (2)

Country Link
US (1) US8293626B2 (enExample)
JP (1) JP5436101B2 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2479790B (en) * 2010-04-23 2012-03-07 Alertme Com Ltd Method of identifying the operation of a power consuming device from an aggregate power series
WO2012029661A1 (ja) * 2010-09-01 2012-03-08 株式会社日立国際電気 半導体装置の製造方法及び基板処理装置
KR20120109856A (ko) * 2011-03-28 2012-10-09 삼성디스플레이 주식회사 표시 장치 및 그 제조 방법
DE102011002236A1 (de) * 2011-04-21 2012-10-25 Dritte Patentportfolio Beteiligungsgesellschaft Mbh & Co.Kg Verfahren zur Herstellung einer polykristallinen Schicht

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61187341A (ja) * 1985-02-15 1986-08-21 Sony Corp 半導体基板の熱処理装置
JPS6342112A (ja) 1986-08-07 1988-02-23 Sharp Corp 多結晶シリコン薄膜の形成方法
JPH01146324A (ja) * 1987-12-02 1989-06-08 Fujitsu Ltd 熱処理装置
US5639698A (en) 1993-02-15 1997-06-17 Semiconductor Energy Laboratory Co., Ltd. Semiconductor, semiconductor device, and method for fabricating the same
US6997985B1 (en) 1993-02-15 2006-02-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor, semiconductor device, and method for fabricating the same
JPH06244103A (ja) 1993-02-15 1994-09-02 Semiconductor Energy Lab Co Ltd 半導体の製造方法
US6111191A (en) * 1997-03-04 2000-08-29 Astropower, Inc. Columnar-grained polycrystalline solar cell substrate and improved method of manufacture
JP4115589B2 (ja) * 1997-10-17 2008-07-09 株式会社半導体エネルギー研究所 半導体装置の作製方法
US6427622B2 (en) * 1998-08-28 2002-08-06 Mv Systems, Inc. Hot wire chemical vapor deposition method and apparatus using graphite hot rods
JP2002043299A (ja) * 2000-07-19 2002-02-08 Tokyo Electron Ltd 被処理体の熱処理方法
JP4718700B2 (ja) * 2001-03-16 2011-07-06 株式会社半導体エネルギー研究所 半導体装置の作製方法
US7052943B2 (en) * 2001-03-16 2006-05-30 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a semiconductor device
US6759284B2 (en) * 2002-09-06 2004-07-06 Industrial Technology Research Institute Method for polysilicon crystallization by simultaneous laser and rapid thermal annealing
KR100685396B1 (ko) * 2004-07-22 2007-02-22 삼성에스디아이 주식회사 반도체 장치의 제조 방법 및 이 방법에 의하여 제조되는반도체 장치
WO2007021503A1 (en) * 2005-08-17 2007-02-22 Corning Incorporated High strain point glasses
US8007913B2 (en) * 2006-02-10 2011-08-30 Corning Incorporated Laminated glass articles and methods of making thereof
JP2008130596A (ja) * 2006-11-16 2008-06-05 Ihi Corp ガラス基板の熱処理方法及び装置

Also Published As

Publication number Publication date
US8293626B2 (en) 2012-10-23
US20100062586A1 (en) 2010-03-11
JP2010087487A (ja) 2010-04-15

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