JP2009055013A - 半導体装置の作製方法 - Google Patents
半導体装置の作製方法 Download PDFInfo
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- JP2009055013A JP2009055013A JP2008191327A JP2008191327A JP2009055013A JP 2009055013 A JP2009055013 A JP 2009055013A JP 2008191327 A JP2008191327 A JP 2008191327A JP 2008191327 A JP2008191327 A JP 2008191327A JP 2009055013 A JP2009055013 A JP 2009055013A
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Images
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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Abstract
【解決手段】微結晶半導体層をチャネル形成領域とするチャネルエッチ構造の逆スタガ型薄膜トランジスタを有する表示装置において、微結晶半導体層は、成膜法により形成する結晶成長の核となりうる微結晶半導体膜と、非晶質半導体膜との積層を形成し、該非晶質半導体膜上にース領域及びドレイン領域を形成する一導電型を付与する不純物が添加された半導体膜、導電膜を形成し、導電膜にレーザ光を照射する。レーザ光により微結晶半導体膜上の非晶質半導体膜は結晶化し、成膜法による微結晶半導体膜を含む微結晶半導体層を形成することができる。
【選択図】図1
Description
本実施の形態では、半導体装置(表示装置)に用いられる薄膜トランジスタの作製工程について、図1乃至図4を用いて説明する。図1乃至図3は、薄膜トランジスタの作製工程を示す断面図であり、図4は一画素における薄膜トランジスタ及び画素電極の接続領域の平面図であり、図1乃至図3は、図4における線A1−B1の薄膜トランジスタの作製工程を示す断面図である。
本実施の形態は、実施の形態1において、薄膜トランジスタの形状が異なる例である。従って、他は実施の形態1と同様に行うことができ、実施の形態1と同一部分又は同様な機能を有する部分、及び工程の繰り返しの説明は省略する。
本実施の形態は、実施の形態1において、薄膜トランジスタの形状が異なる例である。従って、他は実施の形態1と同様に行うことができ、実施の形態1と同一部分又は同様な機能を有する部分、及び工程の繰り返しの説明は省略する。
(実施の形態4)
本実施の形態は、実施の形態1において、薄膜トランジスタのゲート絶縁膜の形状が異なる例である。従って、他は実施の形態1と同様に行うことができ、実施の形態1と同一部分又は同様な機能を有する部分、及び工程の繰り返しの説明は省略する。
本実施の形態は、実施の形態1乃至4において、表示装置の作製工程の例を詳細に説明する。従って、実施の形態1乃至4と同一部分又は同様な機能を有する部分、及び工程の繰り返しの説明は省略する。
次に、表示装置の作製工程について、図30及び図31を用いて説明する。表示装置の有する表示素子としては、ここではエレクトロルミネッセンスを利用する発光素子を用いて示す。エレクトロルミネッセンスを利用する発光素子は、発光材料が有機化合物であるか、無機化合物であるかによって区別され、一般的に、前者は有機EL素子、後者は無機EL素子と呼ばれている。また、表示装置に用いられる薄膜トランジスタ85、86は、実施の形態1乃至4で示す薄膜トランジスタ74、274、及び374と同様な構造及び方法で作製でき、簡略化した工程で量産性高く作製することのできる電気特性及び信頼性の高い薄膜トランジスタである。図30及び図31の薄膜トランジスタ85、86、7001、7011、及び7021は実施の形態1の薄膜トランジスタ74の同様な構造及び作製方法を用いている例である。
本実施の形態では、実施の形態1乃至4で示す薄膜トランジスタを有する表示装置について、以下に示す。本実施の形態は、表示素子として液晶素子を用いた液晶表示装置の例を図12乃至図25用いて説明する。図12乃至図25の液晶表示装置に用いられるTFT628、629は、実施の形態1乃至4で示す薄膜トランジスタ74、274、及び374と同様な構造及び方法で作製でき、簡略化した工程で量産性高く作製することのできる電気特性及び信頼性の高い薄膜トランジスタである。また、画素電極、及び対向電極は、実施の形態1で示す画素電極77と同材料及び工程を用いて形成することができる。
次に、本発明の表示装置の一形態である表示パネルの構成について、以下に示す。本実施の形態では、表示素子として液晶素子を有する液晶表示装置の一形態である液晶表示パネル(液晶パネルともいう)、表示素子として発光素子を有する表示装置の一形態である発光表示パネル(発光パネルともいう)について説明する。
本発明により得られる表示装置等は、表示モジュール(アクティブマトリクス型ELモジュール又は液晶モジュール)に用いることができる。即ち、それらを表示部に組み込んだ電子機器全てに本発明を実施できる。
Claims (7)
- ゲート電極上に、ゲート絶縁膜、微結晶半導体膜、非晶質半導体膜、一導電型を付与する不純物が添加された半導体膜、及び導電膜を順次形成し、
前記導電膜にレーザ光を照射して少なくとも前記非晶質半導体膜を微結晶半導体膜に改質し、
前記導電膜を前記一導電型を付与する不純物が添加された半導体膜上に残存させたまま、チャネルエッチ型の薄膜トランジスタを形成することを特徴とする半導体装置の作製方法。 - ゲート電極上に、ゲート絶縁膜、微結晶半導体膜、非晶質半導体膜、一導電型を付与する不純物が添加された半導体膜、及び導電膜を順次形成し、
前記導電膜にレーザ光を照射して、前記非晶質半導体膜を微結晶半導体膜に改質し、かつ前記一導電型を付与する不純物が添加された半導体膜を一導電型を付与する不純物が添加された微結晶半導体膜に改質し、
前記導電膜を前記一導電型を付与する不純物が添加された半導体膜上に残存させたまま、チャネルエッチ型の薄膜トランジスタを形成することを特徴とする半導体装置の作製方法。 - ゲート電極上に、ゲート絶縁膜、微結晶半導体膜、非晶質半導体膜、一導電型を付与する不純物が添加された半導体膜、及び導電膜を順次形成し、
前記導電膜にレーザ光を照射して少なくとも前記非晶質半導体膜を微結晶半導体膜に改質し、
前記導電膜を前記一導電型を付与する不純物が添加された半導体膜上に残存させたまま、チャネルエッチ型の薄膜トランジスタを形成し、
前記チャネルエッチ型の薄膜トランジスタに電気的に接続する画素電極を形成することを特徴とする半導体装置の作製方法。 - ゲート電極上に、ゲート絶縁膜、微結晶半導体膜、非晶質半導体膜、一導電型を付与する不純物が添加された半導体膜、及び導電膜を順次形成し、
前記導電膜にレーザ光を照射して、前記非晶質半導体膜を微結晶半導体膜に改質し、かつ前記一導電型を付与する不純物が添加された半導体膜を一導電型を付与する不純物が添加された微結晶半導体膜に改質し、
前記導電膜を前記一導電型を付与する不純物が添加された半導体膜上に残存させたまま、チャネルエッチ型の薄膜トランジスタを形成し、
前記チャネルエッチ型の薄膜トランジスタに電気的に接続する画素電極を形成することを特徴とする半導体装置の作製方法。 - 請求項1乃至4のいずれか一項において、前記導電膜を用いて前記チャネルエッチ型の薄膜トランジスタのソース電極及びドレイン電極を形成することを特徴とする半導体装置の作製方法。
- 請求項1乃至5のいずれか一項において、前記ゲート絶縁膜は、前記ゲート電極上に窒化珪素膜、酸化窒化珪素膜、窒化珪素膜の積層で形成することを特徴とする半導体装置の作製方法。
- 請求項1乃至6のいずれか一項において、前記ゲート絶縁膜、前記微結晶半導体膜、前記非晶質半導体膜、前記一導電型を付与する不純物が添加された半導体膜は大気に曝さずに連続的に形成することを特徴とする半導体装置の作製方法。
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JP2007005508A (ja) * | 2005-06-23 | 2007-01-11 | Sony Corp | 薄膜トランジスタの製造方法および表示装置の製造方法 |
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US9178071B2 (en) | 2010-09-13 | 2015-11-03 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
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US7858455B2 (en) | 2010-12-28 |
US20090029508A1 (en) | 2009-01-29 |
KR101399608B1 (ko) | 2014-05-26 |
KR20090012075A (ko) | 2009-02-02 |
JP5288597B2 (ja) | 2013-09-11 |
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