JP5436101B2 - 半導体装置の作製方法 - Google Patents
半導体装置の作製方法 Download PDFInfo
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- JP5436101B2 JP5436101B2 JP2009200230A JP2009200230A JP5436101B2 JP 5436101 B2 JP5436101 B2 JP 5436101B2 JP 2009200230 A JP2009200230 A JP 2009200230A JP 2009200230 A JP2009200230 A JP 2009200230A JP 5436101 B2 JP5436101 B2 JP 5436101B2
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- film
- semiconductor film
- glass substrate
- electrode layer
- silicon
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- 238000000034 method Methods 0.000 title claims description 81
- 238000004519 manufacturing process Methods 0.000 title claims description 31
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- 239000001307 helium Substances 0.000 claims description 8
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- SIXSYDAISGFNSX-UHFFFAOYSA-N scandium atom Chemical compound [Sc] SIXSYDAISGFNSX-UHFFFAOYSA-N 0.000 description 1
- 239000003566 sealing material Substances 0.000 description 1
- VSZWPYCFIRKVQL-UHFFFAOYSA-N selanylidenegallium;selenium Chemical compound [Se].[Se]=[Ga].[Se]=[Ga] VSZWPYCFIRKVQL-UHFFFAOYSA-N 0.000 description 1
- 150000003376 silicon Chemical class 0.000 description 1
- FDNAPBUWERUEDA-UHFFFAOYSA-N silicon tetrachloride Chemical compound Cl[Si](Cl)(Cl)Cl FDNAPBUWERUEDA-UHFFFAOYSA-N 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 230000007480 spreading Effects 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
- 239000007858 starting material Substances 0.000 description 1
- SFZCNBIFKDRMGX-UHFFFAOYSA-N sulfur hexafluoride Chemical compound FS(F)(F)(F)(F)F SFZCNBIFKDRMGX-UHFFFAOYSA-N 0.000 description 1
- 229960000909 sulfur hexafluoride Drugs 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
- 229910001936 tantalum oxide Inorganic materials 0.000 description 1
- TXEYQDLBPFQVAA-UHFFFAOYSA-N tetrafluoromethane Chemical compound FC(F)(F)F TXEYQDLBPFQVAA-UHFFFAOYSA-N 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- 150000003608 titanium Chemical class 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
- FAQYAMRNWDIXMY-UHFFFAOYSA-N trichloroborane Chemical compound ClB(Cl)Cl FAQYAMRNWDIXMY-UHFFFAOYSA-N 0.000 description 1
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 description 1
- 229910021342 tungsten silicide Inorganic materials 0.000 description 1
- 229910052720 vanadium Inorganic materials 0.000 description 1
- GPPXJZIENCGNKB-UHFFFAOYSA-N vanadium Chemical compound [V]#[V] GPPXJZIENCGNKB-UHFFFAOYSA-N 0.000 description 1
- LEONUFNNVUYDNQ-UHFFFAOYSA-N vanadium atom Chemical compound [V] LEONUFNNVUYDNQ-UHFFFAOYSA-N 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
- 229910052724 xenon Inorganic materials 0.000 description 1
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
- 229910052726 zirconium Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
- H01L27/1274—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
-
- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02422—Non-crystalline insulating materials, e.g. glass, polymers
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67098—Apparatus for thermal treatment
- H01L21/67115—Apparatus for thermal treatment mainly by radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
-
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
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- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Crystallography & Structural Chemistry (AREA)
- Thin Film Transistor (AREA)
- Recrystallisation Techniques (AREA)
- Liquid Crystal (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Description
本実施の形態では、半導体装置に用いる半導体基板の作製方法の一例について、図1乃至図3を参照して説明する。
本実施の形態では、半導体装置に用いる半導体基板の作製方法の別の一例について説明する。なお、本実施の形態における半導体基板の作製方法は、実施の形態1に係る半導体基板の作製方法と多くの点で共通している。このため、本実施の形態においては、実施の形態1と異なる部分についてのみ説明することとし、その他の説明については省略する。
本実施の形態では、図4乃至6を参照して、上述の半導体基板を用いた半導体装置の作製方法について説明する。ここでは、半導体装置の一例として複数のトランジスタからなる半導体装置の作製方法について説明することとする。なお、以下において示すトランジスタを組み合わせて用いることで、様々な半導体装置を形成することができる。
本実施の形態では、半導体装置の製造方法の一例について、図7乃至10を参照して説明する。なお、本実施の形態においては、液晶表示装置を例に挙げて説明するが、半導体装置は液晶表示装置に限られるものではない。また、本実施の形態においてはトップゲート型の薄膜トランジスタを用いて液晶表示装置を作製する場合について説明するが、開示する発明はこれに限られるものではない。
本実施の形態では、半導体装置の一例として、発光素子を有する半導体装置(エレクトロルミネッセンス表示装置)について説明する。薄膜トランジスタの作製方法の詳細については、実施の形態4などを参照することができるため、ここでは省略する。
本実施の形態では、半導体装置、特に表示装置を用いた電子機器について、図12を参照して説明する。
102 絶縁膜
104 半導体膜
106 処理雰囲気
108 結晶性半導体膜
201 処理室
202 加熱手段
203 支持台
206 ランプ光源
306 抵抗
402 半導体膜
404 半導体膜
406 ゲート絶縁膜
408 電極
410 電極
412 不純物領域
414 不純物領域
416 サイドウォール
418 サイドウォール
420 高濃度不純物領域
422 低濃度不純物領域
424 チャネル形成領域
426 高濃度不純物領域
428 低濃度不純物領域
430 チャネル形成領域
432 nチャネル型トランジスタ
434 pチャネル型トランジスタ
436 絶縁膜
438 絶縁膜
440 導電膜
442 導電膜
444 導電膜
446 導電膜
700 ガラス基板
702 絶縁膜
704 結晶性半導体膜
706 半導体膜
708 半導体膜
710 半導体膜
712 ゲート絶縁膜
716a マスク
716b マスク
716c マスク
716d マスク
716e マスク
718a ゲート電極層
718b ゲート電極層
718c ゲート電極層
718d ゲート電極層
718e 導電層
720a 導電層
720b 導電層
720c 導電層
720d 導電層
720e 導電層
722a ゲート電極層
722b ゲート電極層
722c ゲート電極層
722d ゲート電極層
722e 導電層
724a ゲート電極層
724b ゲート電極層
724c ゲート電極層
724d ゲート電極層
724e 導電層
726a n型不純物領域
726b n型不純物領域
728a n型不純物領域
728b n型不純物領域
730a n型不純物領域
730b n型不純物領域
730c n型不純物領域
732a マスク
732b マスク
732c マスク
734a n型不純物領域
734b n型不純物領域
736a n型不純物領域
736b n型不純物領域
738 チャネル形成領域
740a n型不純物領域
740b n型不純物領域
740c n型不純物領域
742a n型不純物領域
742b n型不純物領域
742c n型不純物領域
742d n型不純物領域
744a チャネル形成領域
744b チャネル形成領域
746a マスク
746b マスク
748a p型不純物領域
748b p型不純物領域
750a p型不純物領域
750b p型不純物領域
752 チャネル形成領域
754 絶縁膜
756 絶縁膜
758a ドレイン電極層
758b ドレイン電極層
760a ドレイン電極層
760b ドレイン電極層
762a ドレイン電極層
762b ドレイン電極層
764 pチャネル型薄膜トランジスタ
766 nチャネル型薄膜トランジスタ
768 nチャネル型薄膜トランジスタ
770 容量配線
772 絶縁膜
774 画素電極層
776 外部端子接続領域
778 封止領域
780 周辺駆動回路領域
790 画素領域
1000 対向基板
1002 絶縁膜
1004 液晶層
1006 絶縁膜
1008 導電層
1010 着色層
1012 偏光子
1014 シール材
1016 スペーサ
1018 偏光子
1020 端子電極層
1022 異方性導電体層
1024 FPC
1100 素子基板
1102 絶縁膜
1130 外部端子接続領域
1132 封止領域
1134 駆動回路領域
1136 画素領域
1150 薄膜トランジスタ
1152 薄膜トランジスタ
1154 薄膜トランジスタ
1156 薄膜トランジスタ
1160 発光素子
1162 電極層
1164 発光層
1166 電極層
1168 絶縁層
1170 充填材
1172 シール材
1174 配線層
1176 端子電極層
1178 異方性導電層
1180 FPC
1190 封止基板
1201 筺体
1202 支持台
1203 表示部
1204 スピーカー部
1205 ビデオ入力端子
1211 本体
1212 表示部
1213 受像部
1214 操作キー
1215 外部接続ポート
1216 シャッターボタン
1221 本体
1222 筐体
1223 表示部
1224 キーボード
1225 外部接続ポート
1226 ポインティングデバイス
1231 本体
1232 表示部
1233 スイッチ
1234 操作キー
1235 赤外線ポート
1241 本体
1242 筐体
1243 表示部
1244 表示部
1245 記録媒体読み込み部
1246 操作キー
1247 スピーカー部
1251 本体
1252 表示部
1253 操作キー
1262 表示部
1264 外部接続ポート
1265 リモコン受信部
1266 受像部
1269 操作キー
1273 表示部
1274 音声入力部
1275 音声出力部
1276 操作キー
1277 外部接続ポート
Claims (7)
- ガラス基板上に非晶質シリコン膜を形成し、
処理雰囲気の温度を、725℃以上とした後、
前記ガラス基板を、前記処理雰囲気内にあり、725℃以上である支持台上に導入して所定時間保持することにより、前記非晶質シリコン膜を結晶化し、
前記ガラス基板を、前記処理雰囲気から取り出すことを特徴とする半導体装置の作製方法。 - 請求項1において、
前記所定時間は、1分以上10分以下であることを特徴とする半導体装置の作製方法。 - 請求項1又は2において、
前記処理雰囲気の温度を、725℃以上且つ前記ガラス基板の歪み点未満とし、
前記保持は、前記ガラス基板の歪み点未満の温度で行われることを特徴とする半導体装置の作製方法。 - 請求項1乃至3のいずれか一において、
前記処理雰囲気には、少なくとも、水素、ヘリウム、水のいずれかが含まれることを特徴とする半導体装置の作製方法。 - 請求項1乃至4のいずれか一において、
前記処理雰囲気の温度は、輻射熱によって保持されることを特徴とする半導体装置の作製方法。 - 請求項1乃至5のいずれか一において、
前記ガラス基板の歪み点は、730℃以上であることを特徴とする半導体装置の作製方法。 - 請求項1乃至6のいずれか一において、
前記ガラス基板には、B2O3よりBaOが多く含まれることを特徴とする半導体装置の作製方法。
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JPS61187341A (ja) * | 1985-02-15 | 1986-08-21 | Sony Corp | 半導体基板の熱処理装置 |
JPS6342112A (ja) | 1986-08-07 | 1988-02-23 | Sharp Corp | 多結晶シリコン薄膜の形成方法 |
JPH01146324A (ja) * | 1987-12-02 | 1989-06-08 | Fujitsu Ltd | 熱処理装置 |
JPH06244103A (ja) | 1993-02-15 | 1994-09-02 | Semiconductor Energy Lab Co Ltd | 半導体の製造方法 |
US5639698A (en) | 1993-02-15 | 1997-06-17 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor, semiconductor device, and method for fabricating the same |
US6997985B1 (en) | 1993-02-15 | 2006-02-14 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor, semiconductor device, and method for fabricating the same |
WO1998039804A1 (en) * | 1997-03-04 | 1998-09-11 | Astropower, Inc. | Columnar-grained polycrystalline solar cell substrate and improved method of manufacture |
JP4115589B2 (ja) * | 1997-10-17 | 2008-07-09 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
US6427622B2 (en) * | 1998-08-28 | 2002-08-06 | Mv Systems, Inc. | Hot wire chemical vapor deposition method and apparatus using graphite hot rods |
JP2002043299A (ja) * | 2000-07-19 | 2002-02-08 | Tokyo Electron Ltd | 被処理体の熱処理方法 |
US7052943B2 (en) * | 2001-03-16 | 2006-05-30 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing a semiconductor device |
JP4718700B2 (ja) * | 2001-03-16 | 2011-07-06 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
US6759284B2 (en) * | 2002-09-06 | 2004-07-06 | Industrial Technology Research Institute | Method for polysilicon crystallization by simultaneous laser and rapid thermal annealing |
KR100685396B1 (ko) * | 2004-07-22 | 2007-02-22 | 삼성에스디아이 주식회사 | 반도체 장치의 제조 방법 및 이 방법에 의하여 제조되는반도체 장치 |
WO2007021503A1 (en) * | 2005-08-17 | 2007-02-22 | Corning Incorporated | High strain point glasses |
US8007913B2 (en) * | 2006-02-10 | 2011-08-30 | Corning Incorporated | Laminated glass articles and methods of making thereof |
JP2008130596A (ja) * | 2006-11-16 | 2008-06-05 | Ihi Corp | ガラス基板の熱処理方法及び装置 |
-
2009
- 2009-08-31 JP JP2009200230A patent/JP5436101B2/ja not_active Expired - Fee Related
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US8293626B2 (en) | 2012-10-23 |
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