JP5395745B2 - 仮基板の製造装置及び製造方法 - Google Patents

仮基板の製造装置及び製造方法 Download PDF

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Publication number
JP5395745B2
JP5395745B2 JP2010122307A JP2010122307A JP5395745B2 JP 5395745 B2 JP5395745 B2 JP 5395745B2 JP 2010122307 A JP2010122307 A JP 2010122307A JP 2010122307 A JP2010122307 A JP 2010122307A JP 5395745 B2 JP5395745 B2 JP 5395745B2
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Japan
Prior art keywords
metal foil
shape guide
outer shape
temporary substrate
prepreg
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Application number
JP2010122307A
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English (en)
Japanese (ja)
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JP2011249629A (ja
JP2011249629A5 (https=
Inventor
健司 岡田
和弘 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2010122307A priority Critical patent/JP5395745B2/ja
Priority to US13/115,287 priority patent/US8539668B2/en
Publication of JP2011249629A publication Critical patent/JP2011249629A/ja
Publication of JP2011249629A5 publication Critical patent/JP2011249629A5/ja
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0097Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B38/00Ancillary operations in connection with laminating processes
    • B32B38/18Handling of layers or the laminate
    • B32B38/1825Handling of layers or the laminate characterised by the control or constructional features of devices for tensioning, stretching or registration
    • B32B38/1833Positioning, e.g. registration or centering
    • B32B38/1841Positioning, e.g. registration or centering during laying up
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2309/00Parameters for the laminating or treatment process; Apparatus details
    • B32B2309/08Dimensions, e.g. volume
    • B32B2309/10Dimensions, e.g. volume linear, e.g. length, distance, width
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2309/00Parameters for the laminating or treatment process; Apparatus details
    • B32B2309/08Dimensions, e.g. volume
    • B32B2309/10Dimensions, e.g. volume linear, e.g. length, distance, width
    • B32B2309/105Thickness
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2310/00Treatment by energy or chemical effects
    • B32B2310/08Treatment by energy or chemical effects by wave energy or particle radiation
    • B32B2310/0806Treatment by energy or chemical effects by wave energy or particle radiation using electromagnetic radiation
    • B32B2310/0843Treatment by energy or chemical effects by wave energy or particle radiation using electromagnetic radiation using laser
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2457/00Electrical equipment
    • B32B2457/08PCBs, i.e. printed circuit boards
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/10Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the pressing technique, e.g. using action of vacuum or fluid pressure
    • B32B37/1009Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the pressing technique, e.g. using action of vacuum or fluid pressure using vacuum and fluid pressure
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B38/00Ancillary operations in connection with laminating processes
    • B32B38/0004Cutting, tearing or severing, e.g. bursting; Cutter details
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B38/00Ancillary operations in connection with laminating processes
    • B32B38/14Printing or colouring
    • B32B38/145Printing
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0355Metal foils
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01Tools for processing; Objects used during processing
    • H05K2203/0147Carriers and holders
    • H05K2203/0156Temporary polymeric carrier or foil, e.g. for processing or transferring
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/205Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4682Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/53Means to assemble or disassemble
    • Y10T29/5313Means to assemble electrical device
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/53Means to assemble or disassemble
    • Y10T29/5313Means to assemble electrical device
    • Y10T29/5317Laminated device

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP2010122307A 2010-05-28 2010-05-28 仮基板の製造装置及び製造方法 Active JP5395745B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2010122307A JP5395745B2 (ja) 2010-05-28 2010-05-28 仮基板の製造装置及び製造方法
US13/115,287 US8539668B2 (en) 2010-05-28 2011-05-25 Apparatus for manufacturing temporary substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010122307A JP5395745B2 (ja) 2010-05-28 2010-05-28 仮基板の製造装置及び製造方法

Publications (3)

Publication Number Publication Date
JP2011249629A JP2011249629A (ja) 2011-12-08
JP2011249629A5 JP2011249629A5 (https=) 2013-02-07
JP5395745B2 true JP5395745B2 (ja) 2014-01-22

Family

ID=45020889

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010122307A Active JP5395745B2 (ja) 2010-05-28 2010-05-28 仮基板の製造装置及び製造方法

Country Status (2)

Country Link
US (1) US8539668B2 (https=)
JP (1) JP5395745B2 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8850695B1 (en) * 2010-01-05 2014-10-07 The Boeing Company Printed circuit board assembly tooling
JP5395745B2 (ja) * 2010-05-28 2014-01-22 新光電気工業株式会社 仮基板の製造装置及び製造方法
TWI411073B (zh) * 2010-08-13 2013-10-01 欣興電子股份有限公司 嵌埋被動元件之封裝基板及其製法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4541763B2 (ja) * 2004-01-19 2010-09-08 新光電気工業株式会社 回路基板の製造方法
JP4334005B2 (ja) * 2005-12-07 2009-09-16 新光電気工業株式会社 配線基板の製造方法及び電子部品実装構造体の製造方法
JP5057339B2 (ja) * 2008-07-31 2012-10-24 京セラSlcテクノロジー株式会社 配線基板の製造方法
JP5395745B2 (ja) * 2010-05-28 2014-01-22 新光電気工業株式会社 仮基板の製造装置及び製造方法

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JP2011249629A (ja) 2011-12-08
US20110289770A1 (en) 2011-12-01
US8539668B2 (en) 2013-09-24

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