JP5377052B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP5377052B2 JP5377052B2 JP2009100850A JP2009100850A JP5377052B2 JP 5377052 B2 JP5377052 B2 JP 5377052B2 JP 2009100850 A JP2009100850 A JP 2009100850A JP 2009100850 A JP2009100850 A JP 2009100850A JP 5377052 B2 JP5377052 B2 JP 5377052B2
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- 238000004519 manufacturing process Methods 0.000 title claims description 40
- 239000004065 semiconductor Substances 0.000 title claims description 33
- 229910052751 metal Inorganic materials 0.000 claims abstract description 87
- 239000002184 metal Substances 0.000 claims abstract description 87
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 56
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 56
- 239000010703 silicon Substances 0.000 claims abstract description 56
- 239000005871 repellent Substances 0.000 claims abstract description 30
- 230000001681 protective effect Effects 0.000 claims abstract description 25
- 238000000034 method Methods 0.000 claims description 41
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 claims description 27
- 230000008569 process Effects 0.000 claims description 27
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 26
- 238000001035 drying Methods 0.000 claims description 20
- 230000002940 repellent Effects 0.000 claims description 19
- 239000000126 substance Substances 0.000 claims description 19
- 239000007788 liquid Substances 0.000 claims description 17
- 239000006087 Silane Coupling Agent Substances 0.000 claims description 15
- 238000004140 cleaning Methods 0.000 claims description 9
- 238000000059 patterning Methods 0.000 claims description 9
- 239000007769 metal material Substances 0.000 claims description 8
- 239000002210 silicon-based material Substances 0.000 claims description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 5
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 5
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 3
- 229910021642 ultra pure water Inorganic materials 0.000 claims description 2
- 239000012498 ultrapure water Substances 0.000 claims description 2
- 239000010410 layer Substances 0.000 description 170
- 229910052721 tungsten Inorganic materials 0.000 description 36
- 239000010937 tungsten Substances 0.000 description 36
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 27
- 238000011282 treatment Methods 0.000 description 20
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 20
- -1 tungsten nitride Chemical class 0.000 description 16
- 238000006884 silylation reaction Methods 0.000 description 14
- 230000006870 function Effects 0.000 description 11
- 238000005530 etching Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 6
- 238000001312 dry etching Methods 0.000 description 6
- 229910005855 NiOx Inorganic materials 0.000 description 5
- 230000008859 change Effects 0.000 description 5
- 238000004380 ashing Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 239000011229 interlayer Substances 0.000 description 4
- 230000003647 oxidation Effects 0.000 description 4
- 238000007254 oxidation reaction Methods 0.000 description 4
- 238000001020 plasma etching Methods 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 239000012298 atmosphere Substances 0.000 description 3
- 230000004888 barrier function Effects 0.000 description 3
- 239000011810 insulating material Substances 0.000 description 3
- 238000001459 lithography Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000002904 solvent Substances 0.000 description 3
- 229910008051 Si-OH Inorganic materials 0.000 description 2
- 229910006358 Si—OH Inorganic materials 0.000 description 2
- 230000009471 action Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 125000002887 hydroxy group Chemical group [H]O* 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 125000000524 functional group Chemical group 0.000 description 1
- FFUAGWLWBBFQJT-UHFFFAOYSA-N hexamethyldisilazane Chemical compound C[Si](C)(C)N[Si](C)(C)C FFUAGWLWBBFQJT-UHFFFAOYSA-N 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 229910010272 inorganic material Inorganic materials 0.000 description 1
- 239000011147 inorganic material Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000009257 reactivity Effects 0.000 description 1
- 239000004094 surface-active agent Substances 0.000 description 1
- 150000003658 tungsten compounds Chemical class 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/02068—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
- H01L21/02071—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers the processing being a delineation, e.g. RIE, of conductive layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/101—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including resistors or capacitors only
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/906—Cleaning of wafer as interim step
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Memories (AREA)
- Cleaning Or Drying Semiconductors (AREA)
Description
図1は、本発明の第1の実施の形態に係る半導体装置の製造方法の手順を説明するフローチャートである。図2、図3及び図4は、半導体装置を製造する過程を説明する断面模式図である。本実施の形態は、上層に金属部材層13、下層にシリコン系部材層12を備える構造体からなるパターンの製造において、側壁膜17を形成する工程と、シリル化処理を施す工程とを含むことを特徴とする。本実施の形態に係る製造方法は、例えば、半導体装置であるReRAM(Resistance Random Access Memory)を製造する場合に適している。
F=2γcosθ・ΔH/S ・・・(1)
図6及び図7は、本発明の第2の実施の形態に係る半導体装置の製造方法による過程を説明する断面模式図である。本実施の形態は、第1金属部材層31、シリコン系部材層12及び第2金属部材層32を備える構造体からなるパターンの製造において、第2金属部材層32の表面に側壁膜17を形成する工程を含むことを特徴とする。第1の実施の形態と同一の部分には同一の符号を付し、重複する説明を省略する。
Claims (5)
- シリコン系材料を用いて構成されるシリコン系部材層を形成し、
前記シリコン系部材層の上に、金属材料を用いて構成される金属部材層を形成し、
前記金属部材層をパターニングし、
パターニングされた前記金属部材層の表面に、シリコン酸化膜またはシリコン窒化膜を有する側壁膜を形成し、
前記シリコン系部材層をパターニングすることにより、前記シリコン系部材層と、前記側壁膜で表面を覆われた前記金属部材層と、を備える構造体を形成し、
薬液を用いて前記構造体の表面を洗浄し、
前記構造体の表面の前記薬液を、液体を用いてリンスし、
前記液体が乾燥する前に、前記構造体の表面にシランカップリング剤を供給することにより、前記シリコン系部材層及び前記側壁膜の表面に撥水性保護膜を形成し、
前記撥水性保護膜が形成された前記構造体の表面をリンスし、
前記構造体の表面を乾燥させる、
工程を含む、半導体装置の製造方法。 - 金属材料を用いて構成される第1金属部材層を形成し、
前記第1金属部材層の上に、シリコン系材料を用いて構成されるシリコン系部材層を形成し、
前記シリコン系部材層の上に、金属材料を用いて構成される第2金属部材層を形成し、
前記第2金属部材層をパターニングし、
パターニングされた前記第2金属部材層の表面に、シリコン酸化膜またはシリコン窒化膜を有する側壁膜を形成し、
前記シリコン系部材層と、前記第1金属部材層と、をパターニングすることにより、前記第1金属部材層と、前記シリコン系部材層と、前記側壁膜で表面を覆われた前記第2金属部材層と、を備える構造体を形成し、
薬液を用いて前記構造体の表面を洗浄し、
前記構造体の表面の前記薬液を、液体を用いてリンスし、
前記液体が乾燥する前に、前記構造体の表面にシランカップリング剤を供給することにより、前記シリコン系部材層及び前記側壁膜の表面に撥水性保護膜を形成し、
前記撥水性保護膜が形成された前記構造体の表面をリンスし、
前記構造体の表面を乾燥させる、
工程を含む、半導体装置の製造方法。 - 前記液体は、超純水である、請求項1又は2に記載の半導体装置の製造方法。
- 前記薬液をリンスした後、前記シランカップリング剤を供給する前に、前記構造体の表面にイソプロピルアルコール或いはシンナーを供給する、請求項1〜3のいずれか一項に記載の半導体装置の製造方法。
- 前記構造体の表面を乾燥させた後、前記撥水性保護膜を除去する、請求項1〜4のいずれか一項に記載の半導体装置の製造方法。
Priority Applications (3)
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JP2009100850A JP5377052B2 (ja) | 2009-04-17 | 2009-04-17 | 半導体装置の製造方法 |
TW099104514A TWI399803B (zh) | 2009-04-17 | 2010-02-11 | Semiconductor device manufacturing method |
US12/715,727 US8097538B2 (en) | 2009-04-17 | 2010-03-02 | Method of manufacturing semiconductor device |
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JP2009100850A JP5377052B2 (ja) | 2009-04-17 | 2009-04-17 | 半導体装置の製造方法 |
Publications (2)
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JP2010251596A JP2010251596A (ja) | 2010-11-04 |
JP5377052B2 true JP5377052B2 (ja) | 2013-12-25 |
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Country Status (3)
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US (1) | US8097538B2 (ja) |
JP (1) | JP5377052B2 (ja) |
TW (1) | TWI399803B (ja) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2011199197A (ja) * | 2010-03-23 | 2011-10-06 | Toshiba Corp | 半導体記憶装置 |
JP2012124351A (ja) * | 2010-12-09 | 2012-06-28 | Toshiba Corp | 集積回路装置の製造方法 |
JP5782279B2 (ja) * | 2011-01-20 | 2015-09-24 | 株式会社Screenホールディングス | 基板処理方法および基板処理装置 |
JP5611884B2 (ja) * | 2011-04-14 | 2014-10-22 | 東京エレクトロン株式会社 | エッチング方法、エッチング装置および記憶媒体 |
JP5236841B1 (ja) * | 2011-10-11 | 2013-07-17 | パナソニック株式会社 | 半導体記憶素子の製造方法 |
JP6289241B2 (ja) * | 2013-06-20 | 2018-03-07 | 東京エレクトロン株式会社 | 液処理方法、液処理装置及び記憶媒体 |
JP6798185B2 (ja) * | 2016-08-08 | 2020-12-09 | 東京エレクトロン株式会社 | 液処理方法、基板処理装置及び記憶媒体 |
JP6770887B2 (ja) | 2016-12-28 | 2020-10-21 | 株式会社Screenホールディングス | 基板処理装置および基板処理システム |
US10163623B1 (en) * | 2017-10-31 | 2018-12-25 | Taiwan Semiconductor Manufacturing Co., Ltd. | Etch method with surface modification treatment for forming semiconductor structure |
KR102562023B1 (ko) * | 2018-01-30 | 2023-08-01 | 도쿄엘렉트론가부시키가이샤 | 기판 처리 방법, 기판 처리 장치 및 에칭액 |
JP7311988B2 (ja) * | 2019-03-20 | 2023-07-20 | 株式会社Screenホールディングス | 基板処理方法、半導体製造方法、および、基板処理装置 |
JP2023045882A (ja) | 2021-09-22 | 2023-04-03 | キオクシア株式会社 | 半導体装置およびその製造方法 |
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JPH06105683B2 (ja) | 1992-04-23 | 1994-12-21 | 株式会社ソルテック | レジストパターン形成方法 |
JPH06163391A (ja) * | 1992-05-13 | 1994-06-10 | Soltec:Kk | レジストパターン形成方法 |
JPH07142349A (ja) * | 1993-11-16 | 1995-06-02 | Mitsubishi Electric Corp | 現像工程におけるフォトレジストパターンの倒れを防止する方法 |
JPH07273083A (ja) | 1994-03-30 | 1995-10-20 | Nippon Telegr & Teleph Corp <Ntt> | 微細パターン形成法 |
US5747669A (en) * | 1995-12-28 | 1998-05-05 | Fujitsu Limited | Oxygen electrode and its manufacture |
JP3857692B2 (ja) * | 2004-01-15 | 2006-12-13 | 株式会社東芝 | パターン形成方法 |
JP2005340288A (ja) * | 2004-05-24 | 2005-12-08 | Sony Corp | 半導体装置の製造方法 |
US7517791B2 (en) * | 2004-11-30 | 2009-04-14 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
JP2008041722A (ja) * | 2006-08-02 | 2008-02-21 | Dainippon Screen Mfg Co Ltd | 基板処理方法および基板処理装置 |
JP2008112826A (ja) * | 2006-10-30 | 2008-05-15 | Elpida Memory Inc | 半導体装置の製造方法 |
JP5233127B2 (ja) * | 2007-02-06 | 2013-07-10 | セントラル硝子株式会社 | 低誘電率膜の改質剤及び製造方法 |
KR101010798B1 (ko) * | 2007-07-18 | 2011-01-25 | 주식회사 하이닉스반도체 | 플래시 메모리 소자의 제조 방법 |
JP2009063867A (ja) * | 2007-09-07 | 2009-03-26 | Seiko Epson Corp | 液晶装置の製造方法 |
US7838425B2 (en) | 2008-06-16 | 2010-11-23 | Kabushiki Kaisha Toshiba | Method of treating surface of semiconductor substrate |
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Publication number | Publication date |
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TWI399803B (zh) | 2013-06-21 |
TW201101376A (en) | 2011-01-01 |
US20100267233A1 (en) | 2010-10-21 |
US8097538B2 (en) | 2012-01-17 |
JP2010251596A (ja) | 2010-11-04 |
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