JP5354952B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP5354952B2 JP5354952B2 JP2008127551A JP2008127551A JP5354952B2 JP 5354952 B2 JP5354952 B2 JP 5354952B2 JP 2008127551 A JP2008127551 A JP 2008127551A JP 2008127551 A JP2008127551 A JP 2008127551A JP 5354952 B2 JP5354952 B2 JP 5354952B2
- Authority
- JP
- Japan
- Prior art keywords
- single crystal
- insulating layer
- layer
- semiconductor layer
- crystal semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
- H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
- H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/62—Fin field-effect transistors [FinFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/40—Crystalline structures
- H10D62/405—Orientations of crystalline planes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0167—Manufacturing their channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0188—Manufacturing their isolation regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/021—Manufacture or treatment of multiple TFTs
- H10D86/0214—Manufacture or treatment of multiple TFTs using temporary substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
- H10D86/425—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer having different crystal properties in different TFTs or within an individual TFT
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/411—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by materials, geometry or structure of the substrates
Landscapes
- Thin Film Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Element Separation (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008127551A JP5354952B2 (ja) | 2007-05-17 | 2008-05-14 | 半導体装置 |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007131229 | 2007-05-17 | ||
| JP2007131229 | 2007-05-17 | ||
| JP2008127551A JP5354952B2 (ja) | 2007-05-17 | 2008-05-14 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2008311638A JP2008311638A (ja) | 2008-12-25 |
| JP2008311638A5 JP2008311638A5 (enExample) | 2011-06-23 |
| JP5354952B2 true JP5354952B2 (ja) | 2013-11-27 |
Family
ID=39628780
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2008127551A Expired - Fee Related JP5354952B2 (ja) | 2007-05-17 | 2008-05-14 | 半導体装置 |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US7923781B2 (enExample) |
| EP (1) | EP1993130A3 (enExample) |
| JP (1) | JP5354952B2 (enExample) |
| KR (1) | KR101461206B1 (enExample) |
Families Citing this family (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2915318B1 (fr) * | 2007-04-20 | 2009-07-17 | St Microelectronics Crolles 2 | Procede de realisation d'un circuit electronique integre a deux portions de couches actives ayant des orientations cristallines differentes |
| JP5460984B2 (ja) | 2007-08-17 | 2014-04-02 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| JP2009076879A (ja) * | 2007-08-24 | 2009-04-09 | Semiconductor Energy Lab Co Ltd | 半導体装置 |
| JP5268305B2 (ja) | 2007-08-24 | 2013-08-21 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| US8232598B2 (en) * | 2007-09-20 | 2012-07-31 | Semiconductor Energy Laboratory Co., Ltd. | Display device and method for manufacturing the same |
| US8044464B2 (en) | 2007-09-21 | 2011-10-25 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| JP5394043B2 (ja) * | 2007-11-19 | 2014-01-22 | 株式会社半導体エネルギー研究所 | 半導体基板及びそれを用いた半導体装置、並びにそれらの作製方法 |
| JP2010056156A (ja) * | 2008-08-26 | 2010-03-11 | Renesas Technology Corp | 半導体装置およびその製造方法 |
| JP2010067930A (ja) * | 2008-09-12 | 2010-03-25 | Toshiba Corp | 半導体装置およびその製造方法 |
| JP5478199B2 (ja) * | 2008-11-13 | 2014-04-23 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| KR101837102B1 (ko) | 2009-10-30 | 2018-03-09 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 |
| US8912055B2 (en) * | 2011-05-03 | 2014-12-16 | Imec | Method for manufacturing a hybrid MOSFET device and hybrid MOSFET obtainable thereby |
| US8877603B2 (en) * | 2012-03-30 | 2014-11-04 | International Business Machines Corporation | Semiconductor-on-oxide structure and method of forming |
| US9041116B2 (en) * | 2012-05-23 | 2015-05-26 | International Business Machines Corporation | Structure and method to modulate threshold voltage for high-K metal gate field effect transistors (FETs) |
| US9275911B2 (en) * | 2012-10-12 | 2016-03-01 | Globalfoundries Inc. | Hybrid orientation fin field effect transistor and planar field effect transistor |
| US9941271B2 (en) | 2013-10-04 | 2018-04-10 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Fin-shaped field effect transistor and capacitor structures |
| US9443869B2 (en) | 2013-11-05 | 2016-09-13 | Taiwan Semiconductor Manufacturing Company Limited | Systems and methods for a semiconductor structure having multiple semiconductor-device layers |
| KR102757508B1 (ko) * | 2020-08-05 | 2025-01-20 | 삼성전자주식회사 | 반도체 메모리 소자 |
Family Cites Families (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01162376A (ja) * | 1987-12-18 | 1989-06-26 | Fujitsu Ltd | 半導体装置の製造方法 |
| JPH0590117A (ja) | 1991-09-27 | 1993-04-09 | Toshiba Corp | 単結晶薄膜半導体装置 |
| JP3017860B2 (ja) * | 1991-10-01 | 2000-03-13 | 株式会社東芝 | 半導体基体およびその製造方法とその半導体基体を用いた半導体装置 |
| JPH07297377A (ja) | 1994-04-21 | 1995-11-10 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
| JPH11145438A (ja) * | 1997-11-13 | 1999-05-28 | Shin Etsu Handotai Co Ltd | Soiウエーハの製造方法ならびにこの方法で製造されるsoiウエーハ |
| JP2000012864A (ja) | 1998-06-22 | 2000-01-14 | Semiconductor Energy Lab Co Ltd | 半導体装置の作製方法 |
| JP3432187B2 (ja) * | 1999-09-22 | 2003-08-04 | シャープ株式会社 | 半導体装置の製造方法 |
| US20020031909A1 (en) * | 2000-05-11 | 2002-03-14 | Cyril Cabral | Self-aligned silicone process for low resistivity contacts to thin film silicon-on-insulator mosfets |
| US6583440B2 (en) * | 2000-11-30 | 2003-06-24 | Seiko Epson Corporation | Soi substrate, element substrate, semiconductor device, electro-optical apparatus, electronic equipment, method of manufacturing the soi substrate, method of manufacturing the element substrate, and method of manufacturing the electro-optical apparatus |
| CN100403543C (zh) * | 2001-12-04 | 2008-07-16 | 信越半导体株式会社 | 贴合晶片及贴合晶片的制造方法 |
| US6908797B2 (en) * | 2002-07-09 | 2005-06-21 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing a semiconductor device |
| JP3927165B2 (ja) | 2003-07-03 | 2007-06-06 | 株式会社東芝 | 半導体装置 |
| US6821826B1 (en) * | 2003-09-30 | 2004-11-23 | International Business Machines Corporation | Three dimensional CMOS integrated circuits having device layers built on different crystal oriented wafers |
| US20050275018A1 (en) | 2004-06-10 | 2005-12-15 | Suresh Venkatesan | Semiconductor device with multiple semiconductor layers |
| DE102004031708B4 (de) * | 2004-06-30 | 2008-02-07 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zum Herstellen eines Substrats mit kristallinen Halbleitergebieten unterschiedlicher Eigenschaften |
| JP2006040911A (ja) | 2004-07-22 | 2006-02-09 | Renesas Technology Corp | 半導体装置及びその製造方法 |
| US7312487B2 (en) * | 2004-08-16 | 2007-12-25 | International Business Machines Corporation | Three dimensional integrated circuit |
| US7235433B2 (en) * | 2004-11-01 | 2007-06-26 | Advanced Micro Devices, Inc. | Silicon-on-insulator semiconductor device with silicon layers having different crystal orientations and method of forming the silicon-on-insulator semiconductor device |
| US7298009B2 (en) | 2005-02-01 | 2007-11-20 | Infineon Technologies Ag | Semiconductor method and device with mixed orientation substrate |
| US7432149B2 (en) * | 2005-06-23 | 2008-10-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | CMOS on SOI substrates with hybrid crystal orientations |
| JP4618105B2 (ja) | 2005-11-11 | 2011-01-26 | 三菱自動車工業株式会社 | 車両の旋回挙動制御装置 |
| JP2009076879A (ja) * | 2007-08-24 | 2009-04-09 | Semiconductor Energy Lab Co Ltd | 半導体装置 |
| US8232598B2 (en) * | 2007-09-20 | 2012-07-31 | Semiconductor Energy Laboratory Co., Ltd. | Display device and method for manufacturing the same |
-
2008
- 2008-03-26 KR KR1020080027873A patent/KR101461206B1/ko not_active Expired - Fee Related
- 2008-03-26 EP EP08005697A patent/EP1993130A3/en not_active Withdrawn
- 2008-03-27 US US12/078,085 patent/US7923781B2/en not_active Expired - Fee Related
- 2008-05-14 JP JP2008127551A patent/JP5354952B2/ja not_active Expired - Fee Related
-
2011
- 2011-03-30 US US13/075,460 patent/US8592907B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US7923781B2 (en) | 2011-04-12 |
| US20110175146A1 (en) | 2011-07-21 |
| EP1993130A2 (en) | 2008-11-19 |
| KR101461206B1 (ko) | 2014-11-12 |
| EP1993130A3 (en) | 2011-09-07 |
| US8592907B2 (en) | 2013-11-26 |
| US20080283958A1 (en) | 2008-11-20 |
| JP2008311638A (ja) | 2008-12-25 |
| KR20080101655A (ko) | 2008-11-21 |
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