JP5286321B2 - ビット検出及び同期のための方法及びシステム - Google Patents
ビット検出及び同期のための方法及びシステム Download PDFInfo
- Publication number
- JP5286321B2 JP5286321B2 JP2010089089A JP2010089089A JP5286321B2 JP 5286321 B2 JP5286321 B2 JP 5286321B2 JP 2010089089 A JP2010089089 A JP 2010089089A JP 2010089089 A JP2010089089 A JP 2010089089A JP 5286321 B2 JP5286321 B2 JP 5286321B2
- Authority
- JP
- Japan
- Prior art keywords
- samples
- zero
- buffer
- transitions
- bit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000001514 detection method Methods 0.000 title claims description 16
- 238000000034 method Methods 0.000 title claims description 16
- 230000007704 transition Effects 0.000 claims description 37
- 239000003550 marker Substances 0.000 claims description 7
- 230000001360 synchronised effect Effects 0.000 claims description 5
- 230000003139 buffering effect Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 9
- 238000012545 processing Methods 0.000 description 7
- 238000006243 chemical reaction Methods 0.000 description 4
- 238000012935 Averaging Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000005070 sampling Methods 0.000 description 2
- 238000003491 array Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000001186 cumulative effect Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 230000011664 signaling Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals
- H04L7/0338—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals the correction of the phase error being performed by a feed forward loop
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/424,071 | 2009-04-15 | ||
| US12/424,071 US8306171B2 (en) | 2009-04-15 | 2009-04-15 | Method and system for bit detection and synchronization |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2010252326A JP2010252326A (ja) | 2010-11-04 |
| JP2010252326A5 JP2010252326A5 (enExample) | 2013-02-28 |
| JP5286321B2 true JP5286321B2 (ja) | 2013-09-11 |
Family
ID=42751238
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010089089A Expired - Fee Related JP5286321B2 (ja) | 2009-04-15 | 2010-04-08 | ビット検出及び同期のための方法及びシステム |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US8306171B2 (enExample) |
| JP (1) | JP5286321B2 (enExample) |
| DE (1) | DE102010016354A1 (enExample) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8849226B2 (en) * | 2009-08-13 | 2014-09-30 | Cascoda Limited | Wireless receiver |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1577916A (en) * | 1978-01-18 | 1980-10-29 | Ibm | Data recognition apparatus |
| US4453550A (en) * | 1982-04-19 | 1984-06-12 | General Electric Company | Method and means for detecting a periodic wave structure |
| JP2680197B2 (ja) * | 1990-12-25 | 1997-11-19 | 株式会社日立製作所 | タイミング抽出回路、タイミング抽出方法およびそれを用いた通信システム |
| KR0148140B1 (ko) * | 1993-06-30 | 1998-09-15 | 김광호 | 심볼 타이밍 복구장치 |
| JP3347848B2 (ja) * | 1993-11-08 | 2002-11-20 | 株式会社ゼネラル リサーチ オブ エレクトロニックス | 多値信号復号回路 |
| US6058150A (en) * | 1997-09-30 | 2000-05-02 | Wireless Access, Inc. | Method and apparatus for combined timing recovery, frame synchronization and frequency offset correction in a receiver |
| JP3294566B2 (ja) * | 1999-05-28 | 2002-06-24 | 沖電気工業株式会社 | ビット位相同期装置 |
| KR100371300B1 (ko) * | 1999-06-21 | 2003-02-06 | 샤프 가부시키가이샤 | 비트동기회로 |
| JP3824204B2 (ja) * | 2000-05-09 | 2006-09-20 | 三菱電機株式会社 | 情報再生装置 |
| TW482902B (en) * | 2000-08-25 | 2002-04-11 | Ind Tech Res Inst | Dynamic period detecting method and detector |
| JP4489922B2 (ja) * | 2000-09-22 | 2010-06-23 | 株式会社日立国際電気 | 復調方法 |
| CN101044679B (zh) * | 2004-10-20 | 2012-04-18 | 半导体元件工业有限责任公司 | 高精度零交叉检测器及其方法 |
| US7453926B2 (en) * | 2005-06-01 | 2008-11-18 | Mediatek Incorporation | Bit synchronization detection methods and systems |
-
2009
- 2009-04-15 US US12/424,071 patent/US8306171B2/en not_active Expired - Fee Related
-
2010
- 2010-04-07 DE DE102010016354A patent/DE102010016354A1/de not_active Withdrawn
- 2010-04-08 JP JP2010089089A patent/JP5286321B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2010252326A (ja) | 2010-11-04 |
| DE102010016354A1 (de) | 2010-10-21 |
| US8306171B2 (en) | 2012-11-06 |
| US20100266079A1 (en) | 2010-10-21 |
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