JP5188095B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP5188095B2
JP5188095B2 JP2007115522A JP2007115522A JP5188095B2 JP 5188095 B2 JP5188095 B2 JP 5188095B2 JP 2007115522 A JP2007115522 A JP 2007115522A JP 2007115522 A JP2007115522 A JP 2007115522A JP 5188095 B2 JP5188095 B2 JP 5188095B2
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Japan
Prior art keywords
region
impurity
layer
element isolation
regions
Prior art date
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Expired - Fee Related
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JP2007115522A
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English (en)
Japanese (ja)
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JP2007318108A (ja
JP2007318108A5 (enExample
Inventor
舜平 山崎
康行 荒井
郁子 川俣
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP2007115522A priority Critical patent/JP5188095B2/ja
Publication of JP2007318108A publication Critical patent/JP2007318108A/ja
Publication of JP2007318108A5 publication Critical patent/JP2007318108A5/ja
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Publication of JP5188095B2 publication Critical patent/JP5188095B2/ja
Expired - Fee Related legal-status Critical Current
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  • Element Separation (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Thin Film Transistor (AREA)
  • Dram (AREA)
JP2007115522A 2006-04-28 2007-04-25 半導体装置 Expired - Fee Related JP5188095B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007115522A JP5188095B2 (ja) 2006-04-28 2007-04-25 半導体装置

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2006126984 2006-04-28
JP2006126984 2006-04-28
JP2007115522A JP5188095B2 (ja) 2006-04-28 2007-04-25 半導体装置

Publications (3)

Publication Number Publication Date
JP2007318108A JP2007318108A (ja) 2007-12-06
JP2007318108A5 JP2007318108A5 (enExample) 2010-06-17
JP5188095B2 true JP5188095B2 (ja) 2013-04-24

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ID=38851655

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007115522A Expired - Fee Related JP5188095B2 (ja) 2006-04-28 2007-04-25 半導体装置

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JP (1) JP5188095B2 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5486166B2 (ja) * 2008-06-16 2014-05-07 株式会社豊田中央研究所 半導体装置とその製造方法
US8415751B2 (en) * 2010-12-30 2013-04-09 Intel Corporation Method to reduce contact resistance of N-channel transistors by using a III-V semiconductor interlayer in source and drain
JP6448503B2 (ja) * 2015-09-10 2019-01-09 東芝メモリ株式会社 不揮発性半導体記憶装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5278077A (en) * 1993-03-10 1994-01-11 Sharp Microelectronics Technology, Inc. Pin-hole patch method for implanted dielectric layer
JPH0832072A (ja) * 1994-07-13 1996-02-02 Fuji Xerox Co Ltd 半導体装置
KR0154292B1 (ko) * 1995-06-20 1998-12-01 김주용 반도체 소자의 소자분리막 형성방법
JP2005129635A (ja) * 2003-10-22 2005-05-19 Seiko Epson Corp Ｓｏｉ半導体集積回路装置及びその製造方法

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Publication number Publication date
JP2007318108A (ja) 2007-12-06

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