JP5167671B2 - 半導体素子 - Google Patents
半導体素子 Download PDFInfo
- Publication number
- JP5167671B2 JP5167671B2 JP2007093349A JP2007093349A JP5167671B2 JP 5167671 B2 JP5167671 B2 JP 5167671B2 JP 2007093349 A JP2007093349 A JP 2007093349A JP 2007093349 A JP2007093349 A JP 2007093349A JP 5167671 B2 JP5167671 B2 JP 5167671B2
- Authority
- JP
- Japan
- Prior art keywords
- seal ring
- semiconductor substrate
- noise
- wiring
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/585—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/642—Capacitive arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/201—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits
- H10D84/204—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors
- H10D84/212—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors of only capacitors
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Semiconductor Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007093349A JP5167671B2 (ja) | 2006-10-31 | 2007-03-30 | 半導体素子 |
| US11/976,792 US7675143B2 (en) | 2006-10-31 | 2007-10-29 | Semiconductor element, semiconductor device and mounting board |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006296532 | 2006-10-31 | ||
| JP2006296532 | 2006-10-31 | ||
| JP2007093349A JP5167671B2 (ja) | 2006-10-31 | 2007-03-30 | 半導体素子 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2008135675A JP2008135675A (ja) | 2008-06-12 |
| JP2008135675A5 JP2008135675A5 (enExample) | 2010-01-28 |
| JP5167671B2 true JP5167671B2 (ja) | 2013-03-21 |
Family
ID=39329130
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007093349A Expired - Fee Related JP5167671B2 (ja) | 2006-10-31 | 2007-03-30 | 半導体素子 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US7675143B2 (enExample) |
| JP (1) | JP5167671B2 (enExample) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2009107182A1 (ja) * | 2008-02-28 | 2009-09-03 | パナソニック株式会社 | 電極パッドを有する半導体装置、及び該半導体装置を備えた無線回路装置 |
| US8188578B2 (en) * | 2008-05-29 | 2012-05-29 | Mediatek Inc. | Seal ring structure for integrated circuits |
| US8810001B2 (en) * | 2011-06-13 | 2014-08-19 | Mediatek Inc. | Seal ring structure with capacitor |
| US8530997B1 (en) * | 2012-07-31 | 2013-09-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Double seal ring |
| JP6026322B2 (ja) | 2013-03-12 | 2016-11-16 | ルネサスエレクトロニクス株式会社 | 半導体装置およびレイアウト設計システム |
| JP2015109496A (ja) * | 2013-12-03 | 2015-06-11 | 株式会社東芝 | 半導体装置 |
| JP5775139B2 (ja) * | 2013-12-16 | 2015-09-09 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| CN106876318B (zh) * | 2015-12-11 | 2020-05-08 | 中芯国际集成电路制造(北京)有限公司 | 半导体器件及其制造方法 |
| US20200075507A1 (en) * | 2018-08-30 | 2020-03-05 | Nanya Technology Corporation | Semiconductor device and method for preparing the same |
| CN111834359B (zh) * | 2020-08-03 | 2025-07-29 | 牛芯半导体(深圳)有限公司 | 电容版图结构 |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001085630A (ja) * | 1999-07-14 | 2001-03-30 | Matsushita Electric Ind Co Ltd | 半導体装置および半導体装置の製造方法 |
| JP2004179255A (ja) | 2002-11-25 | 2004-06-24 | Sony Corp | 半導体集積回路 |
| US20050110118A1 (en) | 2003-11-26 | 2005-05-26 | Texas Instruments Incorporated | Scribe seal providing enhanced substrate noise isolation |
| WO2006011320A1 (ja) * | 2004-07-30 | 2006-02-02 | Murata Manufacturing Co., Ltd. | 複合型電子部品及びその製造方法 |
| JP4689244B2 (ja) * | 2004-11-16 | 2011-05-25 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| JP2007059676A (ja) * | 2005-08-25 | 2007-03-08 | Matsushita Electric Ind Co Ltd | 半導体装置 |
| JP4949733B2 (ja) * | 2006-05-11 | 2012-06-13 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
-
2007
- 2007-03-30 JP JP2007093349A patent/JP5167671B2/ja not_active Expired - Fee Related
- 2007-10-29 US US11/976,792 patent/US7675143B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| US20080099886A1 (en) | 2008-05-01 |
| JP2008135675A (ja) | 2008-06-12 |
| US7675143B2 (en) | 2010-03-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP5167671B2 (ja) | 半導体素子 | |
| JP5064431B2 (ja) | 集積回路のシールリング構造 | |
| JP4141881B2 (ja) | 集積回路 | |
| JP5638205B2 (ja) | 半導体装置 | |
| US20050110119A1 (en) | Integrated circuit chip | |
| KR101337075B1 (ko) | 집적 커패시터의 차폐 | |
| CN203134790U (zh) | 半导体结构和芯片 | |
| US7355265B2 (en) | Semiconductor integrated circuit | |
| US7239005B2 (en) | Semiconductor device with bypass capacitor | |
| JP5124839B2 (ja) | 半導体装置 | |
| JP5339484B2 (ja) | 半導体装置およびバイパスキャパシタモジュール | |
| JP5008872B2 (ja) | 半導体集積装置 | |
| US7432551B2 (en) | SOI semiconductor device including a guard ring region | |
| US8357990B2 (en) | Semiconductor device | |
| JP6057779B2 (ja) | 半導体装置 | |
| KR100898313B1 (ko) | 반도체 소자의 레이아웃 | |
| JP2018125336A (ja) | 半導体チップ | |
| JP2005057254A (ja) | 半導体装置 | |
| JP2007049260A (ja) | 弾性表面波素子 | |
| HK1188870A (en) | Semiconductor seal ring design for noise isolation | |
| JP2006332079A (ja) | 半導体集積回路 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20091208 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20091208 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20120821 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20120829 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20121022 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20121127 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20121210 |
|
| R151 | Written notification of patent or utility model registration |
Ref document number: 5167671 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R151 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20160111 Year of fee payment: 3 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| LAPS | Cancellation because of no payment of annual fees |