JP5165868B2 - 誘電膜上のパッシベーション膜と共に金属−絶縁体−金属キャパシタ(metal−insulator−metalmimcapacitors)を形成する方法 - Google Patents
誘電膜上のパッシベーション膜と共に金属−絶縁体−金属キャパシタ(metal−insulator−metalmimcapacitors)を形成する方法 Download PDFInfo
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- JP5165868B2 JP5165868B2 JP2006208185A JP2006208185A JP5165868B2 JP 5165868 B2 JP5165868 B2 JP 5165868B2 JP 2006208185 A JP2006208185 A JP 2006208185A JP 2006208185 A JP2006208185 A JP 2006208185A JP 5165868 B2 JP5165868 B2 JP 5165868B2
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Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020050073498A KR100870178B1 (ko) | 2005-08-10 | 2005-08-10 | 엠아이엠 커패시터를 구비하는 반도체 소자들 및 그제조방법들 |
| KR10-2005-0073498 | 2005-08-10 | ||
| US11/413,282 | 2006-04-28 | ||
| US11/413,282 US7749852B2 (en) | 2005-08-10 | 2006-04-28 | Methods of forming metal-insulator-metal (MIM) capacitors with passivation layers on dielectric layers |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2007049139A JP2007049139A (ja) | 2007-02-22 |
| JP2007049139A5 JP2007049139A5 (enExample) | 2009-09-10 |
| JP5165868B2 true JP5165868B2 (ja) | 2013-03-21 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006208185A Expired - Fee Related JP5165868B2 (ja) | 2005-08-10 | 2006-07-31 | 誘電膜上のパッシベーション膜と共に金属−絶縁体−金属キャパシタ(metal−insulator−metalmimcapacitors)を形成する方法 |
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| JP (1) | JP5165868B2 (enExample) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6149578B2 (ja) * | 2013-07-30 | 2017-06-21 | 富士通セミコンダクター株式会社 | 電子デバイスの製造方法 |
| JP7272098B2 (ja) * | 2019-05-09 | 2023-05-12 | 富士通セミコンダクターメモリソリューション株式会社 | 半導体装置および半導体装置の製造方法 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3415551B2 (ja) * | 2000-03-27 | 2003-06-09 | 日本電気株式会社 | 半導体装置の製造方法 |
| JP3956118B2 (ja) * | 2002-07-23 | 2007-08-08 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 半導体装置の製造方法及びその半導体装置 |
| JP4037711B2 (ja) * | 2002-07-26 | 2008-01-23 | 株式会社東芝 | 層間絶縁膜内に形成されたキャパシタを有する半導体装置 |
| KR100505682B1 (ko) * | 2003-04-03 | 2005-08-03 | 삼성전자주식회사 | 금속-절연체-금속 커패시터를 포함하는 이중 다마신 배선구조 및 그 제조방법 |
| KR100532455B1 (ko) * | 2003-07-29 | 2005-11-30 | 삼성전자주식회사 | Mim 커패시터 및 배선 구조를 포함하는 반도체 장치의제조 방법 |
| JP2005079513A (ja) * | 2003-09-03 | 2005-03-24 | Seiko Epson Corp | 半導体装置及びその製造方法 |
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2006
- 2006-07-31 JP JP2006208185A patent/JP5165868B2/ja not_active Expired - Fee Related
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| JP2007049139A (ja) | 2007-02-22 |
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