JP5152887B2 - Surface modification method for single crystal silicon carbide substrate, method for forming single crystal silicon carbide thin film, ion implantation annealing method, single crystal silicon carbide substrate, single crystal silicon carbide semiconductor substrate - Google Patents

Description

  The present invention primarily relates to a method for modifying the surface of a single crystal silicon carbide (SiC) substrate.

  Silicon carbide (SiC) has excellent heat resistance and mechanical strength, is resistant to radiation, can easily control the valence electrons of electrons and holes by adding impurities, and has a wide band gap (6H-type single crystal SiC). About 3.0 eV and 3.3 eV for 4H type single crystal SiC. Therefore, it is said that it is possible to realize high temperature, high frequency, withstand voltage / environment resistance that cannot be realized with existing semiconductor materials such as silicon (Si) and gallium arsenide (GaAs). Expectation is growing as a semiconductor material.

Regarding a method of manufacturing a semiconductor device from this single crystal SiC substrate, a method of performing chemical etching with silane (SiH 4 ) has been generally known as a method for planarizing the surface of the single crystal SiC substrate and performing surface modification. ing.
JP 2005-277229 A

  However, the chemical etching using the above-mentioned conventional silane can only etch the carbon surface (C surface) of the surface of the single crystal SiC substrate, and cannot etch the silicon surface (Si surface). Accordingly, not only the improvement in throughput of semiconductor manufacturing or the like is hindered, but also the orientation of the single crystal SiC substrate has to be managed, so that it is inconvenient to handle the single crystal SiC substrate during surface modification. In addition, in the method using silane, it is difficult to meet the recently increasing needs for environmental load.

  The present invention has been made in view of the above circumstances, and its main object is to flatten not only the C surface of a single crystal SiC substrate but also the Si surface, and the load on the environment is small. An object of the present invention is to provide a surface modification method for a single crystal silicon carbide substrate.

Means and effects for solving the problems

  The problems to be solved by the present invention are as described above. Next, means for solving the problems and the effects thereof will be described.

According to the first aspect of the present invention, the following surface modification method for a single crystal silicon carbide substrate is provided. That is, removal of substrate surface defects of a single crystal silicon carbide wafer cut directly from a single crystal silicon carbide bulk ingot without requiring mechanical and chemical polishing (CMP) as a planarization process of the surface of the single crystal silicon carbide substrate. And a surface modification method of a single crystal silicon carbide substrate that forms a surface step shape morphology lost by cutting, wherein the crystal structure of the single crystal silicon carbide substrate is either 4H-SiC or 6H-SiC. The container surface to be surface-modified is a (0001) Si surface or a (000-1) C surface, and is made of tantalum metal and the upper and lower sides are fitted so that the tantalum carbide layer is exposed to the internal space. The single crystal silicon carbide substrate is housed in the container, the internal pressure of the storage container is higher than the external pressure, and the saturated vapor of silicon In includes a heat treatment step at a temperature of 1500 ° C. or higher 2300 ° C. or less while maintaining the vacuum of the lower including a heat treatment step of uniformly heating the container, the single crystal silicon carbide substrate surface at the molecular level precision by thermal etching to remove the substrate surface defects of the surface damage caused by mechanical cutting, step height on the entire substrate surface to form the following surface stepped shape morphology 0.5 nm, the arithmetic mean of the substrate surface A surface modification method for a single crystal silicon carbide substrate, characterized in that the roughness is 1.0 nm or less.
The substrate surface to be surface-modified is a (0001) Si plane or a (000-1) C plane. The crystal orientation of the substrate surface is just a (0001) Si plane or a (000-1) C plane. It includes the case of a plane and the case of a plane with an off angle on the (0001) Si plane or the (000-1) C plane.

According to the second aspect of the present invention, the following surface modification method for a single crystal silicon carbide substrate is provided. That is, the surface of the single crystal silicon carbide substrate that removes substrate surface defects caused by mechanical and chemical polishing in the planarization process of the surface of the single crystal silicon carbide substrate and forms the surface step shape morphology lost by the polishing process. In the modification method, the crystal structure of the single crystal silicon carbide substrate is either 4H—SiC or 6H—SiC, and the substrate surface to be surface modified is a (0001) Si plane or (000-1) C The single crystal silicon carbide substrate is housed in a housing container that is made of tantalum metal and is vertically fitted so that the tantalum carbide layer is exposed to the internal space, and the internal pressure of the storage container is set to be higher than the external pressure. Heating that uniformly heats the storage container at a temperature of 1500 ° C. or higher and 2300 ° C. or lower while maintaining a high vacuum under a saturated vapor pressure of silicon It includes a heat treatment step including management process, a single crystal silicon carbide substrate surface is thermally etched at the molecular level of accuracy, to remove the substrate surface defects of the surface damage caused by mechanical and chemical polishing, the substrate surface A surface modification method for a single crystal silicon carbide substrate, wherein a surface step shape morphology having a step height of 0.5 nm or less is formed as a whole, and the arithmetic average roughness of the substrate surface is 1.0 nm or less. .

Thereby, since not only the C surface of the single crystal silicon carbide substrate but also the Si surface can be planarized, a surface modification method having excellent flexibility can be provided. Furthermore, since surface modification is performed by heat treatment (thermal etching), the burden on the environment can be reduced well compared to the above-described chemical etching and the like. Further, in the heat treatment step, other impurities can be prevented from entering the container or the single crystal silicon carbide substrate, and a single crystal silicon carbide substrate with good quality can be obtained.
Further, impurities on the surface of the single crystal silicon carbide substrate can be removed and cleaned at the atomic level by heat treatment.

According to the 3rd viewpoint of this invention, the formation method of the following single crystal silicon carbide thin films is provided. That is, a method for forming a single crystal silicon carbide thin film on the single crystal silicon carbide substrate modified by the surface modification method by clogging and repairing micropipe defects of the substrate by vapor phase epitaxial growth. The single crystal silicon carbide substrate is placed close to a single crystal silicon carbide substrate facing a single crystal silicon carbide substrate in a storage container made of metal and having a tantalum carbide layer exposed to the internal space. A composite in which a gas phase atmosphere of silicon molecules is interposed in a gap between the substrate and the polycrystalline silicon carbide substrate is stored, and the internal pressure of the storage container is set to a vacuum higher than the external pressure and under the saturated vapor pressure of silicon. A heat treatment step including a heat treatment step of uniformly heat-treating the storage container at a temperature of 1500 ° C. to 2300 ° C. Method of forming a single crystal silicon carbide thin film, characterized in that the crystal closing the micropipe defects of the silicon carbide substrate surface single crystal silicon carbide thin film vapor phase epitaxy repair.

  Thereby, the micropipe that is difficult to remove only by the heat treatment step can be filled by vapor phase epitaxial growth of single crystal silicon carbide, and a single crystal silicon carbide substrate with better surface quality can be provided.

According to the 4th viewpoint of this invention, the formation method of the following single crystal silicon carbide thin films is provided. That is, a method of forming a single crystal silicon carbide thin film on the single crystal silicon carbide substrate modified by the surface modification method by clogging and repairing micropipe defects of the substrate by a liquid phase epitaxial growth method, The single crystal silicon carbide substrate is placed close to a single crystal silicon carbide substrate facing a single crystal silicon carbide substrate in a storage container made of metal and having a tantalum carbide layer exposed to the internal space. A composite in which a liquid melt of silicon molecules is interposed in a gap between the substrate and the polycrystalline silicon carbide substrate, and the internal pressure of the storage container is higher than the external pressure and a vacuum under a saturated vapor pressure of silicon. A heat treatment step including a heat treatment step for uniformly heat-treating the storage container at a temperature of 1500 ° C. to 2300 ° C. Method of forming a single crystal silicon carbide thin film, characterized by a micropipe defects of the silicon carbide substrate surface a liquid phase epitaxial growth was closed repair of single crystal silicon carbide thin film.

  Thereby, the micropipe that is difficult to remove only by the heat treatment step can be filled by liquid phase epitaxial growth of single crystal silicon carbide, and a single crystal silicon carbide substrate with better surface quality can be provided.

According to the fifth aspect of the present invention, the following surface modification method for a single crystal silicon carbide substrate is provided. That is, a surface modification method for a single crystal silicon carbide substrate in which the surface of the single crystal silicon carbide thin film obtained by clogging and repairing the micropipe defect by the method for forming a single crystal silicon carbide thin film is planarized to form a surface step shape morphology. The single crystal silicon carbide substrate is housed in a storage container made of tantalum metal and fitted vertically so that the tantalum carbide layer is exposed to the internal space, and the internal pressure of the storage container is higher than the external pressure and silicon. A heat treatment step including a heat treatment step for uniformly heat-treating the storage container at a temperature of 1500 ° C. or higher and 2300 ° C. or lower while maintaining a vacuum under the saturated vapor pressure of the single crystal silicon carbide thin film surface. and thermally etched with an accuracy of the single crystal to the height of the step the silicon carbide thin film surface following 0.5nm surface stearate Forming a flop shape morphology, surface modification method of the monocrystalline silicon carbide substrate, characterized in that the arithmetic mean roughness of the single crystal silicon carbide substrate film or less 1.0 nm.

Thus, after filling the micropipe by vapor phase epitaxial growth or liquid phase epitaxial growth of monocrystalline silicon carbide, again, by performing flattening by heat treatment, it can provide a further single crystal silicon carbide substrate of good surface quality .

According to the sixth aspect of the present invention, the following ion implantation annealing method is provided. That is, ion implantation annealing in which p-type or n-type semiconductor doping ions are implanted into the surface of the single crystal silicon carbide thin film in which the micropipe defects have been closed and repaired by the method for forming a single crystal silicon carbide thin film, and activation thermal annealing is performed. The method comprises: storing the single crystal silicon carbide substrate in a storage container made of tantalum metal and having a tantalum carbide layer exposed to the internal space; and the internal pressure of the storage container being external pressure A heat treatment step including a heat treatment step of uniformly heat-treating the storage container at a temperature of 1600 ° C. or higher and 2100 ° C. or lower in a state of being maintained at a vacuum higher than the saturated vapor pressure of silicon. The single crystal silicon carbide thin film doped with doping ions at the same time as the activation annealing of the doping ions of the type semiconductor Surface is thermally etched at the molecular level precision, the height of the step on the surface of the monocrystalline silicon carbide semiconductor substrate doping ions are implanted uniformly form the following surface stepped shape morphology 0.5 nm, the substrate An ion implantation annealing method, wherein the arithmetic average roughness is 1.0 nm or less.

  In the surface modification method for the single crystal silicon carbide substrate, the following is preferable. That is, the heat treatment step further includes a preheating step of heating the storage container storing the single crystal silicon carbide substrate at a temperature of 800 ° C. or more before the heat treatment step, The main heating chamber is preliminarily adjusted to a temperature of 1500 ° C. or higher and 2300 ° C. or lower under reduced pressure, and the heat treatment step is performed from the preheating chamber that performs the preheating step to the main heating chamber. Is done by moving.

  In the method of forming the single crystal silicon carbide thin film, the following is preferable. That is, the heat treatment step further includes a preheating step of heating the storage container storing the single crystal silicon carbide substrate at a temperature of 800 ° C. or more before the heat treatment step, The main heating chamber is preliminarily adjusted to a temperature of 1500 ° C. or higher and 2300 ° C. or lower under reduced pressure, and the heat treatment step is performed from the preheating chamber that performs the preheating step to the main heating chamber. Is done by moving.

  In the above ion implantation annealing method, the following is preferable. That is, the heat treatment step further includes a preheating step of heating the storage container storing the single crystal silicon carbide substrate at a temperature of 800 ° C. or more before the heat treatment step, The main heating chamber is preliminarily adjusted to a temperature of 1600 ° C. or higher and 2100 ° C. or lower under reduced pressure, and the heat treatment step is performed from the preheating chamber performing the preheating step to the main heating chamber. Is done by moving.

  Thus, heating in the main heating chamber can be performed quickly and smoothly by performing the preliminary heating step in advance and performing the heat treatment step by moving the container from the preheating chamber to the main heating chamber. .

In the surface modification method for the single crystal silicon carbide substrate, the following is preferable. That is, the heat treatment step is performed under a reduced pressure where the external pressure of the storage container is 10 ⁻⁴ Pa or less.

In the method of forming the single crystal silicon carbide thin film, the following is preferable. That is, the heat treatment step is performed under a reduced pressure where the external pressure of the storage container is 10 ⁻⁴ Pa or less.

In the above ion implantation annealing method, the following is preferable. That is, the heat treatment step is performed under a reduced pressure where the external pressure of the storage container is 10 ⁻⁴ Pa or less.

  Thereby, it can prevent that another impurity penetrate | invades in a container or a single crystal silicon carbide substrate in a heat treatment process, and can obtain a single crystal silicon carbide substrate with good quality.

  According to the seventh aspect of the present invention, the following single crystal silicon carbide substrate is provided. That is, a single crystal silicon carbide substrate whose surface is modified by the surface modification method described above.

According to the eighth aspect of the present invention, the following single crystal silicon carbide semiconductor substrate is provided. That is, a single crystal silicon carbide semiconductor substrate whose surface is modified by the ion implantation annealing method.

  Thus, good flatness can be realized, and for example, a single crystal silicon carbide substrate suitable as a light emitting diode, various semiconductor diodes, an electronic device, or the like can be provided.

  In the method of forming the single crystal silicon carbide thin film, the following is preferable. That is, in the heat treatment step, a liquid-phase melt of silicon molecules is interposed in a state where a gap is provided by a spacer between the single-crystal silicon carbide substrate and the polycrystalline silicon carbide substrate placed close to the single-crystal silicon carbide substrate. The single crystal silicon carbide thin film grown by liquid phase epitaxy is controlled to be thinner than the thickness of the spacer so that the growth is terminated and heating is stopped, and the heat treatment step is performed after the heat treatment step, The method further includes the step of directly heating the composite of the single crystal silicon carbide substrate and the polycrystalline silicon carbide substrate without storing the composite in the storage container. Thereby, a gap is formed by evaporating and vaporizing silicon between the single crystal silicon carbide substrate and the polycrystalline silicon carbide substrate in a vacuum, so that the single crystal silicon carbide substrate and the polycrystalline silicon carbide substrate are cooled. Peeling is easy.

In the ion implantation annealing process, doping ions of p-type or n-type semiconductors, aluminum, boron, or phosphorus at least containing Mukoto are preferred.

In the surface modification method for the single crystal silicon carbide substrate , the following is preferable. That is, the crystal orientation of the surface to be surface-modified in the single crystal silicon carbide substrate has a just plane or an off angle.

  Hereinafter, an embodiment of a surface modification method for a single crystal silicon carbide substrate according to the present invention will be described with reference to the drawings. First, an example of a heating furnace as a heat treatment apparatus suitable for performing the surface modification method of the present embodiment will be described with reference to the schematic cross-sectional view of FIG.

  In FIG. 1, the heating furnace 1 is mainly composed of a main heating chamber 2, a preheating chamber 3, and a front chamber 4 in a portion following the preheating chamber 3 to the main heating chamber 2. With this configuration, the storage container 16 in which the single crystal SiC substrate 15 and the like are stored sequentially moves from the preheating chamber 3 to the front chamber 4 and the main heating chamber 2, so that the single crystal SiC substrate 15 can be fixed in a short time. It can be heated at a temperature (1500 ° C. to 2300 ° C., preferably 1700 ° C. to 1900 ° C., for example, about 1800 ° C.).

  In this heating furnace 1, as shown in FIG. 1, the connecting portion between the main heating chamber 2 and the front chamber 4 and the connecting portion between the front chamber 4 and the preheating chamber 3 each have a communication portion and are partitioned. It has been. For this reason, each of the chambers 2, 3, and 4 can be controlled in advance under a predetermined pressure. If necessary, the pressure can be adjusted for each of the chambers 2, 3, and 4 by providing a gate valve 7 for each chamber. As a result, when the storage container 16 storing the single crystal SiC substrate 15 or the like is moved, the inside of the furnace under a predetermined pressure can be moved by an appropriate moving means (not shown) without touching the outside air. Mixing can be suppressed.

The preheating chamber 3 is provided with a halogen lamp 6 as a heating means. With this configuration, a temperature within a predetermined range (for example, a range of about 800 ° C. to 1000 ° C.) under a reduced pressure of about 10 ⁻² Pa or less. Inner) can be heated rapidly. As described above, the gate valve 7 is provided at the connecting portion between the preheating chamber 3 and the front chamber 4 to facilitate the pressure control of the preheating chamber 3 and the front chamber 4.

  The storage container 16 in which the single crystal SiC substrate 15 or the like is stored is preheated to about 800 ° C. or higher in the state of being placed on the table 8 in the preheating chamber 3. Thereafter, pressure adjustment between the preheating chamber 3 and the front chamber 4 is performed, and after the adjustment is completed, the preheating chamber 3 and the front chamber 4 are moved so as to be placed on a liftable susceptor 9 provided in the front chamber 4.

The storage container 16 moved to the front chamber 4 is moved from the front chamber 4 to the main heating chamber 2 together with the susceptor 9 by a lifting / lowering moving means 10 partially shown. The main heating chamber 2 is preliminarily adjusted under a reduced pressure of about 10 ⁻⁴ Pa by a vacuum pump (not shown), and the temperature is adjusted to a desired temperature (for example, 1800 ° C.) by the heater 11.

The pressure environment of the main heating chamber 2 is preferably a vacuum of about 10 ⁻⁴ Pa or less, but may be a vacuum of about 10 ⁻² Pa or less, for example. Further, for example, after a vacuum of about 10 ⁻² Pa or less, preferably about 10 ⁻⁴ Pa or less, a rare gas atmosphere into which some inert gas is introduced may be used.

  The state of the main heating chamber 2 is set in this way, and the storage container 16 is moved from the front chamber 4 into the main heating chamber 2 by the moving means 10 at a high speed, whereby the storage container 16 is moved to the desired chamber. It can be heated rapidly to the temperature in a short time.

  In the main heating chamber 2, a reflecting mirror 12 is installed around the heater 11, and reflects the heat from the heater 11 to the single crystal SiC substrate 15 side located inside the heater 11. The heat is concentrated. The reflecting mirror 12 is preferably formed of gold-plated refractory metal such as W, Ta or Mo, or high heat resistant carbide such as WC, TaC or MoC. Further, a window 17 is provided in the main heating chamber 2, and the internal temperature of the main heating chamber 2 can be measured by an infrared radiation thermometer 18 installed outside the main heating chamber 2.

  The fitting portion 25 between the moving means 10 and the main heating chamber 2 includes a convex stepped portion 21 provided in the moving means 10 and a concave stepped portion 22 formed in the main heating chamber 2. It consists of and. Further, in order to seal the heating chamber 2, an unillustrated seal member (for example, an O-ring) is provided at each step portion of the stepped portion 21 of the moving means 10.

  A contaminant removal mechanism 29 is provided inside the heater 11 in the main heating chamber 2. The contaminant removal mechanism 29 removes impurities discharged out of the storage container 16 from the single crystal SiC substrate 15 or the like during the heat treatment so as not to come into contact with the heater 11. Thereby, it is possible to prevent the heater 11 from reacting with the impurities and deteriorating. The contaminant removal mechanism 29 is not particularly limited as long as it can adsorb impurities discharged from the single crystal SiC substrate 15 or the like.

  The heater 11 is a resistance heater made of metal such as W or Ta, and includes a base heater 11a installed on the susceptor 9 side and an upper heater 11b provided on the main heating chamber 2 side. . When the storage container 16 moves upward together with the base heater 11 a to the main heating chamber 2 by the moving means 10, the storage container 16 is surrounded by the heater 11. With such a layout of the heater 11, it is possible to control the temperature distribution in the heating region to be uniform with high accuracy in combination with the reflector 12 described above. As a result, the storage container 16 can be heated uniformly, and variations and unevenness in the surface modification of the internal single crystal SiC substrate 15 can be reduced. Note that the heating method of the main heating chamber 2 is not limited to the resistance heater, and for example, a high frequency induction heating type can be adopted.

  Next, the storage container 16 and the single crystal SiC substrate 15 disposed inside the storage container 16 will be described with reference to FIG. 2 and the like. FIG. 2 is a perspective view of the storage container with the upper and lower containers removed. FIG. 3 is a schematic cross-sectional view showing the state of the storage container before the heat treatment.

  The aforementioned storage container 16 is configured by fitting an upper container 16a and a lower container 16b as shown in FIGS. The shape of the storage container 16 is substantially hexahedral as shown in the figure, but this is an example, and it may be configured in a cylindrical shape, for example.

  The storage container 16 is made of tantalum metal, and the entire surface thereof is covered with a tantalum carbide layer 31 as shown in FIG. A portion of the tantalum carbide layer 31 that covers the inner surfaces of the upper container 16 a and the lower container 16 b is exposed in the internal space of the storage container 16.

In this internal space, a single crystal SiC substrate 15 as a processing target and a silicon pellet 14 as a Si supply source are arranged. Single crystal SiC substrate 15 may be one cut directly from a single crystal silicon carbide bulk ingot without requiring mechanical and chemical polishing as a flattening process of the surface (CM P), as a process of planarizing the surface May have been subjected to mechanical and chemical polishing ( CMP ). As the crystal structure of the single crystal SiC substrate 15, 4H—SiC is used in the present embodiment, but 6H—SiC may be used. Further, the surface crystal orientation of single crystal SiC substrate 15 may have a just plane or an off angle.

  The single crystal SiC substrate 15 is arranged such that the upper surface is a Si surface (for example, (0001) plane, reference numeral 15Si) and the lower surface is a C plane (for example, (000-1) plane, reference numeral 15C). The Si surface and C surface are polished to a mirror surface, and oils, oxide films, metals, etc. adhering to the surface are removed by washing or the like.

  A spacer 13 is interposed between the single crystal SiC substrate 15 and the inner bottom surface of the lower container 16 b, and an appropriate gap is formed below the single crystal SiC substrate 15. Therefore, both the upper surface (Si surface indicated by reference numeral 15Si) and the lower surface (C surface indicated by reference numeral 15C) of the single crystal SiC substrate 15 are sufficiently exposed to the internal space of the storage container 16.

  In addition, it is preferable that the play of a fitting part when the upper container 16a and the lower container 16b are fitted together as shown in FIG. 3 is about 2 mm or less. Thereby, a substantially sealed state is realized, and in the heat treatment process in the main heating chamber 2, the Si pressure in the storage container 16 is increased to a pressure higher than the external pressure (pressure in the main heating chamber 2). Impurities can be prevented from entering the storage container 16 through the fitting portion.

  FIG. 4A is an enlarged cross-sectional view of a crystal showing an example of a tantalum metal as a material substrate of the storage container 16 and a tantalum layer covering the surface thereof. As shown in FIG. 4A, a tantalum carbide layer is formed on the surface side (left side in the figure) of the tantalum metal Ta. A Ta2C layer is formed as a first layer, and a Ta4C3 layer is formed as a second layer on the surface. A layer is formed, and a TaC layer is formed on the outermost third layer, so that a gradient composition is realized.

FIG. 4B shows an example of a carbon molecule concentration distribution from the first layer to the third layer of the tantalum carbide layer as a graph. In this graph, an initial stage (solid line) in which carbon molecules are adsorbed on the surface of the tantalum carbide layer 31 of the storage container 16 and diffused and carburized inside the container material, and a stable stage (broken line) The concentration distribution for the two cases is shown. Further, this graph shows the positional relationship substantially corresponding to the enlarged cross-sectional view of FIG.

As shown by the solid line in this graph, in the initial stage with silicon carbide vapor adhering to the surface of the tantalum carbide layer, the surface of the tantalum carbide layer (the surface of the TaC layer, where the depth is zero) A high-temperature catalytic reaction occurred and silicon carbide vapor was decomposed into carbon molecules and silicon molecules, and the carbon molecules were selectively adsorbed on the tantalum carbide layer, but the adsorption concentration of carbon molecules in the tantalum carbide layer was the stoichiometry of carbon and tantalum. 50% corresponding to the ratio of 1: 1 is the limit, and no more can adsorb carbon molecules. However, if the storage container is held at a reduced pressure of about 10 ⁻⁴ Pa at a temperature of 1800 ° C., for example, carbon atoms and tantalum molecules are equalized and bonded to the stable compound, and as shown by the broken line in the graph, the Ta 2 C layer・ Ta4C3 layer and TaC layer have equilibrium concentrations (stable stage). Along with this, the concentration of carbon molecules on the surface of the tantalum carbide layer (the surface of the TaC layer) decreases from 50%, and the carbon molecules can be adsorbed again.

  Thus, the storage container 16 of the present embodiment has a function of continuously adsorbing and taking in carbon molecules from the surface of the tantalum carbide layer 31 as long as the high temperature treatment is continued under vacuum. In this sense, it can be said that the storage container 16 of this embodiment has a carbon molecule adsorption ion pump function (ion getter function).

An example of temperature control of the main heating chamber 2 and the preheating chamber 3 is shown as a graph in FIG. 5, and the preheating step and the heat treatment step (thermal etching step) will be described below with reference to FIG. That is, the storage container 16 containing the single crystal SiC substrate 15 and the silicon pellet 14 is subjected to a predetermined temperature (for example, about 800 ° C.) under a reduced pressure of about 10 ⁻² Pa or less by the halogen lamp 6 in the preheating chamber 3. (Preheating process). In parallel with this, the main heating chamber 2 is heated to a predetermined temperature (for example, about 1800 ° C.) by the heater 11 and adjusted to be under a reduced pressure of about 10 ⁻⁴ Pa or less.

  Thereafter, the storage container 16 in the preheating chamber 3 is moved to the main heating chamber 2 by the moving means 10 or the like and rapidly heated to 1800 ° C. (heat treatment step). Then, the silicon pellet 14 in the storage container 16 melts when it reaches about 1450 ° C. The inner space of the storage container 16 is kept in a vacuum under the silicon saturated vapor pressure, coupled with the fact that the play of the fitting portion between the upper container 16a and the lower container 16b is set to about 2 mm or less.

Since the heating chamber 2 is under a reduced pressure of about 10 ⁻⁴ Pa or less as described above, other impurities are prevented from entering the storage container 16 or the single crystal SiC substrate 15. .

When the single crystal SiC substrate 15 is heat-treated at about 1800 ° C. while maintaining the internal space of the storage container 16 in a vacuum under a silicon saturated vapor pressure as described above, the surface (Si surface and C surface) is flat at the molecular level. It is possible to obtain a single crystal SiC substrate 15 that is thermally etched to a degree and smooth to the molecular level. That is, interface defects formed on the surface of the single crystal SiC substrate 15 before processing, surface defects such as polishing marks, scratches, and surface roughness of wafer polishing can be improved, and the single crystal SiC substrate 15 having an extremely flat surface is obtained. can get.

The principle for realizing such surface modification is as follows. That is, if the single crystal SiC substrate 15 is simply heated and thermally etched, the evaporation of SiC exhibits the following basic reaction.
SiC → Si + C
SiC → Si + SiC 2
SiC + Si → Si 2 C
As shown in FIG. 6, the partial pressure on the surface of the single crystal SiC substrate in vacuum is about 1 Pa for Si, about 10 ⁻¹ Pa for Si 2 C, and about 10 ⁻² Pa for SiC 2 at a temperature of 1,600 ° C. And the silicon partial pressure is higher than that of one-digit or two-digit silicon carbide.
From another point of view, the temperatures required for the partial pressure on the surface of the single crystal SiC substrate to be 1 Pa are 1,600 ° C. for Si, 1,800 ° C. for Si 2 C, and 2,000 for SiC 2. The evaporation of silicon carbide starts at a low temperature, and evaporation of silicon carbide starts at a temperature 200 to 400 ° C. higher than that of silicon.
Since this evaporation time lag occurs, silicon molecules on the surface of the single crystal SiC substrate 15 are lost, which causes surface roughness.

On the other hand, in the heat treatment process of the present embodiment, the internal space of the storage container 16 is maintained at the silicon saturated vapor pressure by the evaporation of silicon vapor from the silicon pellets 14 installed inside the storage container 16. The evaporation of silicon molecules from the surface of the crystalline SiC substrate 15 is suppressed. Further, since the tantalum carbide layer 31 is exposed in the internal space of the storage container 16, only carbon molecules are evaporated from the silicon carbide vapor evaporated from the single crystal SiC substrate 15 and existing in the internal space of the storage container 16. It is selectively taken into the tantalum carbide layer 31 on the surface of the storage container 16. It has been confirmed that this phenomenon is that tantalum carbide acts as a thermal catalyst to decompose silicon carbide into silicon molecules and carbon molecules, and only the carbon molecules are diffused and absorbed through the tantalum carbide layer 31 into the tantalum metal. At this time, it was also confirmed that the silicon molecules did not react at all with the tantalum carbide layer 31. Furthermore, for example, by being heated to 1800 ° C. and placed in an environment under a reduced pressure of about 10 ⁻⁴ Pa or less, the carbon molecules are inclined to the tantalum metal inside the tantalum carbide material of the storage container 16 as described above. Is taken in while straddling the stable phase boundary of each layer, and is continuously occluded in the material of the storage container 16 during the heat treatment.

  As a result, the internal space of storage container 16 is kept in an atmosphere in which only silicon carbide vapor evaporates while suppressing evaporation of silicon vapor from the surface of single crystal SiC substrate 15. As a result, only silicon carbide evaporates from the surface of single crystal SiC substrate 15. In addition, since the carbon molecules are separated from the silicon molecules by the catalytic action of tantalum carbide and selectively taken into the tantalum carbide layer 31 on the surface of the storage container 16, the silicon vapor pressure is always kept high in the internal space of the storage container 16. It is automatically kept at the silicon saturated vapor pressure. As described above, it is possible to obtain an extremely flat surface that is free from roughening due to silicon evaporation.

  In addition, when the storage container 16 after an actual heat treatment process was taken out and the inner surface (the surface of the tantalum carbide layer 31) was observed, it was recognized that the silicon of the condensed phase adhered to the entire surface. This fact is also considered to support the above principle.

FIG. 7 (a) is an AFM enlarged photograph of single crystal silicon carbide surface basal plane defects (innumerable mechanical cutting flaws) after surface mechanical polishing, and FIG. 7 (b) is after thermal etching surface modification processing. 1 is a uniform AFM photograph of a 0.25 nm high step of a single crystal silicon carbide surface. In FIG. 7 (b), that the single crystal silicon carbide substrate surface is thermally etched at the molecular level of accuracy, lost by cutting process with the substrate surface defects of the surface damage caused by mechanical cutting are removed the prompting the crystal growth is to surface steps form Moff O biology are uniformly formed on the entire surface. Therefore, the surface flatness of the single crystal silicon carbide substrate is modified to the sub-nanoorder molecular level.

  What should be noted in the surface modification method of this embodiment is not only the C-plane (reference numeral 15C) of the surface of the single crystal SiC substrate 15, but also Si that was impossible by conventional chemical etching with SiH4. The surface (reference numeral 15Si) can also be flattened. As a result, the flexibility of surface modification is increased, and it becomes possible to simultaneously modify the C surface and the Si surface, and an extremely excellent throughput can be obtained. In addition, since it is not necessary to distinguish between the Si plane and the C plane, handling of the single crystal SiC substrate 15 is facilitated.

  FIG. 8A shows the Si surface of the single-crystal SiC substrate 15 between atoms when the heating time in the main heating chamber 2 is constant at 15 minutes and the heating temperature is increased stepwise from 1000 ° C. to 2000 ° C. It is the surface photograph image | photographed with the force microscope (AFM).

As the single crystal SiC substrate 15, a 4H-SiC substrate was used, and each photograph was taken in the range of 10 × 10 μm on the surface. Further, for some conditions, the arithmetic average roughness Ra of the obtained surface was measured, and the result was shown as a numerical value (unit: nm) at the lower right of the photograph. The same applies to FIGS. 8B, 9A, and 9B described later.

As shown in FIG. 8 (a), it is recognized that there are polishing scratches on the surface at 1000 ° C. and 1200 ° C., and the arithmetic average roughness of the surface also shows a large value of 1.01-1.17 nm. ing. On the other hand, when the processing temperature is raised to 1600 ° C. or higher, no scratches are observed in the photograph, and the arithmetic average roughness of the surface is also a good value of 0.17 to 0.62 nm (ultrafine surface uniformity at the molecular size level). Quality). Although experimental results at temperatures higher than 2000 ° C. are not shown, it has been found that good results can be obtained even at a processing temperature of 2100 ° C. That is, the processing temperature in the heating chamber 2 is preferably 1500 ° C. or higher and 2300 ° C. or lower. Further, from the viewpoint of obtaining a better surface, the treatment temperature is preferably 1700 ° C. or higher and 2000 ° C. or lower.

  FIG. 8B shows that the Si surface of the single crystal SiC substrate 15 is atomic when the heating temperature in the main heating chamber 2 is constant at 1800 ° C. and the heating time is increased stepwise from 3 minutes to 60 minutes. It is the surface photograph image | photographed with the atomic force microscope (AFM). As shown in FIG. 8B, when the processing temperature is 1800 ° C., it can be seen that good surface roughness can be obtained if the processing temperature is in the range of 3 minutes to 60 minutes.

  FIGS. 9A and 9B show the state of the C-plane of the single crystal SiC substrate 15 in the experiments of FIGS. 8A and 8B. From this experimental result, it can be seen that, by setting the processing temperature in the main heating chamber 2 to 1500 ° C. or more and 2300 ° C. or less, good flatness can be obtained also for the C plane. It can also be seen that if the processing temperature is in the vicinity of 1800 ° C., a C-plane with good flatness can be obtained even if the processing time is changed in the range of 3 minutes to 60 minutes.

The AFM surface photograph of FIG. 10A shows the Si surface of a single-crystal SiC substrate having a crystal structure of 4H—SiC that has been subjected to the thermal etching process described above. Similarly, the AFM surface photograph of FIG. 10B shows the Si surface of the 6H—SiC substrate that has been similarly subjected to thermal etching. In any photograph, it can be seen that a good surface in which no polishing scratches are observed is obtained. As shown in these photographs, the surface modification method of this embodiment can be suitably applied to any crystal structure of 4H—SiC and 6H—SiC.

  As shown in FIG. 10A, in the step structure of the Si surface of the 4H—SiC single crystal SiC substrate, each step is formed to extend in a predetermined direction from the left to the right of the page. Has been. As shown in FIG. 10B, in the step structure of the Si surface of the 6H—SiC single crystal SiC substrate, each step is formed so as to extend in a predetermined direction from the lower left to the upper right of the page. Yes. In any single crystal SiC substrate having any crystal structure, the plurality of steps are regularly arranged in a direction intersecting with the extending direction.

11, Si surface of the single crystal 4H-SiC which surface modification was performed by the method described above, in particular a scanning electron microscope (SEM) photograph showing a Moff O biology of (0001) plane. As shown in FIG. 11, a very flat terrace and step structure can be observed on the surface of the single crystal SiC substrate 15 subjected to the above surface modification. Note that the height of the above step is an integral multiple of about 0.5 nm based on half the height of the unit cell of SiC molecules (the height of one molecular layer of SiC is 0.25 nm). the following Moff O biology surface (ultrafine Moff O biology surface) is realized.

  Here, “terrace” refers to a step having a wide width among a plurality of steps. As shown by the white arrow in each photograph in FIG. 11, in the comparison between the processing temperature of 1500 ° C. and 1700 ° C., the terrace width formed at the time of processing at 1700 ° C. is larger than the terrace width formed at the time of processing at 1500 ° C. It can be seen that is larger.

Next, the vapor phase epitaxial growth process will be described. That is, for the single crystal SiC substrate subjected to the above-described thermal etching treatment, the substrate can be used as a seed crystal and further processed by vapor phase epitaxial growth on the surface thereof.

The vapor phase epitaxial growth process will be described in detail. As shown in FIG. 12, the single crystal SiC substrates 15a and 15b subjected to the above thermal etching process are now brought close to or in close contact with the polycrystalline SiC substrate 32. The container 16 is housed and arranged inside the container 16. The storage container 16 has a configuration in which an upper container 16a and a lower container 16b are fitted to each other, and a play of the fitting portion is set to about 2 mm or less. The storage container 16 is preferably made of tantalum or tantalum carbide. Further, as the shape of the storage container 16, for example, it may be a hexahedral shape, a cylindrical shape, or the like.

  FIG. 12 discloses a stacked example in which the polycrystalline SiC substrate 32 and the single crystal SiC substrates 15a and 15b are alternately arranged. One single crystal SiC substrate 15a has a 6H—SiC crystal structure, and the other single crystal SiC substrate 15b has a 4H—SiC crystal structure. Although FIG. 12 shows a case where two single crystal SiC substrates 15a and 15b are processed at a time, one substrate may be processed alone, or three or more substrates are processed at a time. You may laminate | stack.

  As the polycrystalline SiC substrate 32, for example, a substrate cut out to a desired size from SiC used as a dummy wafer in a Si semiconductor manufacturing process manufactured by a CVD method can be used. The polycrystalline SiC substrate 32 preferably has an average particle diameter of 1 μm to 10 μm and a uniform particle diameter. Furthermore, as the crystal structure of the polycrystalline SiC substrate 32, any of 4H—SiC, 6H—SiC, and 3C—SiC can be used.

  The surface of the polycrystalline SiC substrate 32 facing the single crystal SiC substrate 15a / 15b side is polished to a mirror surface in advance, and oils, oxide films, metals, etc. adhering to the surface are removed by washing or the like. .

  The single crystal SiC substrates 15a and 15b and the upper and lower polycrystalline SiC substrates 32 are arranged close to each other. Specifically, spacers 13 are interposed between the single crystal SiC substrates 15a and 15b and the upper and lower polycrystalline SiC substrates 32, and a predetermined gap is formed between the substrates by the spacers 13. . Specifically, the size of the gap is preferably within 0.6 mm, and more preferably within 0.3 mm. Further, the spacer 13 may be omitted, and the gap may be zero (that is, close).

As described above, the storage container 16 in which the single crystal SiC substrates 15 a and 15 b and the polycrystalline SiC substrate 32 are stacked is set in the preheating chamber 3 of the heating furnace 1. The storage container 16 is preheated to 800 ° C. or higher in the preheating chamber 3, and the main heating chamber 2 is preferably set to a predetermined temperature (1500 ° C. to 2300 ° C., preferably 1700 ° C. to 1900 ° C. The temperature is preferably increased to the following temperature. Further, the main heating chamber 2 is adjusted to a predetermined reduced pressure (preferably 10 ⁻⁴ Pa or less).

  Then, the storage container 16 in the preheating chamber 3 is moved to the main heating chamber 2 and rapidly heated to the predetermined temperature by the heater 11. By performing the temperature raising process, SiC molecules are sublimated from the polycrystalline SiC substrate 32, and the sublimated SiC molecules are grown in a vapor phase on the surfaces of the single crystal SiC substrates 15a and 15b to form a single crystal SiC thin film. . Thereafter, the spacer 13 and the polycrystalline SiC substrate 32 are removed to obtain processed single crystal SiC substrates 15a and 15b.

Note that the single crystal SiC substrate 15a · 15b includes a number of micropipe from the previous stage of the thermal etching treatment, the micro-pipe is difficult to remove by thermal etching process described above. Therefore , even after the thermal etching process, micropipes are opened on the surfaces of the single crystal SiC substrates 15a and 15b.

  However, by performing the heat treatment in the state of FIG. 12A, vapor phase epitaxial growth by sublimated SiC molecules is performed, and the single crystal SiC substrates 15a and 15b are formed on the surfaces of the single crystal SiC substrates while filling the openings of the micropipes. A thin film is formed. That is, the micropipe defect (a) on the substrate surfaces of the single crystal SiC substrates 15a and 15b in FIG. 12B is repaired by the single crystal SiC vapor thin film (b). FIG. 12C is a graph showing a relationship between the state of vapor phase epitaxial growth filling the opening of the micropipe and the heat treatment temperature condition.

  As a result, it is possible to provide high-quality and high-performance single-crystal SiC substrates 15a and 15b that have an extremely flat surface that is surface-modified and have few micropipe defects.

  Next, the liquid phase epitaxial growth process will be described. That is, the single crystal SiC substrate that has been subjected to the above-described vapor phase epitaxial growth treatment can be further subjected to liquid phase epitaxial growth on the surface thereof.

  The liquid phase epitaxial growth process will be described in detail. As shown in FIG. 13, the single crystal SiC substrate 15a subjected to the vapor phase epitaxial growth process is sandwiched between two polycrystalline SiC substrates 32 and 32. And stored in the storage container 16. Note that FIG. 13 illustrates the case of the single crystal SiC substrate 15a having a 6H—SiC crystal structure, but the same liquid phase epitaxial growth process can be performed on the single crystal SiC substrate 15b having a 4H—SiC crystal structure.

As described above, the storage container 16 in which the single crystal SiC substrate 15 a and the polycrystalline SiC substrate 32 are stacked is set in the preheating chamber 3 of the heating furnace 1. The storage container 16 is preheated to 800 ° C. or higher in the preheating chamber 3 and the main heating chamber 2 is preferably set to a predetermined temperature (1500 ° C. to 2300 ° C., preferably 1700 ° C. to 1900 ° C. The temperature is preferably increased to the following temperature. Further, the main heating chamber 2 is adjusted to a predetermined reduced pressure (preferably 10 ⁻⁴ Pa or less).

  Then, the storage container 16 in the preheating chamber 3 is moved to the main heating chamber 2 and rapidly heated to the predetermined temperature by the heater 11. By performing this temperature rising process, an extremely thin metal Si melt 19 is formed between the polycrystalline SiC substrates 32 and 32 and the single crystal SiC substrate 15a. As described above, the ultra-thin metal Si melt 19 is interposed between the polycrystalline SiC substrates 32 and 32 and the single crystal SiC substrate 15a, so that the single crystal SiC is in a liquid phase on the surface of the single crystal SiC substrate 15a. Epitaxial growth. The thickness of the liquid phase epitaxial growth layer can be adjusted to a desired thickness by increasing or decreasing the heat treatment time.

  Here, a spacer may be disposed between the single crystal SiC substrate 15 a and the polycrystalline SiC substrate 32. That is, as shown in FIG. 13B, the supporting substrate 41, the single crystal SiC substrate 15a, at least one spacer 13, the polycrystalline SiC substrate 32, the Si substrate 42, and the weight 43 are stacked in this order from the bottom to the top. The container 16 is housed and arranged inside the container 16. Support substrate 41 is formed of a substrate similar to polycrystalline SiC substrate 32. An ultrathin metal Si melt layer 19 having a thickness of the spacer 13 is formed between the single crystal SiC substrate 15a and the polycrystalline SiC substrate 32 during the heat treatment. Here, the thickness of metal SiC melt layer 19 can be controlled by interposing spacer 13 between single crystal silicon carbide substrate 15 a and polycrystalline SiC substrate 32.

  Here, in the temperature raising process in the main heating chamber 2, the growth is terminated by controlling the single-crystal silicon carbide thin film grown by liquid phase epitaxy to be thinner than the thickness of the spacer 13, and the heating is stopped. Thereafter, the composite of the single crystal silicon carbide substrate 15 a and the polycrystalline silicon carbide substrate 32 is directly vacuum heated without being stored in the storage container 16. Thereby, a gap is formed by evaporating and evaporating silicon between the single crystal silicon carbide substrate 15a and the polycrystalline silicon carbide substrate 32 in a vacuum, so that the single crystal silicon carbide substrate 15a and the polycrystalline silicon carbide substrate 32 are cooled. Post-peeling is easy.

14 (a) is a single crystal silicon carbide surface AFM photograph after thermal etching surface modification processing, FIG. 14 (b), is a single-crystal silicon carbide surface AFM photograph after gas phase or liquid phase epitaxial growth process .

Further, with respect to the single crystal SiC substrate subjected to vapor-phase epitaxial growth process described above and a liquid phase epitaxial growth process, it may be performed thermally etching process further on the surface thereof. The thermal etching method is the same as described above.

  Next, an ion implantation annealing process will be described. That is, for the single crystal SiC substrate subjected to the above-described vapor phase epitaxial growth process and liquid phase epitaxial growth process, p-type or n-type semiconductor doping ions may be further implanted on the surface to perform activation thermal annealing. .

  First, a method of implanting p-type or n-type semiconductor doping ions into the surface of a single crystal SiC substrate and activating thermal annealing will be outlined with reference to FIG. In FIG. 15, first, an SiC single crystal 15b is epitaxially grown on an appropriate SiC substrate 15a using a CVD method, an LPE method, or the like to obtain a single crystal SiC substrate 15 (FIG. 15A). Next, a dopant such as aluminum (Al) or boron (B) is implanted into the SiC single crystal 15b on the substrate surface by using an appropriate ion implantation apparatus (FIG. 15B). In this embodiment, this ion implantation is performed at room temperature. Further, the ions implanted into the SiC single crystal 15b are electrically activated by post-annealing (thermal annealing) to form the ion-doped layer 15c (FIG. 15C).

  FIG. 16 shows an example of the relationship between the annealing temperature and the electrical activation rate of ion doping. As shown in FIG. 16, when the annealing temperature is 1500 ° C., the activation rate is almost zero in the annealing process for 2 minutes, and is about 30% even when the annealing process is performed for 30 minutes. On the other hand, the activation rate tends to increase greatly in the treatment at a high annealing temperature. In the annealing treatment at 1,800 ° C. shown in the above embodiment, the annealing treatment for about 30 minutes or 2 minutes is almost the same. It was found that an activation rate of 100% was obtained. Similarly, an annealing rate at 1,900 ° C. gave an activation rate of almost 100%.

Thereafter, the storage container 16 storing the single crystal SiC substrate 15 on which the ion doped layer 15 c is formed is set in the preheating chamber 3 of the heating furnace 1. The storage container 16 is preheated to 800 ° C. or more in the preheating chamber 3, and the main heating chamber 2 is preferably set to a predetermined temperature (1600 ° C. to 2100 ° C., preferably 1700 ° C. to 1900 ° C. The temperature is preferably increased to a temperature. Further, the main heating chamber 2 is adjusted to a predetermined reduced pressure (preferably 10 ⁻⁴ Pa or less).

Then, the storage container 16 in the preheating chamber 3 is moved to the main heating chamber 2 and rapidly heated to the predetermined temperature by the heater 11. By performing this temperature raising process, the surface is thermally etched so as to have a molecular level flatness, and a single crystal SiC substrate 15 smooth to the molecular level can be obtained.

17 (a) is an AFM enlarged photograph after ion implantation of a semiconductor ion doped single crystal silicon carbide thin film surface of the gas phase or liquid phase epitaxial after deposition, FIG. 17 (b), the single crystal silicon carbide thin film It is an AFM enlarged photograph of the surface of a single crystal silicon carbide semiconductor thin film activated by thermal annealing after ion implantation of semiconductor ion dope on the surface.

  Although the preferred embodiment of the present invention has been described above, the above is an example, and can be modified as follows, for example.

  In addition to exposing the tantalum carbide layer 31 on the entire surface of the storage container 16 used in the heat treatment process, the storage container 16 is exposed only in the internal space of the storage container 16 or only on a part of the inner surface of the storage container 16. You may comprise as follows.

  The Si supply source used in the heat treatment step is not limited to a pellet-like material such as the silicon pellet 14, and for example, a powder-like material can be adopted.

  As the crystal structure of the single crystal SiC substrate 15, 3C—SiC may be used. Further, the surface on which vapor phase epitaxial growth or liquid phase epitaxial growth is performed in single crystal SiC substrate 15 may be a (111) Si plane or a (-1-1-1) C plane.

After the thermal etching process of the single crystal SiC substrate 15 , only the above-described vapor phase epitaxial growth step may be performed, and the liquid phase epitaxial growth step may be omitted. Further, only the liquid phase epitaxial growth process may be performed without performing the vapor phase epitaxial growth process. However, if both the vapor phase epitaxial growth step and the liquid phase epitaxial growth step are performed as described above, the micropipe of the single crystal SiC substrate can be efficiently filled with the vapor phase epitaxial growth, and formed by the vapor phase epitaxial growth. It is advantageous in that a thick film of liquid phase epitaxial growth can be easily formed on the thin single crystal SiC thin film (usually about 30 μm to 50 μm in thickness).

The schematic cross section which shows an example of the heating furnace which performs the surface modification method which concerns on one Embodiment of this invention. The perspective view which shows the structure of the storage container set to a heating furnace. Sectional drawing which shows the example of arrangement | positioning of the single-crystal SiC substrate in a storage container. Fig.4 (a) is an enlarged view which shows an example of the gradient composition of the cross section of the material of a storage container (tantalum carbide). FIG.4 (b) is a graph which shows each carbon concentration of the gradient composition of a tantalum carbide in two cases of the adsorption | suction initial stage of carbon molecule, and a stable stage. The graph which shows the example of the temperature control of a heat processing process. The graph which shows the relationship between the partial pressure on the SiC surface in vacuum, and temperature. FIG. 7 (a) is an AFM enlarged photograph of single crystal silicon carbide surface basal plane defects (occurrence of countless mechanical cutting flaws) after surface mechanical polishing. FIG. 7 (b) is an AFM photograph of uniform formation of a 0.25 nm high step on the surface of the single crystal silicon carbide after the surface modification processing by thermal etching. FIG. 8A is an AFM photograph showing the Si surface of the single crystal SiC substrate when the processing temperature of the heat treatment process is changed. FIG. 8B is an AFM photograph showing the Si surface when the processing time is similarly changed. FIG. 9A is an AFM photograph showing the C-plane of the single crystal SiC substrate when the processing temperature in the heat treatment process is changed. FIG. 9B is an AFM photograph showing the C surface when the processing time is similarly changed. FIG. 10A is an AFM photograph showing the Si surface of the 4H-single crystal SiC substrate subjected to the heat treatment process. FIG. 10B is an AFM photograph showing the Si surface of the 6H-single crystal SiC substrate. The microscope picture which shows the (0001) surface of the 4H-single crystal SiC substrate by which the heat processing process at 1500 degreeC and 1700 degreeC was performed. Sectional drawing which shows the example of arrangement | positioning of the single-crystal SiC substrate in the storage container of the vapor-phase epitaxial growth process after heat processing planarization process. Explanatory drawing in which a micropipe is repaired by vapor phase epitaxial growth on the surface of a single crystal SiC substrate. (A) X-ray transmission enlarged photograph of single crystal SiC substrate after vapor phase epitaxial growth (b) Optical enlarged photo of single crystal SiC substrate surface after vapor phase epitaxial growth The graph which shows a vapor-phase epitaxial growth temperature and a micropipe repair grade. FIG. 13A is a cross-sectional view showing an example in which molten silicon is disposed in a gap between a single crystal SiC substrate and a polycrystalline SiC substrate in a storage container in a liquid phase epitaxial growth step performed after a vapor phase epitaxial growth step. FIG. 13B is a cross-sectional view showing an example of controlling the thickness of the melted silicon by arranging a spacer in the gap between the single crystal SiC substrate and the polycrystalline SiC substrate in the container. FIG.13 (c) is a top view which shows an example which arrange | positions a spacer in the clearance gap between the single crystal SiC substrate in a container, and a polycrystalline SiC substrate, and controls the thickness of molten silicon. FIG. 14A is a single crystal silicon carbide surface AFM photograph after the thermal etching surface modification processing. 14 (b) is a single crystal silicon carbide surface AFM photograph after gas phase or liquid phase epitaxial growth process. FIG. 15A is a conceptual diagram of growing single crystal SiC on a single crystal SiC substrate. FIG. 15B is a conceptual diagram in which semiconductor ion-doped ion implantation is performed on a surface obtained by growing single crystal SiC on a single crystal SiC substrate. FIG. 15C is a conceptual diagram for manufacturing a semiconductor circuit by activating ion dope on the surface of a single crystal SiC substrate by heating at a high temperature. The graph which shows the relationship between the high temperature heating anil temperature and the ion dope activation rate at the time of manufacturing the semiconductor circuit by heating and activating the ion dope on the surface of the single crystal SiC substrate. FIG. 17 (a), AFM enlarged photograph after ion implantation of a semiconductor ion doped single crystal silicon carbide thin film surface of the gas phase or liquid phase epitaxial after deposition. FIG. 17B is an AFM enlarged photograph of the surface of the single crystal silicon carbide semiconductor thin film activated by thermal annealing after ion implantation of the semiconductor ion dope into the surface of the single crystal silicon carbide thin film.

DESCRIPTION OF SYMBOLS 1 Heating furnace 2 Main heating chamber 3 Preheating chamber 4 Front chamber 5 Single crystal SiC substrate 5a which epitaxial single crystal SiC thin film was grown on the surface Single crystal SiC seed substrate 5b Single crystal SiC thin film epitaxially grown on the surface of single crystal SiC seed substrate 13 Spacer 14 Silicon pellet 15 Single crystal SiC substrate 15C Carbon surface (C surface)
15Si silicon surface (Si surface)
16 Storage container 19 Metal Si melt 31 Tantalum carbide layer 32 Polycrystalline SiC substrate 41 Support substrate 42 Metal Si substrate 43 Weight

Claims (17)

Removal of substrate surface defects of single crystal silicon carbide wafers cut directly from single crystal silicon carbide bulk ingots without the need for mechanical and chemical polishing (CMP) as a planarization process of the surface of the single crystal silicon carbide substrate And a surface modification method of a single crystal silicon carbide substrate that forms a surface step shape morphology lost by cutting,
The crystal structure of the single crystal silicon carbide substrate is either 4H—SiC or 6H—SiC, and the substrate surface to be surface-modified is a (0001) Si plane or a (000-1) C plane,
The single crystal silicon carbide substrate is housed in a storage container made of tantalum metal and fitted vertically so that the tantalum carbide layer is exposed to the internal space, and the internal pressure of the storage container is higher than the external pressure and is made of silicon. A heat treatment step including a heat treatment step of uniformly heat-treating the storage container at a temperature of 1500 ° C. or higher and 2300 ° C. or lower in a vacuum state under saturated vapor pressure;
A single crystal silicon carbide substrate surface is thermally etched with molecular level accuracy to remove substrate surface defects caused by mechanical cutting and surface steps with a step height of 0.5 nm or less over the entire substrate surface. A method for modifying a surface of a single crystal silicon carbide substrate, wherein a shape morphology is formed, and an arithmetic average roughness of the substrate surface is 1.0 nm or less. Surface modification of single crystal silicon carbide substrate to remove substrate surface defects caused by mechanical and chemical polishing in the planarization process of the surface of single crystal silicon carbide substrate and to form surface step shape morphology lost by polishing process Is the way
The crystal structure of the single crystal silicon carbide substrate is either 4H—SiC or 6H—SiC, and the substrate surface to be surface-modified is a (0001) Si plane or a (000-1) C plane,
The single crystal silicon carbide substrate is housed in a storage container made of tantalum metal and fitted vertically so that the tantalum carbide layer is exposed to the internal space, and the internal pressure of the storage container is higher than the external pressure and is made of silicon. A heat treatment step including a heat treatment step of uniformly heat-treating the storage container at a temperature of 1500 ° C. or higher and 2300 ° C. or lower in a vacuum state under saturated vapor pressure;
A single crystal silicon carbide substrate surface is thermally etched with molecular level accuracy to remove substrate surface defects caused by mechanical and chemical polishing, and a step height of 0.5 nm or less on the entire substrate surface. A surface modification method for a single-crystal silicon carbide substrate, wherein the surface step shape morphology is formed so that the arithmetic average roughness of the substrate surface is 1.0 nm or less. 3. Formation of a single-crystal silicon carbide thin film on the single-crystal silicon carbide substrate modified by the surface modification method according to claim 1 or 2 for clogging and repairing micropipe defects of the substrate by a vapor phase epitaxial growth method. Is the way
A polycrystalline silicon carbide substrate is placed close to the single crystal silicon carbide substrate in a storage container made of tantalum metal and having a tantalum carbide layer exposed so as to be exposed to the internal space, and opposed to the single crystal silicon carbide substrate. A composite in which a gas phase atmosphere of silicon molecules is interposed in a gap between the silicon substrate and the polycrystalline silicon carbide substrate, and the internal pressure of the storage container is higher than the external pressure and a vacuum under the saturated vapor pressure of silicon. A heat treatment step including a heat treatment step of uniformly heat-treating the storage container at a temperature of 1500 ° C. to 2300 ° C.
A method for forming a single crystal silicon carbide thin film comprising repairing clogging of micropipe defects on the surface of a single crystal silicon carbide substrate with a single crystal silicon carbide thin film obtained by vapor phase epitaxial growth. 3. Formation of a single-crystal silicon carbide thin film on the single-crystal silicon carbide substrate modified by the surface modification method according to claim 1 or 2 for clogging and repairing micropipe defects of the substrate by a liquid phase epitaxial growth method. Is the way
A polycrystalline silicon carbide substrate is placed close to the single crystal silicon carbide substrate in a storage container made of tantalum metal and having a tantalum carbide layer exposed so as to be exposed to the internal space, and opposed to the single crystal silicon carbide substrate. A composite in which a liquid melt of silicon molecules is interposed in a gap between the silicon substrate and the polycrystalline silicon carbide substrate, and the internal pressure of the storage container is higher than the external pressure and under the saturated vapor pressure of silicon. A heat treatment step including a heat treatment step of uniformly heat-treating the storage container at a temperature of 1500 ° C. or higher and 2300 ° C. or lower in a vacuum state;
A method for forming a single crystal silicon carbide thin film comprising repairing a micropipe defect on a surface of a single crystal silicon carbide substrate with a single crystal silicon carbide thin film grown by liquid phase epitaxial growth. 5. A surface modification of a single crystal silicon carbide substrate for flattening a surface of a single crystal silicon carbide thin film in which micropipe defects are closed and repaired by the method for forming a single crystal silicon carbide thin film according to claim 3 or 4 to form a surface step shape morphology. Quality method,
The single crystal silicon carbide substrate is housed in a storage container made of tantalum metal and fitted vertically so that the tantalum carbide layer is exposed to the internal space, and the internal pressure of the storage container is higher than the external pressure and is made of silicon. A heat treatment step including a heat treatment step of uniformly heat-treating the storage container at a temperature of 1500 ° C. or higher and 2300 ° C. or lower in a vacuum state under saturated vapor pressure;
A single crystal silicon carbide substrate thin film is formed by thermally etching the surface of the single crystal silicon carbide thin film with molecular level accuracy to form a surface step shape morphology having a step height of 0.5 nm or less on the surface of the single crystal silicon carbide thin film. A method for modifying the surface of a single-crystal silicon carbide substrate, wherein the arithmetic average roughness is 1.0 nm or less. Activation thermal annealing by implanting p-type or n-type semiconductor doping ions into the surface of the single crystal silicon carbide thin film whose micropipe defects have been closed and repaired by the method for forming a single crystal silicon carbide thin film according to claim 3 An ion implantation annealing method,
The single crystal silicon carbide substrate is housed in a storage container that is made of tantalum metal and has a tantalum carbide layer exposed to the internal space and fitted to the upper and lower sides, and the internal pressure of the storage container is higher than the external pressure and A heat treatment step including a heat treatment step of uniformly heat-treating the storage container at a temperature of 1600 ° C. or higher and 2100 ° C. or lower in a state where the vacuum is maintained under a silicon saturated vapor pressure;
and thermally etched with p-type or n-type semiconductor doping ion activation thermal annealing to simultaneously doping ions implanted the single crystal silicon carbide thin film surface of the molecular level of accuracy, a single crystal silicon carbide doping ions are implanted An ion implantation annealing method, wherein a surface step shape morphology having a step height of 0.5 nm or less is uniformly formed on a surface of a semiconductor substrate, and the arithmetic average roughness of the substrate is 1.0 nm or less. A method for surface modification of a single crystal silicon carbide substrate according to any one of claims 1, 2, and 5,
The heat treatment step further includes a preheating step of heating the storage container storing the single crystal silicon carbide substrate at a temperature of 800 ° C. or more before the heat treatment step,
The heat treatment step is performed in a main heating chamber adjusted to a temperature of 1500 ° C. or higher and 2300 ° C. or lower in advance under reduced pressure;
The surface treatment method for a single crystal silicon carbide substrate, wherein the heat treatment step is performed by moving the storage container from a preheating chamber in which the preheating step is performed to the main heating chamber. A method for forming a single crystal silicon carbide thin film according to claim 3 or 4,
The heat treatment step further includes a preheating step of heating the storage container storing the single crystal silicon carbide substrate at a temperature of 800 ° C. or more before the heat treatment step,
The heat treatment step is performed in a main heating chamber adjusted to a temperature of 1500 ° C. or higher and 2300 ° C. or lower in advance under reduced pressure;
The method for forming a single crystal silicon carbide thin film, wherein the heat treatment step is performed by moving the storage container from a preheating chamber in which the preheating step is performed to the main heating chamber. The ion implantation annealing method according to claim 6,
The heat treatment step further includes a preheating step of heating the storage container storing the single crystal silicon carbide substrate at a temperature of 800 ° C. or more before the heat treatment step,
The heat treatment step is performed in a main heating chamber adjusted in advance to a temperature of 1600 ° C. or higher and 2100 ° C. or lower under reduced pressure,
The ion implantation annealing method, wherein the heat treatment step is performed by moving the storage container from a preheating chamber in which the preheating step is performed to the main heating chamber. A method for surface modification of a single crystal silicon carbide substrate according to any one of claims 1, 2, and 5,
The method for surface modification of a single crystal silicon carbide substrate, wherein the heat treatment step is performed under a reduced pressure of 10 ⁻⁴ Pa or less of an external pressure of the storage container. A method for forming a single crystal silicon carbide thin film according to claim 3 or 4,
The method for forming a single crystal silicon carbide thin film, wherein the heat treatment step is performed under a reduced pressure of 10 ⁻⁴ Pa or less of an external pressure of the storage container. The ion implantation annealing method according to claim 6,
The ion implantation annealing method, wherein the heat treatment step is performed under a reduced pressure in which the external pressure of the storage container is 10 ⁻⁴ Pa or less.   A single crystal silicon carbide substrate whose surface is modified by the surface modification method according to claim 1.   A single crystal silicon carbide semiconductor substrate whose surface is modified by the ion implantation annealing method according to claim 6. A method for forming a single crystal silicon carbide thin film according to claim 4,
The heat treatment step includes interposing a liquid phase melt of silicon molecules with a gap provided by a spacer between the single crystal silicon carbide substrate and the polycrystalline silicon carbide substrate placed close to the single crystal silicon carbide substrate. The single crystal silicon carbide thin film grown by liquid phase epitaxy is thinner than the spacer thickness, and the growth is terminated and heating is stopped.
The heat treatment step further comprises a step of directly heating the composite of the single crystal silicon carbide substrate and the polycrystalline silicon carbide substrate without vacuum in the storage container after the heat treatment step,
Evaporation of silicon between the single crystal silicon carbide substrate and the polycrystalline silicon carbide substrate in a vacuum creates a gap, so that the single crystal silicon carbide substrate and the polycrystalline silicon carbide substrate can be easily separated after cooling. A method for forming a single crystal silicon carbide thin film, wherein: The ion implantation annealing method according to claim 6,
The single crystal silicon carbide semiconductor substrate, wherein the doping ions of the p-type or n-type semiconductor include at least aluminum, boron, or phosphorus. A method for surface modification of a single crystal silicon carbide substrate according to claim 1 or 2,
A surface modification method for a single crystal silicon carbide substrate, wherein a crystal orientation of a surface to be surface modified in the single crystal silicon carbide substrate has a just plane or an off angle.