JP5063846B2 - 超小型電子機器製造において最適な加工ターゲットを定めるための方法 - Google Patents

超小型電子機器製造において最適な加工ターゲットを定めるための方法 Download PDF

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JP5063846B2
JP5063846B2 JP2001550802A JP2001550802A JP5063846B2 JP 5063846 B2 JP5063846 B2 JP 5063846B2 JP 2001550802 A JP2001550802 A JP 2001550802A JP 2001550802 A JP2001550802 A JP 2001550802A JP 5063846 B2 JP5063846 B2 JP 5063846B2
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processing
machining
change
parameter
doping level
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JP2003519922A5 (enExample
JP2003519922A (ja
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トプラク,アンソニー・ジェイ
ミラー,マイケル・エル
ソンダーマン,トーマス
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Advanced Micro Devices Inc
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Advanced Micro Devices Inc
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605Workpiece metrology
    • G03F7/70616Monitoring the printed patterns
    • G03F7/70625Dimensions, e.g. line width, critical dimension [CD], profile, sidewall angle or edge roughness
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605Workpiece metrology
    • G03F7/70616Monitoring the printed patterns
    • G03F7/70633Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
JP2001550802A 2000-01-04 2000-12-04 超小型電子機器製造において最適な加工ターゲットを定めるための方法 Expired - Lifetime JP5063846B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/477,464 2000-01-04
US09/477,464 US6470230B1 (en) 2000-01-04 2000-01-04 Supervisory method for determining optimal process targets based on product performance in microelectronic fabrication
PCT/US2000/032948 WO2001050522A1 (en) 2000-01-04 2000-12-04 Method for determining optimal process targets in microelectronic fabrication

Publications (3)

Publication Number Publication Date
JP2003519922A JP2003519922A (ja) 2003-06-24
JP2003519922A5 JP2003519922A5 (enExample) 2008-01-10
JP5063846B2 true JP5063846B2 (ja) 2012-10-31

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JP2001550802A Expired - Lifetime JP5063846B2 (ja) 2000-01-04 2000-12-04 超小型電子機器製造において最適な加工ターゲットを定めるための方法

Country Status (5)

Country Link
US (1) US6470230B1 (enExample)
EP (1) EP1245044B1 (enExample)
JP (1) JP5063846B2 (enExample)
KR (1) KR100727049B1 (enExample)
WO (1) WO2001050522A1 (enExample)

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Also Published As

Publication number Publication date
EP1245044A1 (en) 2002-10-02
KR20020087047A (ko) 2002-11-21
WO2001050522A1 (en) 2001-07-12
EP1245044B1 (en) 2011-05-11
KR100727049B1 (ko) 2007-06-12
JP2003519922A (ja) 2003-06-24
US6470230B1 (en) 2002-10-22

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