JP5002350B2 - 回路装置 - Google Patents

回路装置 Download PDF

Info

Publication number
JP5002350B2
JP5002350B2 JP2007170561A JP2007170561A JP5002350B2 JP 5002350 B2 JP5002350 B2 JP 5002350B2 JP 2007170561 A JP2007170561 A JP 2007170561A JP 2007170561 A JP2007170561 A JP 2007170561A JP 5002350 B2 JP5002350 B2 JP 5002350B2
Authority
JP
Japan
Prior art keywords
wiring
insulating layer
metal substrate
circuit device
recess
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2007170561A
Other languages
English (en)
Japanese (ja)
Other versions
JP2009010192A5 (enExample
JP2009010192A (ja
Inventor
真弓 中里
洋 高野
徹郎 澤井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP2007170561A priority Critical patent/JP5002350B2/ja
Publication of JP2009010192A publication Critical patent/JP2009010192A/ja
Publication of JP2009010192A5 publication Critical patent/JP2009010192A5/ja
Application granted granted Critical
Publication of JP5002350B2 publication Critical patent/JP5002350B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Insulated Metal Substrates For Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)
JP2007170561A 2007-06-28 2007-06-28 回路装置 Expired - Fee Related JP5002350B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007170561A JP5002350B2 (ja) 2007-06-28 2007-06-28 回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007170561A JP5002350B2 (ja) 2007-06-28 2007-06-28 回路装置

Publications (3)

Publication Number Publication Date
JP2009010192A JP2009010192A (ja) 2009-01-15
JP2009010192A5 JP2009010192A5 (enExample) 2010-08-26
JP5002350B2 true JP5002350B2 (ja) 2012-08-15

Family

ID=40324983

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007170561A Expired - Fee Related JP5002350B2 (ja) 2007-06-28 2007-06-28 回路装置

Country Status (1)

Country Link
JP (1) JP5002350B2 (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013046617A1 (ja) * 2011-09-28 2013-04-04 三洋電機株式会社 素子搭載用基板、半導体モジュールおよび素子搭載用基板の製造方法
KR101204564B1 (ko) * 2011-09-30 2012-11-23 삼성전기주식회사 전력 모듈 패키지 및 그 제조 방법

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08316592A (ja) * 1995-05-23 1996-11-29 Fujitsu Ltd 回路基板及びその製造方法
JP2002280686A (ja) * 2001-03-15 2002-09-27 Nippon Avionics Co Ltd メタルコアプリント配線板およびその製造方法
TWI267173B (en) * 2004-03-29 2006-11-21 Sanyo Electric Co Circuit device and method for manufacturing thereof
JP2006100753A (ja) * 2004-09-30 2006-04-13 Sanyo Electric Co Ltd 半導体モジュールおよびその製造方法

Also Published As

Publication number Publication date
JP2009010192A (ja) 2009-01-15

Similar Documents

Publication Publication Date Title
JP4109707B1 (ja) 半導体装置およびその製造方法、ならびにディスプレイ装置およびその製造方法
CN101488495B (zh) 具有开关部件和驱动电子器件的半导体模块
US6803257B2 (en) Printed circuit board with a heat dissipation element, method for manufacturing the printed circuit board, and package comprising the printed circuit board
KR100661948B1 (ko) 회로 장치 및 그의 제조 방법
JP6033215B2 (ja) パワーモジュール半導体装置
US10154593B2 (en) Electronic assembly group and method for producing the same
JP2008205142A (ja) Cof用配線基板とその製造方法、並びに半導体装置
US20250174521A9 (en) Semiconductor package including heat radiation structure, cooling system applying the semiconductor package, substrate including heat radiation structure and method of manufacturing the substrate
US10249558B2 (en) Electronic part mounting heat-dissipating substrate
US20070252270A1 (en) Circuit Apparatus
US9706663B2 (en) Printed wiring board, method for manufacturing the same and semiconductor device
KR100661946B1 (ko) 회로 장치 및 그 제조 방법
KR20100109524A (ko) 플렉서블 프린트 배선 기판 및 이를 이용한 반도체 장치
JP4344766B2 (ja) ソースドライバ、ソースドライバの製造方法、および液晶モジュール
CN112713120A (zh) 功率电子组件及其产生方法
CN206864455U (zh) 散热基板
CN103811431A (zh) 开放阻焊层和或电介质
JP4983386B2 (ja) Cof用配線基板
JP5002350B2 (ja) 回路装置
JP4975584B2 (ja) 半導体装置及び半導体装置の製造方法。
CN111564956B (zh) 用于功率级模块和集成电感器的具有载体框架的功率级设备
JP2006100759A (ja) 回路装置およびその製造方法
JP4882562B2 (ja) 熱伝導基板とその製造方法及び電源ユニット及び電子機器
JP2007294863A (ja) 回路装置
JP5066932B2 (ja) Cof用配線基板とその製造方法、並びにcof

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100617

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20100617

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100712

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20110405

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20111025

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20111222

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20120424

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20120521

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20150525

Year of fee payment: 3

LAPS Cancellation because of no payment of annual fees