JP4954495B2 - Method for manufacturing semiconductor device - Google Patents

Description

  The present invention relates to a laser irradiation apparatus for irradiating an object to be processed with laser light, a method for manufacturing a semiconductor film having a crystal structure using the apparatus, and a method for manufacturing a semiconductor device. In addition, the present invention relates to a semiconductor device having a circuit formed of a thin film transistor (hereinafter referred to as TFT) and a photovoltaic element (such as a photosensor or a solar cell). For example, the present invention relates to an electronic apparatus in which an electro-optical device typified by a liquid crystal display panel, a light-emitting display device having an organic light-emitting element, a sensor device such as a line sensor, and a memory device such as SRAM are mounted as components.

  Note that in this specification, a semiconductor device refers to all devices that can function by utilizing semiconductor characteristics, and an electro-optical device, a semiconductor circuit, and an electronic device are all semiconductor devices.

  In recent years, a technique for forming a thin film transistor (TFT) using a semiconductor thin film (having a thickness of about several to several hundred nm) formed on a substrate having an insulating surface has attracted attention. Thin film transistors are widely applied to electronic devices such as ICs and electro-optical devices, and development of switching devices for image display devices is urgently required.

  In recent years, image display devices and image sensors have been increased in size and pixels have been increased in density (high definition), and a semiconductor thin film capable of following higher-speed driving has been demanded. In order to reduce the weight and cost, the thin film transistor is applied not only to the switching element of the image display apparatus but also to the driver element around the display area.

  Therefore, methods for forming a semiconductor thin film having a crystal structure and improving electric characteristics such as field effect mobility (also referred to as mobility), for example, a solid phase growth method and a laser annealing method have been studied.

  In the solid phase growth method, an amorphous silicon thin film is formed on a substrate and heated to form a polycrystalline silicon thin film, and heat treatment is mainly performed at a temperature of about 600 ° C. to 1000 ° C. for a long time. There is a need for an expensive quartz substrate to withstand.

From the viewpoint of cost, a glass substrate is considered promising as a substrate rather than a quartz substrate or a single crystal semiconductor substrate. Since glass substrates are inferior in heat resistance and easily deformed by heat, when a TFT using a polycrystalline semiconductor film is formed on a glass substrate, a laser is used to crystallize the semiconductor film in order to avoid thermal deformation of the glass substrate. An annealing method is used.

  The characteristics of the laser annealing method are that the processing time can be greatly shortened compared to the annealing method using radiation heating or conduction heating, and the semiconductor substrate or semiconductor film is selectively heated to cause almost no thermal damage to the substrate. There are things not to give. (For example, see Patent Document 1)

JP 2001-230420 A

  Laser oscillators used in laser annealing are roughly classified into two types, pulse oscillation and continuous oscillation, depending on the oscillation method. In laser annealing, laser light emitted from a pulsed excimer laser is often used. The excimer laser has an advantage that it has a large output and can be repeatedly irradiated at a high frequency.

  Further, laser light oscillated from an excimer laser has an advantage of a high absorption coefficient with respect to a silicon thin film often used as a semiconductor thin film.

  There are several problems to be solved in the conventional laser annealing method using laser light oscillated from a pulsed excimer laser. For example, the absorptance changes greatly depending on the film thickness and film quality of the semiconductor film to be heated, Since the beam intensity varies due to the instability of pulse oscillation, it is difficult to perform heating uniformly. For this reason, there is a problem that the device characteristics vary and the yield decreases.

Therefore, as one of methods for solving these problems, there is a method using a laser oscillator (hereinafter referred to as a solid-state laser) using a crystal instead of a gas as a laser medium such as a YAG laser or a YVO ₄ laser. Can be mentioned. Solid-state lasers can output more stable than gas lasers such as excimer lasers.

  However, when a solid-state laser is applied, the oscillation wavelength region of the fundamental wave is from the infrared region to the near infrared region, and the absorption efficiency in the semiconductor film is extremely low. On the other hand, the wavelength of laser light with high absorption efficiency into the semiconductor film is in the visible or ultraviolet region.

  Therefore, when the semiconductor film is laser-annealed with laser light oscillated from a solid-state laser, the wavelength is converted into a harmonic having a wavelength below the visible range using a nonlinear optical element. For example, it is preferable to convert a near-infrared fundamental wave into green laser light that is a second harmonic because of high conversion efficiency.

  Harmonics are obtained by making a fundamental wave oscillated from a laser medium enter a nonlinear optical element. However, when the output of the laser beam increases, there is a problem that the nonlinear optical element is damaged due to nonlinear optical effects such as multiphoton absorption, leading to breakdown. Therefore, the solid-state laser in the visible range currently produced is about 15 W at the maximum due to the problem of nonlinear optical elements.

  For the above reasons, when laser annealing is performed using a solid laser, the output is lower than when an excimer laser is used, and further improvement in productivity is required.

    Furthermore, it has been found that large crystal grains can be formed in a semiconductor film by making the CW laser or pseudo CW laser into a semiconductor film-like linear beam spot and moving the beam spot relative to the semiconductor film. ing. (Hereinafter, such a crystal having a large crystal grain size is referred to as a large crystal grain.)

  This is because the laser beam is absorbed by the semiconductor film by the laser beam irradiation, and the interface between the part where the semiconductor film is melted and the part that is cooled and crystallized by thermal diffusion after the laser irradiation (hereinafter referred to as solid phase). (Referred to as the liquid interface) moves in the scanning direction of the laser, thereby forming large grain crystals extending long in the scanning direction.

  In general, the polycrystalline silicon thin film has higher electrical characteristics such as mobility as the crystal grain size is larger. In addition, when the crystal grain size of the semiconductor film is increased, the number of grain boundaries located in the channel formation region of the TFT formed using the semiconductor film is reduced, so that the mobility is increased, which leads to the development of a higher performance device. Available.

  Therefore, when the CW laser or the pseudo CW laser is made into a semiconductor film-like linear beam spot and this beam spot is moved relative to the semiconductor film, the scanning direction of the linear beam and the channel direction of the TFT are changed. By combining them, it is possible to obtain better electrical characteristics as a whole.

  However, since the number of crystal grain boundaries crossing the channel is reduced, the influence per crystal grain boundary included in the channel is increased. There is a problem that variation in electrical characteristics increases depending on the number of crystal grain boundaries included in the channel.

  Therefore, the present invention keeps the laser beam of the solid-state laser as a fundamental wave without passing it through the nonlinear optical element, and does not directly absorb the laser beam into the semiconductor film, but in an island shape provided above or below the semiconductor film. The semiconductor film is indirectly laser-annealed by heat generated by being absorbed only by the formed light absorption layer. In addition, since the light absorption layer patterned in an island shape is irradiated with laser light, it is not affected by the size of the beam spot of the laser light used. Further, at this time, the TFT carrier is provided so that the direction in which the carrier of the TFT moves and the longitudinal direction of the light absorption layer formed in an island shape are orthogonal to each other.

  The gist of the present invention is to form a large grain crystal with a high throughput by using a solid-state laser having an oscillation wavelength from the infrared region to the near infrared region where the absorption efficiency in the semiconductor film is extremely low. For this purpose, the laser beam is left as a fundamental wave without being converted into a harmonic, and a light absorption layer capable of absorbing the fundamental wave is formed in an island shape at least on a portion where a thin film element such as a thin film transistor is formed on the substrate. Laser annealing is performed. When a semiconductor film having an amorphous structure is formed so as to overlap with the light absorption layer, a region overlapping with the light absorption layer is heated to a high temperature and heat treatment is performed. At this time, since the region overlapping the light absorption layer is in a higher temperature than the region not overlapping, the semiconductor film is grown in a predetermined direction using the temperature distribution, and the polycrystalline semiconductor film having a large grain crystal Can be formed.

  Since a fundamental wave solid-state laser can be used in the present invention, the manufacturing cost can be reduced as compared with a gas laser such as an excimer laser. In addition, since the solid-state laser has good stability, it is possible to form a polycrystalline semiconductor film with little variation. Furthermore, since the fundamental wave of the solid-state laser can be used as it is in the present invention, it is not necessary to use a nonlinear optical element used when converting to a harmonic. That is, it is not necessary to reduce the laser output in consideration of damage to the nonlinear optical element. Therefore, since a laser having a higher output than conventional ones can be used, a large area can be laser-annealed at a time, and productivity can be improved. Thus, the present invention does not require repeated scanning hundreds or thousands of times to crystallize the entire surface of a large-sized substrate used in the mass production process, and can be said to be a technique suitable for the mass production process.

  Such a method for manufacturing a semiconductor device based on the gist of the present invention can include the following structures.

  A method for manufacturing a semiconductor device including a step of forming a polycrystalline semiconductor film by irradiation with a fundamental wave of a solid-state laser, wherein a base insulating film is formed on a substrate having an insulating surface, and the semiconductor film is formed on the base insulating film Then, an insulating film is formed on the semiconductor film, a light absorption layer capable of absorbing the fundamental wave is formed on the insulating film, and the island-shaped light absorption layer is selectively heated by irradiation with the fundamental wave. Thus, there is provided a method for manufacturing a semiconductor device, including a step of forming a polycrystalline semiconductor film by crystal growth of a semiconductor film in a predetermined direction.

  Light with which a base insulating film is formed over a substrate having an insulating surface, a semiconductor film is formed over the base insulating film, an insulating film is formed over the semiconductor film, and the fundamental wave can be absorbed in an island shape over the insulating film By forming the absorption layer and selectively heating the island-shaped light absorption layer by irradiating the fundamental wave of the solid-state laser, the semiconductor film is grown in a predetermined direction to form a polycrystalline semiconductor film, The polycrystalline semiconductor film is patterned to form an island-shaped semiconductor film, and an impurity element is added to the island-shaped semiconductor film to form a source region and a drain region, and a channel formation region between the source region and the drain region. A manufacturing method of a semiconductor device including a forming step.

  In the structure of the above invention, a semiconductor film having an amorphous structure is used as the semiconductor film formed over the base insulating film. As the semiconductor film having an amorphous structure, a semiconductor material containing silicon as a main component is used. Typically, an amorphous silicon film, an amorphous silicon germanium film, or the like can be used.

  Further, instead of a semiconductor film having an amorphous structure, a semiconductor film having a crystal structure (such as a polycrystalline silicon film or a microcrystalline semiconductor film (also referred to as a microcrystal semiconductor film)) can be used by simply forming the film. Good.

In the structure of the above invention, the island-shaped light absorption layer is selectively heated by the fundamental wave irradiation to melt the semiconductor film, and the region where the light absorption layer is not formed is changed from the region where the light absorption layer is not formed. A semiconductor film can be crystal-grown. By utilizing the temperature distribution in this way, the semiconductor film can be crystal-grown in a predetermined direction.
In the structure of the above invention, the island-shaped light absorption layer has a longitudinal direction, so that the semiconductor film can be grown in a direction orthogonal to the longitudinal direction of the light absorption layer. The polycrystalline semiconductor film can be patterned so that the crystal growth direction coincides with the direction in which the carrier of the thin film transistor moves. That is, the polycrystalline semiconductor film can be patterned so that the direction connecting the source region and the drain region is orthogonal to the longitudinal direction of the light absorption layer. Accordingly, a thin film transistor having high electrical characteristics such as field effect mobility can be obtained.

In the structure of the present invention, the region that overlaps the light absorption layer is in a higher temperature than the region that does not overlap. Therefore, the light absorption layer is formed from the region where the light absorption layer is not formed using the temperature distribution. The semiconductor film can be crystal-grown toward the region. As a result, two crystals grown in opposite directions from both sides in the vicinity of the center of the light absorption layer collide to form a grain boundary.
In the structure of the above invention, the polycrystalline semiconductor film can be patterned so that the grain boundary is not included in the channel formation region. Accordingly, since a channel formation region can be formed while avoiding a grain boundary in the crystal growth direction, a thin film transistor having high electrical characteristics such as field effect mobility can be obtained.

  In the configuration of the above invention, the width of the island-shaped light absorption layer having the longitudinal direction is formed to be 0.5 to 50 μm, so that the semiconductor film is crystal-grown in a predetermined direction and has a large grain crystal. Can be formed.

  In the structure of the invention, a plurality of island-shaped light absorption layers having a longitudinal direction can be formed with a predetermined interval. For example, the island-shaped light absorption layer can be formed in a striped shape. At this time, a polycrystalline semiconductor film having a large grain crystal can be formed over the entire region where the plurality of light absorption layers are formed by forming the light absorption layers at an interval of 1 μm or more, preferably 10 μm or more. it can.

  In the structure of the above invention, an insulating film between the semiconductor film and the light absorption layer can be used as the gate insulating film. A gate electrode can be formed using the light absorption layer. Further, the wiring can be formed using the light absorption layer. Thus, a part of the thin film element can be formed using the light absorption layer and the insulating film used in the crystallization process. By doing so, a thin film element having a polycrystalline semiconductor film having a large grain crystal can be formed without increasing the number of film forming steps. Here, the thin film element is formed by appropriately laminating a thin film of a semiconductor, an insulator or a conductor on a substrate, and typically includes a thin film transistor.

  In the structure of the above invention, since the temperature distribution can be formed in the semiconductor film by patterning the light absorption layer in an island shape, a large grain crystal can be formed without being influenced by the shape of the laser beam on the irradiated surface. Can do. The shape of the laser beam on the irradiation surface may be any shape as long as it is larger than the light absorption layer patterned in an island shape. For example, a laser beam with a planar laser beam shape such as a rectangle, an ellipse, or a circle can be used. The present invention does not require laser beam condensing performance, so that it is not necessary to use a single-mode condensing device, and a multimode fundamental laser capable of obtaining high output can be used.

  In the structure of the above invention, a semiconductor film with a large area can be crystallized by moving the irradiation position of the laser light relative to the irradiation surface.

In the configuration of the above invention, a pulsed solid-state laser can be used. In this case, the semiconductor film can be crystallized by irradiating one shot of a laser pulse at one place. Alternatively, the semiconductor film may be crystallized by irradiating with two or more laser pulses at one place.
Alternatively, a continuous wave laser oscillator (hereinafter referred to as a CW laser) or a pulse oscillation laser oscillator (hereinafter referred to as a pseudo CW laser) having a very high repetition frequency of 10 MHz or more can be used. In this case, crystallization using the temperature distribution of the semiconductor film can be performed by shortening the irradiation time at one place. By using these lasers, the grain size of crystals formed in the semiconductor film can be increased.

In the structure of the above invention, the light absorption layer uses a material having a higher absorptance than the substrate having a semiconductor film, an insulating film, or an insulating surface in a wavelength range from the near infrared region to the infrared region. For example, tungsten (W), molybdenum (Mo), titanium (Ti), tantalum (Ta), chrome (Cr) or cobalt (Co) refractory metal, alloys of these metals, titanium nitride (TiN), nitriding Metal nitride of tantalum (TaN) or tungsten nitride (WN), or tungsten silicide (WSi ₂ ), molybdenum silicide (MoSi ₂ ), titanium silicide (TiSi ₂ ), tantalum silicide (TaSi ₂ ), chromium silicide (CrSi ₂ ) , Cobalt silicide (CoSi ₂ ) or platinum silicide (PtSi ₂ ) metal silicide.
By combining a light-absorbing layer having a high absorption rate of laser light in the near-infrared to infrared wavelength range with a substrate having a semiconductor film, an insulating film, and an insulating surface having a low absorption rate of laser light in the wavelength range. The region where the light absorption layer is formed can be selectively heated.

  In the structure of the above invention, the light absorption layer includes a first layer and a second layer, and the first layer and the second layer can have a portion that does not overlap with a portion that overlaps with each other. The light absorption layer is a laminated film in which the first layer and the second layer are laminated, and the first layer and the second layer having different widths can be used. In this way, by forming the light absorption layer in multiple layers and using a layer that partially overlaps and does not overlap, the portion where the multilayer light absorption layers overlap can be brought to the highest temperature. And the grain boundary used as the terminal of crystal growth can be formed in the part. In this way, by further providing a temperature distribution in the light absorption layer, the position of the grain boundary can be controlled more accurately. In addition, since the grain boundary that terminates the crystal growth is not formed in the part where the multilayer light absorption layer does not overlap, that is, the part where the light absorption layer is thinner than other parts, the light absorption layer of this part is used. Thus, a gate electrode can be formed, and a channel formation region can be formed so that no crystal grain boundary is included in the channel length direction.

  In the structure of the above invention, a substrate having an insulating surface may be a substrate having a low absorptance in the fundamental wavelength range of the solid-state laser (that is, the near-infrared to infrared wavelength range). By selectively forming a light absorption layer with a high absorption rate in the wavelength region on a substrate having an insulating surface with a low absorption rate in the near-infrared to infrared wavelength range, the region where the light absorption layer is formed is selectively used. Can be heated. Therefore, as the substrate having an insulating surface, a glass substrate or a plastic substrate having heat resistance that can withstand the processing temperature of the crystallization step can be used. Further, other substrates such as a quartz substrate can be used as long as the substrate has a low absorptance from the near infrared region to the infrared region.

  In the above structure, a silicon oxide film or a silicon oxynitride film is used as the insulating film in contact with the semiconductor film having an amorphous structure. Alternatively, a stacked film in which any of a silicon oxide film, a silicon nitride film, and a silicon oxynitride film is stacked is used. By using these materials, the heat of the light absorption layer can be conducted to the semiconductor film having an amorphous structure with little heat loss, and the semiconductor film having an amorphous structure can be crystallized. In addition, by interposing the insulating film between the light absorption layer and the semiconductor film having an amorphous structure, the semiconductor film can be prevented from being contaminated by the material of the light absorption layer.

  According to the present invention, a polycrystalline semiconductor film having a large grain crystal can be formed by crystal growth of a semiconductor film in a predetermined direction by laser light irradiation. Since a fundamental solid-state laser can be used as the laser, the manufacturing cost can be reduced compared to a gas laser such as an excimer laser. In addition, since the solid-state laser has good stability, it is possible to form a polycrystalline semiconductor film with little variation. In addition, since the fundamental wave of the solid-state laser can be used as it is in the present invention, a high-power laser can be used and productivity can be improved. Further, according to the present invention, since the position of the crystal grain boundary crossing the channel can be controlled, a thin film transistor having high electric characteristics such as field effect mobility can be obtained.

  Embodiments of the present invention will be described below. However, the present invention can be implemented in many different modes, and those skilled in the art can easily understand that the modes and details can be variously changed without departing from the spirit and scope of the present invention. Is done. Therefore, the present invention should not be construed as being limited to the description of the embodiment modes.

(Embodiment 1)
Hereinafter, an embodiment of the present invention will be described with reference to FIG.

  FIG. 1A is a top view of the entire substrate to be laser annealed, and FIG. 1B is a cross-sectional view taken along line a-a ′ in FIG. FIG. 1C shows a temperature distribution of the semiconductor film 103 formed by laser irradiation.

  The structure of FIG. 1B is formed by the following procedure. First, the base insulating film 102 is formed over the substrate 101 having an insulating surface, the semiconductor film 103 is further formed, and then the insulating film 104 and the light absorption layer 105 are formed. Next, the light absorption layer 105 is patterned into an island shape with a predetermined width as shown in FIG. As shown in FIG. 1A, the light absorption layer may be patterned in a striped pattern with a predetermined interval over almost the entire substrate except the edge of the substrate, or may be formed in another pattern.

  However, as shown in FIG. 2, the temperature distribution in the direction 302 in which the TFT carrier moves needs to be steeper than that in the direction perpendicular thereto, so that the carrier direction 302 and the island move in an island shape. The longitudinal direction 301 of the formed light absorption layer 105 needs to be provided so as to be orthogonal. FIG. 2 shows a top view of a part of the substrate, and the symbols used in FIG. 2 are the same symbols as those in FIG.

  Although FIG. 1 shows an example in which a light absorption layer is provided on a semiconductor film, a light absorption layer may be provided below the semiconductor film.

  In the present invention, since the semiconductor film uses the laser light 115 having a wavelength that does not absorb, light is absorbed only by the patterned light absorption layer 105. Heat generated by the absorption of the laser light diffuses into the semiconductor film 103 through the insulating film 104, and a temperature distribution can be generated in the in-plane direction of the substrate as shown in FIG. Then, since the semiconductor film 103 is melted and follows the temperature distribution, the light absorption layer is formed from the low temperature portion (that is, the region where the light absorption layer 105 is not directly above the semiconductor film 103) to the high temperature portion (that is, directly above the semiconductor film 103). Crystallization proceeds toward a region 105). Then, two single crystals grown from both sides collide toward the center of the region where the light absorption layer 105 is present. In this way, a polycrystalline semiconductor film 103 'is formed. Here, as shown in FIG. 2, by patterning the polycrystalline semiconductor film 103 ′ so that the carrier moving direction 302 and the longitudinal direction 301 of the light absorption layer 105 are orthogonal to each other, an island-shaped semiconductor film 304 is formed. The crystal growth direction 303 of the polycrystalline semiconductor film 103 ′ and the carrier movement direction 302 can be substantially matched.

  In the present invention, since the temperature distribution can be formed in the semiconductor film by patterning the light absorption layer 105 into an island shape, a large grain crystal can be formed regardless of the beam spot shape of the laser light. Therefore, since the condensing performance of the laser beam is not limited, it is not necessary to use a laser having good single mode condensing property, and it is possible to use a fundamental wave laser capable of obtaining a high output.

  A laser capable of high output of several kW is relatively poor in quality of the output beam due to the structure of the oscillator and cannot form a fine beam spot. However, a high output laser is used by using the present invention. be able to.

  Examples of the fundamental laser that can output several kW include a fiber laser, a diode laser, a lamp pumped laser diode, or an LD pumped solid laser.

  Since a fundamental wave solid-state laser can be used in the present invention, the manufacturing cost can be reduced as compared with a gas laser such as an excimer laser. In addition, since the solid-state laser has good stability, it is possible to form a polycrystalline semiconductor film with little variation. Furthermore, since a laser having a high output of about 1000 times that of the prior art is used, a large area can be laser-annealed at a time, which is effective in improving productivity.

(Embodiment 2)
As an embodiment of the present invention, a manufacturing method of a TFT in which a polycrystalline semiconductor film having a large grain crystal is formed with a high-power fiber laser and no crystal grain boundary is included in the channel direction of the TFT will be described.

  First, as illustrated in FIG. 1B, a base insulating film 102 and a semiconductor film 103 having an amorphous structure are formed over a substrate 101 having an insulating surface.

  As the substrate 101 having an insulating surface, a glass substrate such as barium borosilicate glass or alumino borosilicate glass is used. Further, a plastic substrate having heat resistance that can withstand the processing temperature in this step, for example, a plastic substrate obtained by processing a material in which inorganic particles having a diameter of several nm are dispersed in an organic polymer matrix into a sheet shape may be used.

As the base insulating film 102 formed over the substrate 101 having an insulating surface, an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film (SiO _x N _y ) is used. As a typical example, the base insulating film 102 has a two-layer structure, and a silicon nitride oxide film formed by using SiH ₄ , NH ₃ , and N ₂ O as a reactive gas is 50 to 100 nm, SiH ₄ , and N ₂ O. A structure is employed in which a silicon oxynitride film is deposited to a thickness of 100 to 150 nm formed using a reactive gas as a reactive gas. In addition, a silicon nitride film (SiN film) or a silicon oxynitride film (SiN _x O _y film (X> Y)) with a thickness of 10 nm or less is preferably used as one layer of the base insulating film 102. Alternatively, a three-layer structure in which a silicon nitride oxide film, a silicon oxynitride film, and a silicon nitride film are sequentially stacked may be used. The base insulating film 102 functions as a blocking layer for preventing mobile ions such as sodium from entering the TFT from the substrate. The base insulating film 102 functions as a buffer layer.

  For the semiconductor film 103 having an amorphous structure, a semiconductor material containing silicon as its main component is used. Typically, an amorphous silicon film, an amorphous silicon germanium film, or the like is formed by a known means (a sputtering method, an LPCVD method, a plasma CVD method, or the like).

  Further, instead of the semiconductor film 103 having an amorphous structure, a semiconductor film having a crystalline structure by simply forming the film (polycrystalline silicon film, microcrystalline semiconductor film (also referred to as a microcrystalline semiconductor film or a semi-amorphous semiconductor film)) Etc.) may be used.

  Then, the insulating film 104 and the light absorption layer 105 made of a metal element, a semiconductor element, or the like are formed over the semiconductor film 103.

As the insulating film 104, an insulating film such as a silicon oxide film or a silicon oxynitride film (SiO _x N _y ) is formed to a thickness of about 50 to 300 nm. Two or more silicon oxide films, silicon nitride films, silicon oxynitride films (SiO _x N _y ), or the like may be stacked. In addition, the insulating film 104 has a role of preventing diffusion of an impurity element in which an element used as the light absorption layer 105 forms a deep level in the semiconductor.

The light absorption layer 105 is formed using a material having a higher absorption rate than the semiconductor film 103 in the near-infrared to infrared wavelengths. For example, one kind selected from refractory metals such as W, Mo, Ti, Ta, Cr, Co, or an alloy thereof is used. Further, a nitride of these refractory metals (WN, MoN, TiN, TaN, etc.) or a silicide of the metal (WSi _2, etc. _{MoSi 2, TiSi 2, TaSi 2} , CrSi 2, CoSi 2, PtSi 2) using Two or more layers may be stacked.

    The light absorption layer 105 is formed by patterning as shown in FIG. 1B using a photolithography method after film formation. At this time, the patterned light absorption layer 105 preferably has a width of about 0.5 to 50 μm so that the semiconductor film 103 can have a temperature distribution. Moreover, it is preferable that the space | interval is 1 micrometer or more.

    Next, by irradiating the light absorption layer 105 with a fundamental wave of a solid-state laser, light is absorbed and changed to heat, and heat is conducted to the semiconductor film 103 through the insulating film 104, so that the semiconductor film 103 is melted. At this time, the semiconductor film 103 has a temperature distribution as shown in FIG. When the beam spot of the fundamental wave of the solid laser is sufficiently larger than the width of the patterned light absorption layer, this temperature distribution depends on the shape of the light absorption layer 105, and the shape of the beam spot of the solid laser light is Do not depend.

    In the embodiment of the present invention, the laser beam is irradiated from the light absorption layer side. However, since a wavelength with little absorption can be used for the glass substrate, the laser beam may be irradiated from the glass substrate side.

    The molten semiconductor film 103 gradually increases from a low temperature region (that is, a region where the light absorption layer 105 is not directly above the semiconductor film 103) to a high temperature region (that is, a region where the light absorption layer 105 is directly above the semiconductor film 103). Crystallization begins toward. In the present invention, since the temperature is highest at a position directly below the region where the light absorption layer 105 is formed, two single crystals that have grown in opposite directions collide with each other. One large grain single crystal formed in this way has a shape close to a rectangle having a short side of 2 to 5 μm and a long side of about 5 to 30 μm.

    As the solid-state laser, a Yb-doped fiber laser having a near-infrared wavelength is used. The output can be 10 kW. The present embodiment is not limited to this, and a diode laser, an LD-pumped solid state laser, or the like may be used. In this embodiment, a pulsed laser that can melt the semiconductor film for about 10 nanoseconds to 1 millisecond may be used. If the pulse width is about 10 nanoseconds to 1 millisecond, it is possible to irradiate one shot, but if it is less than that, heat is sufficiently conducted to the semiconductor film so that the semiconductor film can be kept in a molten state at 10 MHz or more. It is necessary to irradiate continuously with a repetition frequency of.

    FIG. 3 is an enlarged view of a part of the light absorption layer 105 patterned in an island shape. The symbols in the figure are the same as those in FIG.

    In FIG. 3A, a polycrystalline semiconductor film 103 'having a large grain crystal is formed by laser annealing.

  Next, the insulating film 104 and the light absorption layer 105 are removed by etching. Here, the insulating film 104 and the light absorption layer 105 may be patterned without etching and used as a gate insulating film, a gate electrode, and a wiring. Alternatively, the light absorption layer 105 may be etched while leaving only the insulating film 104.

Next, the polycrystalline semiconductor film 103 ′ is patterned using a photolithography technique to form an island-shaped semiconductor film 304. (FIG. 3B) Patterning is performed so that the grain boundary at the end of crystal growth is not included in the channel formation region. Thereby, a channel formation region can be formed while avoiding a grain boundary in the crystal growth direction. Here, patterning is performed so that the grain boundary at the end of crystal growth is not included in the island-shaped semiconductor film 304. Further, the patterning is performed so that the direction in which the carrier of the thin film transistor moves and the longitudinal direction of the light absorption layer are orthogonal as shown in FIG. Thereby, it can be formed so that no crystal grain boundary is included in the channel length direction. By performing patterning as described above in the present invention, a thin film transistor having high electrical characteristics can be obtained. Before forming a resist mask in patterning, an oxide film is formed by generating ozone by UV irradiation in an aqueous solution containing ozone or in an oxygen atmosphere in order to protect the polycrystalline semiconductor film. The oxide film here also has the effect of improving the wettability of the resist.

  If necessary, a small amount of impurity element (boron or phosphorus) is doped through the oxide film in order to control the threshold value of the TFT before patterning. When doping is performed through the oxide film, the oxide film is removed, and an oxide film is formed again with an aqueous solution containing ozone.

  Next, cleaning is performed to remove unnecessary materials (resist residue, resist stripping solution, and the like) generated during patterning, and then the surface of the island-shaped semiconductor film 304 is covered and silicon oxide to be the gate insulating film 106 is a main component. An insulating film is formed. (Fig. 3 (C))

  Next, after cleaning the surface of the gate insulating film 106, the gate electrode 107 is formed. As the gate electrode 107, a material containing a refractory metal with less hillock generation is preferably used. As the refractory metal with less generation of hillocks, one kind selected from W, Mo, Ti, Ta, Co, or the like, or an alloy thereof is used. Moreover, it is good also as a laminated | stacked two or more layers using nitrides (WN, MoN, TiN, TaN, etc.) of these refractory metals.

  Next, an impurity element imparting n-type conductivity (P, As, or the like), here phosphorus, is added as appropriate to the island-shaped semiconductor film 304 to define the channel formation region 110, and the source region 108 and the drain region 109 are formed. . After the addition, heat treatment, intense light irradiation, or laser light irradiation is performed to activate the impurity element. Simultaneously with activation, plasma damage to the gate insulating film and plasma damage to the interface between the gate insulating film and the semiconductor layer can be recovered.

  In the subsequent steps, an interlayer insulating film 111 is formed, hydrogenation is performed, contact holes reaching the source region and the drain region are formed, a conductive film is formed and patterned, and the source electrode 112 and the drain electrode 113 are formed. To complete a TFT (n-channel TFT). (FIG. 3D) The source electrode 112 and the drain electrode 113 are each an element selected from Mo, Ta, W, Ti, Al, Cu, or a single layer of an alloy material or a compound material containing the element as a main component, Alternatively, these layers are formed. For example, a three-layer structure of a Ti film, a pure Al film, and a Ti film, or a three-layer structure of a Ti film, an Al alloy film containing Ni and C, and a Ti film is used. In consideration of forming an interlayer insulating film or the like in a later step, the electrode cross-sectional shape is preferably a tapered shape.

  Although the top gate type TFT has been described as an example here, the present invention can be applied regardless of the TFT structure. For example, it can be applied to a bottom gate type (reverse stagger type) TFT or a forward stagger type TFT. Is possible.

  Further, the present invention is not limited to the TFT structure of FIG. 3D, and if necessary, a lightly doped drain (LDD) having an LDD region between a channel formation region and a drain region (or source region). ) Structure may be used. In this structure, a region to which an impurity element is added at a low concentration is provided between a channel formation region and a source region or a drain region formed by adding an impurity element at a high concentration, and this region is referred to as an LDD region. I'm calling. Further, a so-called GOLD (Gate-Drain Overlapped LDD) structure in which an LDD region is disposed so as to overlap with a gate electrode through a gate insulating film may be employed.

4A and 4B illustrate examples of GOLD structure TFTs. Note that the same reference numerals are used for the same portions in FIG. 4A because the gate electrode structure and the like are only partially different from those in FIG. A TFT having a GOLD structure illustrated in FIG. 4A includes a first LDD region 26 between the channel formation region 110 and the source region 108, and a second LDD region between the channel formation region 110 and the drain region 109. 27. The first LDD region 26 and the second LDD region 27 are arranged so as to overlap the lower layer 29b of the gate electrode with the gate insulating film 106 interposed therebetween. The gate electrode is composed of a stack of an upper layer 29a and a lower layer 29b wider than the upper layer 29a. Further, the GOLD structure TFT shown in FIG. 4A is provided with a protective film 28 made of a silicon nitride film. As the protective film 28, a dense inorganic insulating film (SiN, SiNO film, etc.) by a PCVD method, a dense inorganic insulating film (SiN, SiNO film, etc.) by a sputtering method, a thin film (DLC film, CN) containing carbon as a main component. It is preferable to use a film, an amorphous carbon film), a metal oxide film (WO ₂ , CaF ₂ , Al ₂ O ₃ , AlN _X O _Y or the like).

In addition, the TFT having the GOLD structure illustrated in FIG. 4B includes a first LDD region 36 between the channel formation region 32 and the source region 30 and a second LD between the channel formation region 32 and the drain region 31. And an LDD region 37. In FIG. 4A, the entire LDD region overlaps the gate electrode, whereas in FIG. 4B, the first LDD region 36 and the second LDD region 37 partially overlap the gate electrode 39. Yes. Note that the TFT shown in FIG. 4B has two gate insulating films, a first gate insulating film 38a made of a silicon oxide film, and a second gate insulating film 38b made of a silicon nitride film. It becomes the lamination of. By using the second gate insulating film 38b made of a silicon nitride film, the gate insulating film can be thinned.

  In the TFT shown in FIG. 4B, the first interlayer insulating film 33a is a silicon nitride film, and the second gate insulating film 38b and the silicon nitride film surround the single-layer gate electrode 39. A first interlayer insulating film 33a is provided. Particularly when the gate electrode 39 is made of an easily oxidizable conductive material such as Mo, it is effective to surround the gate electrode 39 with a silicon nitride film so as not to contact the oxide film. Further, by forming the first interlayer insulating film 33a as a silicon nitride film, it can function as a protective film and improve the adhesion with the second gate insulating film 38b made of the same material.

  In the TFT shown in FIG. 4B, the second interlayer insulating film 33b is a silicon oxide film, and the source electrode 24 and the drain electrode 25 are provided over the second interlayer insulating film 33b.

  3 and 4 are described using n-channel TFTs, it goes without saying that p-channel TFTs can be formed by using p-type impurity elements instead of n-type impurity elements.

  Further, the present invention is not limited to a single-gate TFT, and a multi-gate TFT having a plurality of channel formation regions, for example, a double-gate TFT may be used in order to further reduce variation in the off-current value of the TFT.

  Further, an n-channel TFT and a p-channel TFT can be formed on the same substrate, and a CMOS circuit can be configured by combining these TFTs. A CMOS circuit is a circuit having at least one n-channel TFT and one p-channel TFT (inverter circuit, NAND circuit, AND circuit, NOR circuit, OR circuit, shift register circuit, sampling circuit, D / A converter) Circuit, A / D converter circuit, latch circuit, buffer circuit, etc.). In addition, by combining these CMOS circuits, memory elements such as SRAM and DRAM and other elements can be formed on the substrate. It is also possible to configure a CPU on a substrate by integrating various elements and circuits.

  Further, this embodiment mode can be freely combined with Embodiment Mode 1.

(Embodiment 3)
FIG. 5 is a diagram showing an example in which the light absorption layer of the present invention is formed in multiple layers.

FIG. 5 shows an example in which the light absorption layer includes a first layer and a second layer, and the first layer and the second layer have a portion that does not overlap with each other. FIG. 5A shows a top view of a substrate to be laser annealed, and FIG. 5B shows a cross-sectional view of FIG. Note that the same reference numerals are used for the same portions in FIG. 5 since only the structure of the light absorption layer is partially different from that in FIG.
First, as illustrated in FIG. 5B, a base insulating film 102, a semiconductor film 103, and an insulating film 104 are formed over a substrate 101 having an insulating surface. Then, a light absorption layer first layer 105 a made of a metal element, a semiconductor element, or the like is formed over the insulating film 104.

The first layer 105a is formed by patterning using a photolithography method as shown in FIG. 5B after film formation. Then, a second layer 105b of a light absorption layer is formed over the first layer 105a. The second layer can be formed of a material different from that of the first layer. The second layer 105b is formed by patterning using a photolithography method so as to have a portion that overlaps with a portion that does not overlap with the first layer, as shown in FIG. 5B.
At this time, the light absorption layer including the first layer 105 a and the second layer 105 b preferably has a width of about 0.5 to 50 μm so that the semiconductor film 103 can have a temperature distribution. Moreover, it is preferable that the space | interval is 1 micrometer or more.

  Next, by irradiating the light absorption layer composed of the first layer 105 a and the second layer 105 b with the fundamental wave of the solid-state laser, the light is absorbed and changed to heat, and the semiconductor film 103 is formed through the insulating film 104. Heat is conducted and the semiconductor film 103 is melted. At this time, the semiconductor film 103 can have a temperature distribution such that the portion where the multiple light absorption layers overlap has the highest temperature.

  The molten semiconductor film 103 gradually increases from a low temperature region (that is, a region where the light absorption layer including the first layer 105a and the second layer 105b is not directly above the semiconductor film 103) to a high temperature region (that is, the semiconductor film 103). Crystallization starts toward a region where the first layer 105a and the second layer 105b overlap each other directly above. In the present invention, since the temperature is highest at a position directly below the region where the first layer 105a and the second layer 105b overlap, two single crystals grown in opposite directions in this portion collide with each other. Become. In this manner, a polycrystalline semiconductor film 103 'having a large grain crystal can be formed.

  Next, as shown in FIG. 5C, the light absorption layer including the first layer 105a and the second layer 105b, the insulating film 104, and the polycrystalline semiconductor film 103 ′ are patterned to form the first layer 105a. A gate electrode 107, a gate insulating film 106 made of an insulating film 104, and an island-shaped semiconductor film are formed. At this time, since the grain boundary of the terminal portion of the crystal growth is formed below the portion where the multilayer light absorption layers overlap, only the portion where the multilayer light absorption layer does not overlap, that is, the first layer is formed. A gate electrode 107 is formed using the portion that has been formed. Thereby, a channel formation region can be formed while avoiding a grain boundary in the crystal growth direction.

  Next, an impurity element imparting n-type conductivity (P, As, or the like), here phosphorus, is added as appropriate to the island-shaped semiconductor film to form the source region 108 and the drain region 109, thereby defining the channel formation region 110. After the addition, heat treatment, intense light irradiation, or laser light irradiation is performed to activate the impurity element. Simultaneously with activation, plasma damage to the gate insulating film and plasma damage to the interface between the gate insulating film and the semiconductor layer can be recovered.

  The subsequent steps can be performed in the same manner as in the second embodiment.

  Here, an example in which the light absorption layer is formed of two layers is shown, but the light absorption layer may be a multilayer of three or more layers.

  Further, this embodiment mode can be freely combined with Embodiment Mode 1 or Embodiment Mode 2.

(Embodiment 4)
FIG. 6 is a diagram illustrating another example in which the light absorption layer is formed in multiple layers.

  FIG. 6 illustrates an example in which the light absorption layer is a stacked film in which a first layer and a second layer are stacked, and the first layer and the second layer have different widths. FIG. 6A shows a cross-sectional view of a substrate to be laser annealed. Note that the same reference numerals are used for the same portions in FIG. 6A because only a part of the structure of the light absorption layer is different from that in FIGS.

  First, as illustrated in FIG. 6A, a base insulating film 102, a semiconductor film 103, and an insulating film 104 are formed over a substrate 101 having an insulating surface. Then, a light absorption layer first layer 105 a made of a metal element, a semiconductor element, or the like is formed over the insulating film 104.

The first layer 105a is formed by patterning using a photolithography method as shown in FIG. 6A after film formation. Then, a second layer 105b of a light absorption layer is formed over the first layer 105a. The second layer can be formed of a material different from that of the first layer. The second layer 105b is formed by patterning using a photolithography method so that the width of the second layer 105b is narrower than that of the first layer as shown in FIG. 6A.
At this time, the light absorption layer including the first layer 105 a and the second layer 105 b preferably has a width of about 0.5 to 50 μm so that the semiconductor film 103 can have a temperature distribution. Moreover, it is preferable that the space | interval is 1 micrometer or more.

  In this state, the semiconductor film 103 is exposed to a low-temperature region (that is, directly above the semiconductor film 103) by irradiating the light absorption layer including the first layer 105a and the second layer 105b with the fundamental wave of the solid-state laser. A region where there is no light absorption layer including the first layer 105a and the second layer 105b) is gradually increased to a high temperature region (that is, a region where the first layer 105a and the second layer 105b overlap directly above the semiconductor film 103). The two single crystals that crystallize in the region where the first layer 105a and the second layer 105b overlap and collide with each other to form a grain boundary. In this manner, a polycrystalline semiconductor film 103 'having a large grain crystal can be formed.

  Next, as illustrated in FIG. 6B, the light absorption layer including the first layer 105a and the second layer 105b, the insulating film 104, and the polycrystalline semiconductor film 103 ′ are patterned to form the first layer 105a. A gate electrode 107, a gate insulating film 106 made of an insulating film 104, and an island-shaped semiconductor film are formed. At this time, since the grain boundary of the terminal portion of the crystal growth is formed below the portion where the multilayer light absorption layers overlap, only the portion where the multilayer light absorption layer does not overlap, that is, the first layer is formed. A gate electrode 107 is formed using the portion that has been formed. Thereby, a channel formation region can be formed while avoiding a grain boundary in the crystal growth direction.

  Next, an impurity element imparting n-type conductivity (P, As, or the like), here phosphorus, is added as appropriate to the island-shaped semiconductor film to define the channel formation region 110, and the source region 108 and the drain region 109 are formed. After the addition, heat treatment, intense light irradiation, or laser light irradiation is performed to activate the impurity element. Simultaneously with activation, plasma damage to the gate insulating film and plasma damage to the interface between the gate insulating film and the semiconductor layer can be recovered.

  The subsequent steps can be performed in the same manner as in the second embodiment.

  Here, an example in which the second layer narrower than the first layer is formed on the first layer is shown, but conversely, the first layer wider than the second layer is formed on the second layer. Layers can also be formed.

  Here, an example in which the light absorption layer is formed of two layers is shown, but the light absorption layer may be a multilayer of three or more layers.

  Further, this embodiment mode can be freely combined with Embodiment Mode 1 or Embodiment Mode 2.

(Embodiment 5)
FIG. 7 is a diagram illustrating an example in which a light absorption layer is provided under a semiconductor film. First, the light absorption layer 105 is formed over the substrate 101 having an insulating surface. The light absorption layer 105 is formed by patterning as shown in FIG. 7A using a photolithography method after film formation. Then, the insulating film 104 and the semiconductor film 103 having an amorphous structure are formed over the light absorption layer 105.

  As the substrate 101 having an insulating surface, a glass substrate such as barium borosilicate glass or alumino borosilicate glass is used. Further, a plastic substrate having heat resistance that can withstand the processing temperature in this step, for example, a plastic substrate obtained by processing a material in which inorganic particles having a diameter of several nm are dispersed in an organic polymer matrix into a sheet shape may be used.

The light absorption layer 105 is formed using a material having a higher absorption rate than the semiconductor film 103 in the near-infrared to infrared wavelengths. For example, one kind selected from refractory metals such as W, Mo, Ti, Ta, Cr, Co, or an alloy thereof is used. Further, a nitride of these refractory metals (WN, MoN, TiN, TaN, etc.) or a silicide of the metal (WSi _2, etc. _{MoSi 2, TiSi 2, TaSi 2} , CrSi 2, CoSi 2, PtSi 2) using Two or more layers may be stacked.

As the insulating film 104, an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film (SiO _x N _y ) is used. As a typical example, a structure in which a silicon oxide film is stacked on a silicon nitride film is employed.

As the semiconductor film 103 having an amorphous structure, a semiconductor material containing silicon as its main component is used. Typically, an amorphous silicon film, an amorphous silicon germanium film, or the like is formed by a known means (a sputtering method, an LPCVD method, a plasma CVD method, or the like).
Further, instead of the semiconductor film 103 having an amorphous structure, a semiconductor film having a crystalline structure by simply forming the film (polycrystalline silicon film, microcrystalline semiconductor film (also referred to as a microcrystalline semiconductor film or a semi-amorphous semiconductor film)) Etc.) may be used.

Then, an insulating film 704 is formed over the semiconductor film 103, and in this state, the light absorption layer 105 is irradiated with a fundamental wave of a solid-state laser. Crystallization starts from a region where the absorption layer 105 is not present) gradually toward a high temperature region (that is, a region where the light absorption layer 105 is located immediately below the semiconductor film 103), and immediately above the region where the light absorption layer 105 is formed. The two single crystals grown at the position collide with each other to form a grain boundary. In this way, a polycrystalline semiconductor film 103 ′ is formed. By forming the insulating film 704 and performing crystallization in a state where the semiconductor film 103 is physically pressed by the insulating film 704, unevenness can be prevented from occurring in the crystal collision portion. Even if irregularities are formed, the size can be reduced. In addition, impurities can be prevented from being mixed into the semiconductor film in the crystallization step and contaminating the semiconductor film. As the insulating film 704, an insulating film such as a silicon oxide film or a silicon oxynitride film (SiO _x N _y ) is formed to a thickness of about 50 to 300 nm. Two or more silicon oxide films, silicon nitride films, silicon oxynitride films (SiO _x N _y ), or the like may be stacked.

  Next, as shown in FIG. 7B, the polycrystalline semiconductor film 103 ′ is patterned, and an impurity element imparting n-type (P, As, or the like) is added to form a channel formation region 110, a source region 108, and a drain region. 109, a polycrystalline semiconductor film having a first LDD region 706 between the channel formation region 110 and the source region 108 and a second LDD region 707 between the channel formation region 110 and the drain region 109 is formed. Here, the insulating film 104 and the light absorption layer 105 are used as the gate insulating film 106 and the gate electrode 107 without being etched. Thus, by using the light absorption layer 105 as the gate electrode 107, the number of grain boundaries in the channel length direction can be determined to be one, and the characteristics of a plurality of thin film elements on the same substrate can be made uniform.

Next, an interlayer insulating film 111 is formed, contact holes reaching the source region and the drain region are formed, a conductive film is formed and patterned to form the source electrode 112 and the drain electrode 113, thereby forming a bottom gate type TFT. (N-channel TFT) is completed. As the interlayer insulating film 111, an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film (SiO _x N _y ) is used. As a typical example, a structure in which a silicon oxide film is stacked on a silicon nitride film is employed.

  In FIG. 7, the n-channel TFT is used for explanation, but it goes without saying that a p-channel TFT can be formed by using a p-type impurity element instead of the n-type impurity element.

  Further, the present invention is not limited to a single-gate TFT, and a multi-gate TFT having a plurality of channel formation regions, for example, a double-gate TFT may be used in order to further reduce variation in the off-current value of the TFT.

  Further, this embodiment mode can be freely combined with Embodiment Mode 1 or Embodiment Mode 2.

(Embodiment 6)
FIG. 8 is a diagram showing an example in which the light absorption layer of the present invention is not formed over the entire substrate but selectively formed in a specific region of the substrate.

FIG. 8A shows an example in which a light absorption layer is selectively formed only in a region where a thin film element is formed. Here, the thin film element is formed by appropriately laminating a thin film of a semiconductor, an insulator or a conductor on a substrate, and typically includes a thin film transistor.
On the substrate, there is a region where a thin film element is not formed in a portion where the terminal portion 1208 and the sealant 1205 are provided. These regions do not require crystal growth of a semiconductor film having an amorphous structure. Therefore, by selectively forming the light absorption layer only in the region where the thin film element is formed without forming the light absorption layer in those regions, only the necessary region is crystal-grown, and only the necessary region is polycrystalline. A semiconductor film can be formed. In FIG. 8A, the light absorption layer 105 is not formed in a portion where the terminal portion 1208 or the sealant 1205 is provided, and the light absorption layer 105 is formed in the source side driver circuit 1201, the gate side driver circuit 1203, and the pixel portion 1202. An example of forming is shown.

  In FIG. 8B, the light absorption layer 105 is not formed in a portion where the terminal portion 1208 and the sealant 1205 are provided, or in the pixel portion 1202, and only in the driver circuit portion such as the source side driver circuit 1201 and the gate side driver circuit 1203. An example in which the light absorption layer 105 is formed is shown. By selectively forming the light absorption layer only in the driver circuit portion as shown in FIG. 8B, a polycrystalline semiconductor film having a large grain crystal can be formed only in the driver circuit portion. As a result, the driver circuit portion can form a thin film element using a polycrystalline semiconductor film having a large grain crystal. On the other hand, since the semiconductor film of the pixel portion is not crystallized, the pixel portion can form a thin film element using a semiconductor film having an amorphous structure. Thus, by selectively forming a light absorption layer only in a region using a polycrystalline semiconductor film having a large grain crystal, a polycrystalline semiconductor film and a semiconductor film having an amorphous structure on a single substrate And thin film elements having different characteristics can be formed on a single substrate.

  Further, this embodiment mode can be freely combined with Embodiment Mode 1, Embodiment Mode 2, Embodiment Mode 3, Embodiment Mode 4, or Embodiment Mode 5.

(Embodiment 7)
An example of a dual gate TFT using the present invention will be described below with reference to FIG.

  In the TFT illustrated in FIG. 9, a base insulating film 711 is provided over a substrate 710 having an insulating surface, and a lower electrode 712 is provided over the base insulating film 711.

The lower electrode 712 also serves as a light absorption layer. Therefore, a material having a higher absorptance than the semiconductor film 103 is used in the near-infrared to infrared wavelengths. For example, one kind selected from refractory metals such as W, Mo, Ti, Ta, Cr, Co, or an alloy thereof is used. Further, a nitride of these refractory metals (WN, MoN, TiN, TaN, etc.) or a silicide of the metal (WSi _2, etc. _{MoSi 2, TiSi 2, TaSi 2} , CrSi 2, CoSi 2, PtSi 2) using Two or more layers may be stacked. Here, tungsten is used for the lower electrode 712, and a tungsten layer is formed to a thickness of 50 nm. The thickness of the lower electrode 712 may be 20 nm to 50 nm.

Thereafter, the lower electrode 712 is formed by etching using a mask (for example, a resist mask). At this time, for example, the resist mask can be thinned by applying oxygen plasma. When etching is performed after such a step, the side surface of the lower electrode 712 to be a gate electrode can be tapered.

Note that the lower electrode 712 can also be directly formed by a printing method capable of discharging a material to a predetermined place or a droplet discharging method typified by an inkjet method. When this method is used, the lower electrode 712 can be formed without using a mask.

  The lower electrode 712 is covered with a first insulating film 713 and a second insulating film 714 that serve as a first gate insulating film. The first gate insulating film is an insulating film containing at least oxygen or nitrogen. Note that here, a silicon nitride oxide film (SiNxOy (where x> y)) is formed as the first insulating film 713 with a thickness of 50 nm, and a silicon oxynitride film (SiOxNy (wherein x> y) is used as the second insulating film 714. x> y)) is formed with a thickness of 100 nm, but is not limited thereto.

  A semiconductor layer which overlaps with the lower electrode 712 is provided over the second insulating film 714 with the first gate insulating film interposed therebetween. This semiconductor layer is formed by crystallizing a semiconductor film formed by a film forming method such as a low pressure thermal CVD method, a plasma CVD method, or a sputtering method by the laser irradiation method described in the fifth embodiment and then patterning. With the laser irradiation method using the fundamental wave of the solid-state laser shown in Embodiment Mode 5, a single crystal grain boundary in the channel length direction can be determined, and the characteristics of a plurality of thin film elements on the same substrate can be aligned. it can.

  The semiconductor layer is covered with a second gate insulating film 718 made of an insulating film containing at least oxygen or nitrogen. In addition, the second gate insulating film 718 is formed without performing laser irradiation for crystallization, the semiconductor layer is physically pressed by the second gate insulating film 718, and laser irradiation is performed with the laser device illustrated in FIG. May be performed. In that case, film jump due to laser irradiation can be prevented by the second gate insulating film 718.

  An upper electrode lower layer 720 b and an upper electrode upper layer 720 a are provided over the second gate insulating film 718. The lower layer 720b of the upper electrode has a pattern wider than the upper layer 720a of the upper electrode. Both the lower layer 720b of the upper electrode and the upper layer 720a of the upper electrode may be made of a conductive material.

  The semiconductor layer includes at least a source region 716 to which an impurity element is added at a high concentration, a channel formation region 715, and a drain region 717 to which an impurity element is added at a high concentration. Here, the first low-concentration impurity region (first LDD region) 719a overlapping the lower layer 720b of the upper electrode is added to the source region 716 and the channel formation region 715 by adding an impurity element with the lower layer 720b of the upper electrode provided. And formed between. Similarly, a second low-concentration impurity region (second LDD region) 719 b that overlaps the lower layer 720 b of the upper electrode is formed between the drain region 717 and the channel formation region 715.

  An insulating film 721 covering the lower layer 720b of the upper electrode and the upper layer 720a of the upper electrode is provided, and an insulating film 722 for improving flatness is provided on the insulating film 721. As the insulating film 722 that improves planarity, an organic material or an inorganic material can be used. As the organic material, polyimide, acrylic, polyamide, polyimide amide, resist, benzocyclobutene, siloxane, or polysilazane can be used. Siloxane has a skeleton structure formed of a bond of silicon (Si) and oxygen (O). As a substituent, an organic group containing at least hydrogen (for example, an alkyl group or an aromatic hydrocarbon) is used. A fluoro group may be used as a substituent. Alternatively, an organic group containing at least hydrogen and a fluoro group may be used as a substituent. Polysilazane is formed using a polymer material having a bond of silicon (Si) and nitrogen (N), that is, a liquid material containing so-called polysilazane as a starting material. Examples of the inorganic material include at least oxygen or silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy (where x> y)), silicon nitride oxide (SiNxOy (where x> y)), or the like. An insulating film containing nitrogen can be used. Alternatively, a stacked film of these insulating films may be used as the insulating film 722 for improving flatness. In particular, when an insulating film that increases flatness is formed using an organic material, the flatness is increased, but moisture and oxygen are absorbed by the organic material. In order to prevent this, an insulating film containing an inorganic material is preferably formed over the organic material. When an insulating film containing nitrogen is used as the inorganic material, entry of alkali ions such as Na can be prevented.

  Further, a source wiring 723 is provided over the insulating film 722 that improves planarity through a contact hole reaching the source region 716. Similarly, a drain wiring 724 is provided over the insulating film 722 for improving flatness through a contact hole reaching the drain region 717.

  The TFT having the structure shown in FIG. 9 is a dual-gate TFT in which a channel (dual channel) is formed above and below one semiconductor layer. The lower electrode 712 of the dual-gate TFT has a feature that the TFT can be controlled separately from the upper electrode, can suppress variation in threshold value, and can suppress off-state current. In the dual gate TFT, a capacitor can be formed by a lower electrode and a semiconductor layer with an insulating film interposed therebetween.

  Further, this embodiment mode can be freely combined with Embodiment Mode 1, Embodiment Mode 2, Embodiment Mode 5, or Embodiment Mode 6.

(Embodiment 8)
The present invention can be applied to a method for manufacturing a liquid crystal display device or a light-emitting display device. Here, an example of a display device in which a pixel portion, a driver circuit, and a terminal portion are formed over the same substrate is shown. According to the present invention, a semiconductor thin film that can follow high-speed driving can be obtained, and a driving circuit can be configured using higher-performance TFTs. FIG. 10 shows an example of a light-emitting device having an organic light-emitting element as a display device.

After a base insulating film is formed over the substrate 610, each semiconductor layer is formed. Crystallization of the semiconductor layer is performed according to any of Embodiments 1 to 4. When crystallization is performed according to any of Embodiments 1 to 4, a semiconductor film having a large grain size can be formed by growing a semiconductor film having a large area at a time in a predetermined direction. In addition, the position of the crystal grain boundary can be controlled. Therefore, a thin film element including no crystal grain boundary in the channel length direction can be formed, and a thin film element having high electrical characteristics can be formed.

  Next, after forming a gate insulating film covering the semiconductor layer, each gate electrode and terminal electrode are formed. Next, an impurity element imparting n-type conductivity (typically phosphorus or As) is doped into the semiconductor in order to form an n-channel TFT 636, and p-type is imparted to the semiconductor in order to form a p-channel TFT 637. A source region and a drain region, and if necessary, an LDD region are appropriately formed by doping with an impurity element (typically boron). Next, after forming a silicon nitride oxide film (SiNO film) containing hydrogen obtained by a PCVD method, the impurity element added to the semiconductor layer is activated and hydrogenated.

  Next, a planarization insulating film 616 to be an interlayer insulating film is formed. As the planarization insulating film 616, an insulating film having a skeleton structure formed of a bond of silicon (Si) and oxygen (O) obtained by a coating method is used.

Next, a contact hole is formed in the planarization insulating film using a mask, and at the same time, the planarization insulating film at the peripheral portion is removed.

Next, etching is performed using the planarization insulating film 616 as a mask to selectively remove the exposed SiNO film or gate insulating film containing hydrogen.

Next, after forming a conductive film, etching is performed using a mask to form drain wirings and source wirings.

Next, the first electrode 623, that is, the anode (or cathode) of the organic light emitting element is formed. As the first electrode 623, a conductive film having a high work function is preferably used, and in addition to indium tin oxide (ITO), for example, indium tin oxide containing Si element (ITSO) or indium oxide is 2 to 20%. A film containing a transparent conductive material such as IZO (Indium Zinc Oxide) mixed with 1% zinc oxide (ZnO) or a combination thereof can be used. In particular, ITSO does not crystallize like ITO even when baked and remains in an amorphous state. Therefore, ITSO has higher flatness than ITO, and even if the layer containing an organic compound is thin, short-circuiting with the cathode hardly occurs, so that ITSO is suitable as an anode of a light-emitting element.

Next, an SOG film obtained by a coating method (for example, an SiOx film containing an alkyl group) is patterned to form an insulator 629 (referred to as a bank, a partition, a barrier, a bank, or the like) that covers an end portion of the first electrode 623. Form. The insulator 629 is formed using a material containing silicon, an organic material, and a compound material. A porous film may be used. However, it is preferable to use a photosensitive or non-photosensitive material such as acrylic or polyimide because the side surface has a shape in which the radius of curvature continuously changes and the upper thin film is formed without being cut off. Further, as a material of the insulator 629, a photosensitive or non-photosensitive organic material in which a black pigment or carbon black is dispersed may be used, and the insulator 629 may function as a black matrix (BM).

  Next, a layer 624 containing an organic compound is formed by an evaporation method, a thermal transfer method, a droplet discharge method, or a screen printing method. The layer 624 containing an organic compound has a stacked structure, and is sequentially stacked with, for example, an electron transport layer (electron injection layer), a light emitting layer, a hole transport layer, and a hole injection layer.

  Here, molybdenum oxide (MoOx), 4,4′-bis [N- (1-naphthyl) -N-phenyl-amino] -biphenyl (α-NPD), and rubrene are used together by vapor deposition. A layer containing a first organic compound (first layer) is formed over the first electrode 623 by vapor deposition. Next, α-NPD is selectively deposited using a deposition mask to form a hole transport layer (second layer) on the layer containing the first organic compound. Further, in place of molybdenum oxide (MoOx), one or more tumors selected from MoNx, VOx, RuOx, CoOx, CuOx, ZnNx, WNx, InOx, InNx, SnOx, SnNx, SbOx, and SbNx can be used. .

Next, a light emitting layer (third layer) is selectively formed. The light-emitting layer is formed of a charge injecting and transporting substance containing an organic compound or an inorganic compound and a light-emitting material. From the number of molecules thereof, a low molecular weight organic compound or a medium molecular weight organic compound (having no sublimation property and a molecular number of 20 Or an organic compound having a chain molecule length of 10 μm or less), including one or a plurality of layers selected from high-molecular organic compounds, and having an electron injection / transport property or a hole injection / transport property You may combine with a compound. Furthermore, a triplet excitation material containing a metal complex or the like may be used for the light emitting layer in addition to a singlet excitation light emitting material. For example, among red light emitting pixels, green light emitting pixels, and blue light emitting pixels, a red light emitting pixel having a relatively short luminance half time is formed of a triplet excitation light emitting material, and the other A singlet excited luminescent material is used. The triplet excited luminescent material has a feature that the light emission efficiency is good, so that less power is required to obtain the same luminance. That is, when applied to a red pixel, the amount of current flowing through the light emitting element can be reduced, so that reliability can be improved. As a reduction in power consumption, a red light-emitting pixel and a green light-emitting pixel may be formed using a triplet excitation light-emitting material, and a blue light-emitting pixel may be formed using a singlet excitation light-emitting material. By forming a green light-emitting element having high human visibility with a triplet excited light-emitting material, power consumption can be further reduced.

  Examples of triplet excited luminescent materials include those using a metal complex as a dopant, and metal complexes having a third transition series element platinum as the central metal and metal complexes having iridium as the central metal are known. Yes. The triplet excited light-emitting material is not limited to these compounds, and a compound having the above structure and having an element belonging to group 8 to 10 in the periodic table as a central metal can also be used.

  In order to obtain a full-color display device, the vapor deposition mask is aligned for each of the emission colors (R, G, B) to selectively deposit each. Typically, a light emitting layer corresponding to each color of R (red), G (green), and B (blue) is formed for each pixel.

Next, Alq ₃ (tris (8-quinolinolato) aluminum) is selectively deposited using a deposition mask to form an electron transport layer (fourth layer) on the light emitting layer. Next, 4,4-bis (5-methylbenzoxazol-2-yl) stilbene (abbreviation: BzOs) and lithium (Li) are co-evaporated to cover the electron transport layer and the insulator, and an electron injection layer is formed over the entire surface. (Fifth layer) is formed. Note that each material of the layer 624 (the first layer to the fifth layer) containing an organic compound is appropriately selected, and each film thickness is also adjusted.

  The above-described substances forming the layer 624 containing an organic compound are examples, and include a hole injection transport layer, a hole transport layer, an electron injection transport layer, an electron transport layer, a light emitting layer, an electron block layer, a hole block layer, and the like. A light-emitting element can be formed by appropriately stacking these functional layers. Moreover, you may form the mixed layer or mixed junction which combined these each layer. The layer structure of the light-emitting layer can be changed, and instead of having a specific electron injection region or light-emitting region, it is possible to provide a modification with an electrode for this purpose or a dispersed light-emitting material. Can be permitted without departing from the spirit of the present invention.

Next, a second electrode 625 made of a transparent conductive film, that is, a cathode (or an anode) of the organic light-emitting element is formed over the layer 624 containing an organic compound. Next, a transparent protective layer 626 is formed by vapor deposition or sputtering. The transparent protective layer 626 protects the second electrode 625. As the transparent protective layer 626, a dense inorganic insulating film (SiN, SiNO film, etc.) by a PCVD method, a dense inorganic insulating film (SiN, SiNO film, etc.) by a sputtering method, a thin film (DLC film, CN film, amorphous carbon film), metal oxide film (WO ₂ , Al ₂ O ₃ , AlN _X O _Y etc.) are preferably used. Transparent means a visible light transmittance of 8
It indicates 0 to 100%.

Next, a transparent sealing substrate 633 is attached with a sealant 628 to seal the light emitting element. That is, the light emitting display device is sealed with a pair of substrates by surrounding the outer periphery of the display region with a sealant. Since the interlayer insulating film of the TFT is provided on the entire surface of the substrate, when the sealing material pattern is drawn on the inner side of the outer peripheral edge of the interlayer insulating film, one of the interlayer insulating films located outside the sealing material pattern. There is a risk of moisture and impurities entering from the part. Accordingly, the outer periphery of the planarization insulating film used as the interlayer insulating film of the TFT is overlapped with the inside of the sealing material pattern, preferably, the sealing material pattern so that the end of the planarizing insulating film covers the sealing material. . Note that a region surrounded by the sealant 628 is filled with a transparent filler 627. As the transparent filler 627, ultraviolet curable resin, thermosetting resin, silicone resin, epoxy resin, acrylic resin, polyimide resin, phenol resin, PVC (polyvinyl chloride), PVB (polyvinyl butyral) or EVA (ethylene vinyl acetate) Can be used.

  Further, instead of filling the region surrounded by the sealing material 628 with a transparent filler, it may be filled with a dry inert gas. In that case, calcium oxide, barium oxide, etc. A desiccant that absorbs moisture by chemical adsorption is disposed.

  Finally, the FPC 632 is attached to the terminal electrode by an anisotropic conductive film 631 by a known method. The terminal electrode is preferably made of a transparent conductive film, and is formed on the terminal electrode formed simultaneously with the gate wiring. (Fig. 10)

Through the above steps, the pixel portion, the driver circuit, and the terminal portion can be formed over the same substrate.

  In addition, light from the light-emitting element passes through the substrate 610 and the sealing substrate 633 and is extracted to both sides. The structure illustrated in FIG. 10 is a light-emitting device having a structure in which light is extracted through both a substrate and a sealing substrate.

  A polarizing plate, a circularly polarizing plate, or a combination thereof can be provided depending on the structure of the light-emitting device in which light is extracted through both the substrate and the sealing substrate. As a result, a clear black display can be performed and the contrast is improved. Furthermore, reflection light can be prevented by providing a circularly polarizing plate.

  In addition, when a reflective metal material is used instead of the second electrode 625 formed of a transparent conductive film, a bottom emission type light-emitting device can be obtained. When the first electrode 623 made of a transparent conductive film is used, a top emission light-emitting device can be obtained.

  Further, if necessary, not only a polarizing plate and a circularly polarizing plate, but also other optical films (such as a phase difference plate, a color filter, a color conversion filter) and a micro lens array may be provided. For example, a color filter may be provided on the light emitting element side surface or the viewer side surface of the sealing substrate that overlaps the display region, and the color purity of each light emission may be improved from the RGB light emitting elements provided in the display unit. . Alternatively, a white light emitting element may be provided in the display portion, and a color filter or a color filter and a color conversion layer may be separately provided to enable full color display.

  In the light emitting device, a driving method for screen display is not particularly limited, and for example, a dot sequential driving method, a line sequential driving method, a surface sequential driving method, or the like may be used. Typically, a line sequential driving method is used, and a time-division gray scale driving method or an area gray scale driving method may be used as appropriate. The video signal input to the source line of the light-emitting device may be an analog signal or a digital signal, and a drive circuit or the like may be designed in accordance with the video signal as appropriate.

  Further, in a light emitting device in which a video signal is digital, there are a video signal input to a pixel having a constant voltage (CV) and a constant current (CC). A video signal having a constant voltage (CV) includes a constant voltage (CVCV) applied to the light emitting element and a constant current (CVCC) applied to the light emitting element. In addition, a video signal having a constant current (CC) includes a constant voltage (CCCV) applied to the light emitting element and a constant current (CCCC) applied to the light emitting element.

  In the light emitting device, a protection circuit (such as a protection diode) for preventing electrostatic breakdown may be provided.

Further, an example in which an FPC or a driving IC for driving is mounted on a light-emitting display panel manufactured by the above manufacturing method will be described.

  FIG. 11A illustrates an example of a top view of a light-emitting device in which an FPC 1209 is attached to four terminal portions 1208. Over a substrate 1210, a pixel portion 1202 including a light emitting element and a TFT, a gate side driver circuit 1203 including a TFT, and a source side driver circuit 1201 including a TFT are formed. The active layer of the TFT is composed of a semiconductor film having a crystal structure, and these circuits are formed on the same substrate. Therefore, an EL display panel that realizes system-on-panel can be manufactured.

Note that the substrate 1210 is covered with a protective film except for the contact portion, and a base layer containing a substance having a photocatalytic function is provided over the protective film.

  In addition, connection regions 1207 provided at two positions so as to sandwich the pixel portion are provided in order to contact the second electrode of the light emitting element with a lower wiring. Note that the first electrode of the light-emitting element is electrically connected to a TFT provided in the pixel portion.

  Further, the sealing substrate 1204 is fixed to the substrate 1210 with a sealant 1205 that surrounds the pixel portion and the driver circuit and a filling material that is surrounded by the sealant. Moreover, it is good also as a structure filled with the filling material containing a transparent desiccant. Further, a desiccant may be disposed in a region that does not overlap with the pixel portion.

  In addition, the structure shown in FIG. 11A shows a preferable example of a light emitting device having a relatively large size (for example, 4.3 inches diagonal) of the XGA class, but FIG. 11B shows a narrow frame. This is an example in which a suitable COG method is adopted with a small size (for example, a diagonal of 1.5 inches).

In FIG. 11B, a driver IC 1301 is mounted on a substrate 1310, and an FPC 1309 is mounted on a terminal portion 1308 arranged at the tip of the driver IC. A plurality of driver ICs 1301 to be mounted may be formed on a rectangular substrate having a side of 300 mm to 1000 mm or more from the viewpoint of improving productivity. That is, a plurality of circuit patterns having a drive circuit portion and an input / output terminal as one unit are formed on the substrate, and finally, the drive ICs may be taken out by dividing them. When the semiconductor layer of the TFT used for the driving IC is crystallized according to any of Embodiments 1 to 4, a high-performance driving IC can be obtained. The long side of the driving IC may be formed in a rectangular shape having a long side of 15 to 80 mm and a short side of 1 to 6 mm in consideration of the length of one side of the pixel portion and the pixel pitch. Or a length obtained by adding one side of the pixel portion and one side of each driver circuit.

  The advantage of the external dimensions of the driving IC over the IC chip is the length of the long side. When a driving IC having a long side of 15 to 80 mm is used, the number required for mounting corresponding to the pixel portion is obtained. This is less than when an IC chip is used, and the manufacturing yield can be improved. Further, when the driving IC is formed over the glass substrate, the shape of the substrate used as a base is not limited, and thus productivity is not impaired. This is a great advantage compared with the case where the IC chip is taken out from the circular silicon wafer.

  Alternatively, a TAB method may be employed. In that case, a plurality of tapes may be attached and a driving IC may be mounted on the tapes. As in the case of the COG method, a single drive IC may be mounted on a single tape. In this case, a metal piece or the like for fixing the drive IC may be attached together due to strength problems.

The substrate 1310 is also covered with a protective film other than the contact portion, and a base layer containing a substance having a photocatalytic function is provided on the protective film.

  A connection region 1307 provided between the pixel portion 1302 and the driver IC 1301 is provided in order to contact the second electrode of the light-emitting element with a lower wiring. Note that the first electrode of the light-emitting element is electrically connected to a TFT provided in the pixel portion.

  In addition, the sealing substrate 1304 is fixed to the substrate 1310 with a sealing material 1305 surrounding the pixel portion 1302 and a filling material surrounded by the sealing material.

  In the case where an amorphous semiconductor film is used as the active layer of the TFT in the pixel portion, the structure shown in FIG. 11B is used, or a light absorption layer is formed only in a region where a driver circuit is formed according to Embodiment 6. By forming, a polycrystalline semiconductor film can be formed only in a region where a driver circuit is formed.

  Although an example of an active matrix light-emitting device is shown here as a display device, it is needless to say that the present invention can also be applied to an active matrix liquid crystal display device. In an active matrix liquid crystal display device, a display pattern is formed on a screen by driving pixel electrodes arranged in a matrix. Specifically, a voltage is applied between a selected pixel electrode and a counter electrode corresponding to the pixel electrode, thereby arranging the pixel electrode provided on the element substrate and the counter electrode provided on the counter substrate. The optical modulation of the liquid crystal layer is performed, and this optical modulation is recognized by the observer as a display pattern. The counter substrate and the element substrate are arranged at equal intervals and filled with a liquid crystal material. The liquid crystal material may be a method of dropping the liquid crystal under reduced pressure so that bubbles do not enter with the sealing material as a closed pattern, and bonding both substrates together, or providing a sealing pattern having an opening, and a TFT substrate Alternatively, a dip type (pumping type) in which liquid crystal is injected by using a capillary phenomenon after bonding may be used.

  The present invention can also be applied to a liquid crystal display device using a field sequential driving method in which an optical shutter is used without using a color filter, and the backlight light sources of three colors of RGB blink at high speed.

  Further, this embodiment mode can be freely combined with Embodiment Mode 1, Embodiment Mode 2, Embodiment Mode 3, Embodiment Mode 4, Embodiment Mode 5, Embodiment Mode 6, or Embodiment Mode 7. .

(Embodiment 9)
In this embodiment, an example in which a CPU (Central Processing Unit) is manufactured using the present invention is shown in FIGS. 12A to 12C, FIGS. 13A to 13C, 14 (A) to 14 (C), FIG. 15 (A), FIG. 15 (B), and FIG.

  As shown in FIG. 12A, a base insulating film 1401 is formed over a substrate 1400 having an insulating surface. As the substrate 1400, for example, a glass substrate such as barium borosilicate glass or alumino borosilicate glass can be used. In addition, plastics typified by PET, PES, PEN, and substrates made of flexible synthetic resin such as acrylic generally tend to have lower heat-resistant temperatures than other substrates. Any material that can withstand the processing temperature in the process can be used.

  The base insulating film 1401 is provided to prevent alkali metal such as Na or alkaline earth metal contained in the substrate 1400 from diffusing into the semiconductor film and adversely affecting the characteristics of the semiconductor element. Therefore, an insulating film such as silicon oxide, silicon nitride, silicon oxide containing nitrogen, or the like that can suppress diffusion of alkali metal or alkaline earth metal into the semiconductor film is used.

  An amorphous semiconductor film 1402 is formed over the base insulating film 1401. The thickness of the amorphous semiconductor film 1402 is 25 to 100 nm (preferably 30 to 60 nm). As the amorphous semiconductor, not only silicon but also silicon germanium can be used. When silicon germanium is used, the concentration of germanium is preferably about 0.01 to 4.5 atomic%. Here, a semiconductor film containing 66 nm silicon as a main component (also referred to as an amorphous silicon film or amorphous silicon) is used.

  After that, as in Embodiment Mode 1 or Embodiment Mode 2, an insulating film 1434 and a light absorption layer 1435 made of a metal element, a semiconductor element, or the like are formed over the amorphous semiconductor film 1402.

    The light absorption layer 1435 is formed into a pattern having a longitudinal direction using a photolithography method after film formation. At this time, the patterned light absorption layer 1435 preferably has a width of about 0.5 to 50 μm so that the amorphous semiconductor film 1402 has a temperature distribution. Moreover, it is preferable that the space | interval is 1 micrometer or more.

  By irradiating the light absorption layer 1435 with the fundamental wave of the solid-state laser in this state, the amorphous semiconductor film 1402 has a low temperature region (that is, a region where the light absorption layer 1435 is not directly above the amorphous semiconductor film 1402). ) Gradually starts from a high temperature region (that is, a region where the light absorption layer 1435 is directly above the amorphous semiconductor film 1402), and a polycrystalline semiconductor film is formed. Then, a grain boundary is formed at a position immediately above the region where the light absorption layer 1435 is formed.

  Next, the insulating film 1434 and the light absorption layer 1435 are removed by etching. Here, the insulating film 1434 and the light absorption layer 1435 may be patterned without etching and used as a gate insulating film, a gate electrode, and a wiring. Alternatively, the light absorption layer 1435 may be etched while leaving only the insulating film 1434.

  Next, as illustrated in FIG. 12C, the polycrystalline semiconductor film is patterned into a predetermined shape to obtain island-shaped semiconductor layers 1406a to 1406e. The patterning is performed so that the grain boundary at the end of crystal growth is not included in the channel formation region. Thereby, a channel formation region can be formed while avoiding a grain boundary in the crystal growth direction. Patterning is performed so that the direction in which the carrier of the thin film transistor moves and the longitudinal direction of the light absorption layer are orthogonal. Thereby, it can be formed so that no crystal grain boundary is included in the channel length direction. By performing patterning as described above in the present invention, a thin film transistor having high electrical characteristics can be obtained.

  Next, if necessary, a small amount of an impurity element (such as boron) is added in order to bring the threshold value, which is an electrical characteristic of the thin film transistor, closer to zero.

  Next, an insulating film that covers the island-shaped semiconductor layers 1406a to 1406e, that is, a so-called gate insulating film 1408 is formed. Note that the surface of the island-shaped semiconductor film is washed with hydrofluoric acid or the like before the gate insulating film 1408 is formed. The gate insulating film 1408 is formed of an insulating film containing silicon with a thickness of 10 to 150 nm, preferably 20 to 40 nm, using a plasma CVD method or a sputtering method. Needless to say, the gate insulating film is not limited to the silicon oxide film, and another insulating film containing silicon (such as a silicon nitride film or a silicon oxynitride film) may be used as a single layer or a stacked structure.

  After that, conductive films 1409a and 1409b to be gate electrodes are formed over the gate insulating film 1408. Although the gate electrode has a two-layer structure here, it may of course be a single layer or a laminate of three or more layers. The conductive films 1409a and 1409b may be formed using an element selected from Ta, W, Ti, Mo, Al, and Cu, or an alloy material or a compound material containing the element as a main component.

  Next, as illustrated in FIG. 13A, a resist mask 1410 for etching the first conductive film 1409a and the second conductive film 1409b is formed. Note that the end portion of the resist mask 1410 may have a tapered shape, and the shape of the resist mask may be a sector shape or a trapezoid shape.

  Next, as illustrated in FIG. 13B, the second conductive film 1409 b is selectively etched using a resist mask 1410. Note that the first conductive film 1409a functions as a so-called etching stopper so that the gate insulating film and the semiconductor film are not etched. The etched second conductive film 1409b has a gate length 1413 of 0.2 μm to 1.0 μm.

  Next, as illustrated in FIG. 13C, the first conductive film 1409a is etched with the resist mask 1410 provided. At this time, the first conductive film 1409a is etched under a condition with a high selection ratio between the gate insulating film 1408 and the first conductive film 1409a. Through this step, the resist mask 1410 and the second conductive film 1409b may be slightly etched and further thinned. As described above, a gate electrode having a very small gate length of 1.0 μm or less is formed.

Next, the resist mask 1410 is removed by O ₂ ashing or a resist stripping solution, and a resist mask 1415 for adding impurities is appropriately formed. Here, a resist mask 1415 is formed so as to cover a region to be a p-channel TFT.

Next, as shown in FIG. 14A, phosphorus (P), which is an impurity element, is added in a self-aligning manner to a region to be an n-channel TFT using the gate electrode as a mask. Here, phosphine (PH ₃ ) is doped at 60 to 80 keV. Through this step, impurity regions 1416a to 1416c are formed in a region to be an n-channel TFT.

  Next, the resist mask 1415 is removed, and a resist mask 1417 is formed so as to cover a region to be an n-channel TFT. Next, as shown in FIG. 14B, boron (B) which is an impurity element is added in a self-aligning manner using the gate electrode as a mask. By this step, impurity regions 1418a and 1418b are formed in a region to be a p-channel TFT.

  Next, after removing the resist mask 1417, as shown in FIG. 14C, insulating films covering the side surfaces of the gate electrode, so-called sidewalls 1419a to 1419c, are formed. The sidewall can be formed by performing etching as appropriate after an insulating film containing silicon is formed by a plasma CVD method or a low pressure CVD (LPCVD) method.

Next, a resist mask 1421 is formed over the p-channel TFT, and phosphine (PH ₃ ) is doped at 15 to 25 keV to form high-concentration impurity regions, so-called source regions and drain regions. By this step, as shown in FIG. 14C, high-concentration impurity regions 1420a to 1420c are formed in a self-aligning manner using the side walls 1419a to 1419c as masks.

Next, the resist mask 1421 is removed by O ₂ ashing or a resist stripping solution.

  Next, heat treatment for activating each impurity region is performed. Here, the impurity region is activated by laser irradiation. Alternatively, the impurity region may be activated by heating the substrate to 550 ° C. in a nitrogen atmosphere.

  Next, a first interlayer insulating film 1422 covering the gate insulating film 1408 and the gate electrode is formed. As the first interlayer insulating film 1422, an inorganic insulating film containing hydrogen, for example, a silicon nitride film is used.

  Thereafter, heat treatment is performed and hydrogenation is performed. A dangling bond of the silicon oxide film or the silicon film is terminated by hydrogen released from the silicon nitride film which is the first interlayer insulating film 1422.

  Next, as shown in FIG. 15A, a second interlayer insulating film 1423 is formed so as to cover the first interlayer insulating film 1422. The second interlayer insulating film 1423 is formed using an inorganic material (silicon oxide, silicon nitride, silicon nitride containing oxygen, etc.), a photosensitive or non-photosensitive organic material (polyimide, acrylic, polyamide, polyimide amide, resist, or benzocyclobutene). ), Siloxane, or a laminated structure thereof. Siloxane has a skeleton structure formed of a bond of silicon (Si) and oxygen (O). As a substituent, an organic group containing at least hydrogen (for example, an alkyl group or an aromatic hydrocarbon) is used. A fluoro group may be used as a substituent. Alternatively, an organic group containing at least hydrogen and a fluoro group may be used as a substituent.

  Next, openings, so-called contact holes, are formed in the gate insulating film 1408, the first interlayer insulating film 1422, and the second interlayer insulating film 1423. Then, as shown in FIG. 15B, wirings 1425a to 1425e connected to the impurity regions are formed. Further, if necessary, a wiring connected to the gate electrode is formed at the same time. Note that these wirings may be formed using a film made of an element of aluminum (Al), titanium (Ti), molybdenum (Mo), tungsten (W), or silicon (Si), or an alloy film using these elements. In addition, these wirings may be formed of an aluminum alloy film containing at least one element selected from nickel, cobalt, and iron, and carbon.

  As described above, an n-channel thin film transistor having an LDD structure formed so as to have a low-concentration impurity region and a gate length of 1.0 μm or less can be formed. Further, a p-channel thin film transistor having a so-called single drain structure formed so as not to have a low concentration impurity region and having a gate length of 1.0 μm or less is completed. A TFT having a gate length of 1.0 μm or less can be expressed as a submicron TFT. A p-channel thin film transistor can hardly have deterioration due to hot carriers and a short channel effect, and thus can have a single-drain structure.

  Note that in the present invention, a p-channel thin film transistor may have an LDD structure. Further, an n-channel thin film transistor and a p-channel thin film transistor may have a so-called GOLD structure in which a low-concentration impurity region overlaps with a gate electrode instead of the LDD structure.

  A semiconductor device having a thin film transistor formed as described above, a CPU in this embodiment, can be manufactured, and a driving voltage of 5 V enables an operation frequency of 30 MHz.

  Next, an example in which various circuits are formed using the above-described thin film transistors as appropriate will be described with reference to FIGS. FIG. 16 shows a block diagram of the CPU formed on the glass substrate 1600.

  16 includes an arithmetic circuit (ALU) 1601, an arithmetic circuit control unit (ALU Controller) 1602, an instruction analysis unit (Instruction Decoder) 1603, and an interrupt control unit (Interrupt Controller). ) 1604, timing controller 1605, register 1606, register controller 1607, bus interface 1608, rewritable ROM 1609, ROM interface (ROM I / F) 1620 mainly. The ROM 1609 and the ROM I / F 1620 may be provided in separate chips.

  Needless to say, the CPU illustrated in FIG. 16 is just an example in which the configuration is simplified, and an actual CPU may have various configurations depending on the application.

  The instruction input to the CPU via the bus interface 1608 is input to the instruction analysis unit 1603 and decoded, and then is input to the control unit 1602 for the arithmetic circuit, the interrupt control unit 1604, the register control unit 1607, and the timing control unit 1605. Entered.

  An arithmetic circuit control unit 1602, an interrupt control unit 1604, a register control unit 1607, and a timing control unit 1605 perform various controls based on the decoded instruction. Specifically, the arithmetic circuit control unit 1602 generates a signal for controlling the operation of the arithmetic circuit 1601. The interrupt control unit 1604 determines and processes an interrupt request from an external input / output device or a peripheral circuit from the priority or mask state during execution of the CPU program. The register control unit 1607 generates an address of the register 1606, and reads and writes the register 1606 according to the state of the CPU.

  In addition, the timing control unit 1605 generates a signal for controlling the operation timing of the arithmetic circuit 1601, the arithmetic circuit control unit 1602, the instruction analysis unit 1603, the interrupt control unit 1604, and the register control unit 1607. For example, the timing control unit 1605 includes an internal clock generation unit that generates an internal clock signal CLK2 (1622) based on the reference clock signal CLK1 (1621), and supplies the clock signal CLK2 to the various circuits.

  According to the present invention, laser light irradiation with a large area can be performed by one scan, so that a low-cost CPU can be manufactured.

  This embodiment mode can be freely combined with Embodiment Mode 1, Embodiment Mode 2, Embodiment Mode 3, Embodiment Mode 4, Embodiment Mode 5, Embodiment Mode 6, or Embodiment Mode 7.

(Embodiment 10)
Here, examples of manufacturing an IC tag using the present invention are shown in FIGS. 17 (A) to 17 (E), FIGS. 18 (A) to 18 (E), and FIGS. 19 (A) to 19 (C). 20 (A) and FIG. 20 (B).

  An example of using an insulated TFT as a semiconductor element used in an IC tag integrated circuit is shown below, but the semiconductor element used in an IC tag integrated circuit is not limited to a TFT, and any element can be used. Can do. For example, in addition to the TFT, a memory element, a diode, a photoelectric conversion element, a resistance element, a coil, a capacitor element, an inductor, and the like can be typically given.

  First, as illustrated in FIG. 17A, a separation layer 1501 is formed over a glass substrate (first substrate) 1500 by a sputtering method. The peeling layer 1501 can be formed by a sputtering method, a low pressure CVD method, a plasma CVD method, or the like. In this embodiment, amorphous silicon having a thickness of about 50 nm is formed by a low pressure CVD method and used as the peeling layer 1501. Note that the peeling layer 1501 is not limited to silicon. For the peeling layer 1501, a material having a low absorptance from the near infrared region to the infrared region can be used. The thickness of the release layer 1501 is desirably 50 to 60 nm.

  Next, a base insulating film 1502 is formed over the peeling layer 1501. The base insulating film 1502 is provided to prevent an alkali metal such as Na or an alkaline earth metal contained in the first substrate from diffusing into the semiconductor film and adversely affecting the characteristics of a semiconductor element such as a TFT. The base insulating film 1502 also has a role of protecting the semiconductor element in a process of peeling the semiconductor element later. The base insulating film 1502 may be a single layer or a stack of a plurality of insulating films. Therefore, an insulating film such as silicon oxide, silicon nitride, silicon oxide containing nitrogen (SiON), or silicon nitride containing oxygen (SiNO) that can suppress diffusion of alkali metal or alkaline earth metal into the semiconductor film is used. Form.

  Next, a semiconductor film 1503 having an amorphous structure is formed over the base insulating film 1502. The semiconductor film 1503 is preferably formed without being exposed to the air after the base insulating film 1502 is formed. The thickness of the semiconductor film is 20 to 200 nm (desirably 40 to 170 nm, preferably 50 to 150 nm).

After that, as in Embodiment Mode 1 or 2, the insulating film 1561 and the light absorption layer 1562 made of a metal element, a semiconductor element, or the like are formed over the semiconductor film 1503 having an amorphous structure.

  The light absorption layer 1562 is formed into a pattern having a longitudinal direction using a photolithography method after film formation. At this time, the patterned light absorption layer 1562 preferably has a width of about 0.5 to 50 μm so that the semiconductor film 1503 having an amorphous structure has a temperature distribution. Moreover, it is preferable that the space | interval is 1 micrometer or more.

  In this state, the semiconductor film 1503 having an amorphous structure is crystallized by irradiating the light absorption layer 1562 with a fundamental wave of a solid-state laser in the same manner as in the first embodiment or the second embodiment. Then, a polycrystalline semiconductor film 1503 'is formed.

  Next, the insulating film 1561 and the light absorption layer 1562 are removed by etching. Here, the insulating film 1561 and the light absorption layer 1562 may be patterned without etching and used as a gate insulating film, a gate electrode, and a wiring. Alternatively, the light absorption layer 1562 may be etched while leaving only the insulating film 1561.

  Next, as shown in FIG. 17B, the polycrystalline semiconductor 1503 'is patterned. The patterning is performed so that the grain boundary at the end of crystal growth is not included in the channel formation region. Patterning is performed so that the direction in which the carrier of the thin film transistor moves and the longitudinal direction of the light absorption layer are orthogonal. Thereby, a thin film transistor having high electrical characteristics can be obtained. Then, after the island-shaped semiconductor films 1506 to 1508 are formed, a gate insulating film 1509 is formed. The gate insulating film 1509 can be formed using a single layer or a stack of films containing silicon nitride, silicon oxide, silicon oxide containing nitrogen, or silicon nitride containing oxygen using a plasma CVD method, a sputtering method, or the like. it can.

  Note that after the gate insulating film 1509 is formed, heat treatment is performed at 300 to 450 ° C. for 1 to 12 hours in an atmosphere containing 3 to 100% hydrogen to hydrogenate the island-shaped semiconductor films 1506 to 1508. May be performed. Further, plasma hydrogenation (using hydrogen excited by plasma) may be performed as another means of hydrogenation.

  Next, as shown in FIG. 17C, gate electrodes 1510 to 1512 are formed. Here, after forming Si and W to be laminated by sputtering, the gate electrodes 1510 to 1512 are formed by etching using the resist 1513 as a mask. Needless to say, the conductive material, structure, and manufacturing method of the gate electrodes 1510 to 1512 are not limited to these, and can be selected as appropriate. For example, a stacked structure of Si and NiSi (nickel silicide) doped with an n-type impurity or a stacked structure of TaN (tantalum nitride) and W (tungsten) may be used. Alternatively, a single layer may be formed using various conductive materials. In the case where the gate electrode and the antenna are formed at the same time, materials may be selected in consideration of their functions.

  In place of the resist mask, a mask such as SiOx may be used. In this case, a step of patterning to form a mask (referred to as a hard mask) of SiOx, SiON or the like is added. However, since the film thickness of the mask during etching is less than that of the resist, the gate electrodes 1510 to 1512 having a desired width. Can be formed. Alternatively, the gate electrodes 1510 to 1512 may be selectively formed using a droplet discharge method without using the resist 1513.

  Next, as illustrated in FIG. 17D, an island-shaped semiconductor film 1507 to be a p-channel TFT is covered with a resist 1515, and the island-shaped semiconductor films 1506 and 1508 are formed on the island-shaped semiconductor films 1506 and 1508 using the gate electrodes 1510 and 1512 as masks. An impurity element imparting a mold (typically, P (phosphorus) or As (arsenic)) is doped at a low concentration. By this doping step, doping is performed through the gate insulating film 1509, and a pair of low-concentration impurity regions 1516 and 1517 are formed in the island-shaped semiconductor films 1506 and 1508. Note that this doping step may be performed without covering the island-shaped semiconductor film 1507 to be a p-channel TFT with a resist.

  Next, as shown in FIG. 17E, after the resist 1515 is removed by ashing or the like, a resist 1518 is newly formed so as to cover the island-shaped semiconductor films 1506 and 1508 to be n-channel TFTs. Using the electrode 1511 as a mask, the island-shaped semiconductor film 1507 is doped with an impurity element imparting p-type conductivity (typically B (boron)) at a high concentration. By this doping step, doping is performed through the gate insulating film 1509, and a pair of p-type high concentration impurity regions 1520 are formed in the island-shaped semiconductor film 1507.

  Next, as illustrated in FIG. 18A, after the resist 1518 is removed by ashing or the like, an insulating film 1521 is formed so as to cover the gate insulating film 1509 and the gate electrodes 1510 to 1512.

After that, the insulating film 1521 and the gate insulating film 1509 are partially etched by an etch back method, and the side walls 1522 to 1524 in contact with the side walls of the gate electrodes 1510 to 1512 are self-aligned as shown in FIG. (Self-aligned). As the etching gas, a mixed gas of CHF ₃ and He was used. Note that the step of forming the sidewall is not limited to these.

  Next, as illustrated in FIG. 18C, a resist 1526 is newly formed so as to cover the island-shaped semiconductor film 1507 to be a p-channel TFT, and the gate electrodes 1510 and 1512 and the sidewalls 1522 and 1524 are masked. As described above, an impurity element imparting n-type (typically P or As) is doped at a high concentration. By this doping step, doping is performed through the gate insulating film 1509, and a pair of n-type high concentration impurity regions 1527 and 1528 are formed in the island-shaped semiconductor films 1506 and 1508.

  Next, after removing the resist 1526 by ashing or the like, the impurity regions may be thermally activated. For example, after a 50 nm SiON film is formed, heat treatment may be performed in a nitrogen atmosphere at 550 ° C. for 4 hours. In addition, after the SiNx film containing hydrogen is formed to a thickness of 100 nm, defects in the polycrystalline semiconductor film can be improved by performing heat treatment at 410 ° C. for 1 hour in a nitrogen atmosphere. This terminates dangling bonds existing in the polycrystalline semiconductor film, for example, and is called a hydrogenation process.

  Through the series of steps described above, an n-channel TFT 1530, a p-channel TFT 1531, and an n-channel TFT 1532 are formed. In the manufacturing process, a TFT having a channel length of 0.2 μm to 2 μm can be formed by appropriately changing the conditions of the etch back method and adjusting the size of the sidewall.

  Further, after that, a passivation film for protecting the TFTs 1530 to 1532 may be formed.

  Next, as illustrated in FIG. 18D, a first interlayer insulating film 1533 is formed so as to cover the TFTs 1530 to 1532.

  Further, a second interlayer insulating film 1534 is formed over the first interlayer insulating film 1533. Note that the first interlayer insulating film 1533 or the second interlayer insulating film 1534 and the first interlayer insulating film 1533 or the first interlayer insulating film 1533 or the second interlayer insulating film 1534 due to a stress generated from a difference in thermal expansion coefficient between a conductive material or the like that forms a wiring to be formed later. In order to prevent peeling or cracking of the second interlayer insulating film 1534, a filler may be mixed in the first interlayer insulating film 1533 or the second interlayer insulating film 1534.

  Next, as illustrated in FIG. 18D, contact holes are formed in the first interlayer insulating film 1533, the second interlayer insulating film 1534, and the gate insulating film 1509, and wirings 1535 to 1539 connected to the TFTs 1530 to 1532 are formed. Form. Note that the wirings 1535 and 1536 are in the high concentration impurity region 1527 of the n-channel TFT 1530, the wirings 1536 and 1537 are in the high concentration impurity region 1520 of the p-channel TFT 1531, and the wirings 1538 and 1539 are in the high concentration impurity region of the n-channel TFT 1532. 1528, respectively. Further, the wiring 1539 is connected to the gate electrode 1512 of the n-channel TFT 1532. The n-channel TFT 1532 can be used as a memory element of a random number ROM.

  Next, as illustrated in FIG. 18E, a third interlayer insulating film 1541 is formed over the second interlayer insulating film 1534 so as to cover the wirings 1535 to 1539. The third interlayer insulating film 1541 is formed to have an opening at a position where the wiring 1535 is partially exposed. Note that the third interlayer insulating film 1541 can be formed using a material similar to that of the first interlayer insulating film 1533.

  Next, an antenna 1542 is formed over the third interlayer insulating film 1541. The antenna 1542 is formed using a conductive material including one or more metals such as Ag, Au, Cu, Pd, Cr, Mo, Ti, Ta, W, Al, Fe, Co, Zn, Sn, and Ni, and a metal compound. Can do. The antenna 1542 is connected to the wiring 1535. Note that in FIG. 18E, the antenna 1542 is directly connected to the wiring 1535; however, the IC tag of this embodiment is not limited to this structure. For example, the antenna 1542 and the wiring 1535 may be electrically connected using a separately formed wiring.

  The antenna 1542 can be formed by a printing method, a photolithography method, an evaporation method, a droplet discharge method, or the like. In FIG. 18E, the antenna 1542 is formed using a single-layer conductive film; however, an antenna 1542 in which a plurality of conductive films are stacked can be formed. For example, the antenna 1542 may be formed by coating a wiring formed of Ni or the like with electroless plating.

  The droplet discharge method means a method of forming a predetermined pattern by discharging droplets containing a predetermined composition from the pores, and includes an ink jet method and the like in its category. The printing method includes a screen printing method and an offset printing method. By using a printing method or a droplet discharge method, the antenna 1542 can be formed without using an exposure mask. In addition, unlike the photolithography method, there is no waste of material that is removed by etching in the droplet discharge method and the printing method. Further, since it is not necessary to use an expensive exposure mask, the cost for manufacturing the IC tag can be suppressed.

In the case of using a droplet discharge method or various printing methods, for example, conductive particles in which Cu is coated with Ag can be used. Note that in the case where the antenna 1542 is formed by a droplet discharge method, it is preferable to perform treatment on the surface of the third interlayer insulating film 1541 so that the adhesion of the antenna 1542 is increased.

  As a method for improving the adhesion, specifically, for example, a method of attaching a metal or a metal compound capable of enhancing the adhesion of the conductive film or the insulating film to the surface of the third interlayer insulating film 1541 by catalytic action. An organic insulating film having high adhesion to the conductive film or insulating film to be formed, a method of attaching a metal or a metal compound to the surface of the third interlayer insulating film 1541, and a surface of the third interlayer insulating film 1541 Examples include a method of performing surface modification by performing plasma treatment under atmospheric pressure or reduced pressure.

  When the metal or metal compound attached to the third interlayer insulating film 1541 has conductivity, the sheet resistance is controlled so that the normal operation of the antenna is not hindered. Specifically, the average thickness of the conductive metal or metal compound is controlled to be, for example, 1 to 10 nm, or the metal or metal compound is partially or entirely insulated by oxidation. You can do it. Alternatively, the deposited metal or metal compound may be selectively removed by etching except for the region where the adhesion is desired to be improved. Alternatively, the metal or the metal compound may be selectively attached only to a specific region by using a droplet discharge method, a printing method, a sol-gel method, or the like, instead of attaching the metal or the metal compound to the entire surface of the substrate in advance. Note that the metal or metal compound does not need to be a completely continuous film on the surface of the third interlayer insulating film 1541, and may be dispersed to some extent.

  Then, as shown in FIG. 19A, after the antenna 1542 is formed, a protective layer 1545 is formed over the third interlayer insulating film 1541 so as to cover the antenna 1542. The protective layer 1545 is formed using a material that can protect the antenna 1542 when the peeling layer 1501 is removed later by etching. For example, the protective layer 1545 can be formed by applying an epoxy resin, an acrylate resin, or a silicon resin soluble in water or alcohols to the entire surface.

  Next, as shown in FIG. 19B, grooves 1546 are formed to separate the IC tags individually. The groove 1546 may be formed so long as the peeling layer 1501 is exposed. The groove 1546 can be formed by dicing, scribing, or the like. Note that the groove 1546 is not necessarily formed when the IC tag formed over the first substrate 1500 does not need to be separated.

Next, as illustrated in FIG. 19C, the peeling layer 1501 is removed by etching. Here, fluorine halide is used as an etching gas, and the gas is introduced from the groove 1546. For example, ClF ₃ (chlorine trifluoride) is used, the temperature is 350 ° C., the flow rate is 300 sccm (standard cm ³ / min), the atmospheric pressure is 798 Pa, and the treatment time is 3 hours. Alternatively, a gas in which nitrogen is mixed with ClF ₃ gas may be used. By using a halogenated fluorine such as ClF ₃ , the peeling layer 1501 is selectively etched, and the first substrate 1500 can be peeled from the TFTs 1530 to 1532. The halogenated fluorine may be a gas or a liquid.

  Next, as illustrated in FIG. 20A, the peeled TFTs 1530 to 1532 and the antenna 1542 are attached to the second substrate 1551 with an adhesive 1550. As the adhesive 1550, a material capable of bonding the second substrate 1551 and the base insulating film 1502 is used. As the adhesive 1550, for example, various curable adhesives such as a reactive curable adhesive, a thermosetting adhesive, a photocurable adhesive such as an ultraviolet curable adhesive, and an anaerobic adhesive can be used.

  Note that the second substrate 1551 can be formed using an organic material such as flexible paper or flexible plastic.

  Next, as illustrated in FIG. 20B, after the protective layer 1545 is removed, an adhesive 1552 is applied over the third interlayer insulating film 1541 so as to cover the antenna 1542, and a cover material 1553 is attached thereto. The cover material 1553 can be formed using a flexible organic material such as paper or plastic similarly to the second substrate 1551. The thickness of the adhesive 1552 may be, for example, 10 to 200 μm.

  For the adhesive 1552, a material capable of bonding the cover material 1553 to the third interlayer insulating film 1541 and the antenna 1542 is used. As the adhesive 1552, for example, various curable adhesives such as a reaction curable adhesive, a thermosetting adhesive, a photocurable adhesive such as an ultraviolet curable adhesive, and an anaerobic adhesive can be used.

  The IC tag is completed through the above-described steps. By the above manufacturing method, an extremely thin integrated circuit with a total film thickness of 0.3 μm to 3 μm, typically about 2 μm, can be formed between the second substrate 1551 and the cover material 1553.

Note that the thickness of the integrated circuit includes not only the thickness of the semiconductor element itself but also the thicknesses of various insulating films and interlayer insulating films formed between the adhesive 1550 and the adhesive 1552. Further, the area occupied by the integrated circuit included in the IC tag, 5 mm square (25 mm ²⁾ or less, and more preferably may be 0.3mm square (0.09 mm ²⁾ to 4 mm square (16 mm ²⁾ degree.

  Note that this embodiment mode describes a method for separating a substrate and an integrated circuit by providing a separation layer between the first substrate 1500 having high heat resistance and the integrated circuit and removing the separation layer by etching. However, the manufacturing method of the IC tag of the present invention is not limited to this configuration. For example, a metal oxide film may be provided between a substrate having high heat resistance and the integrated circuit, and the integrated circuit may be peeled by weakening the metal oxide film by crystallization. Alternatively, a separation layer using an amorphous semiconductor film containing hydrogen is provided between a substrate with high heat resistance and an integrated circuit, and the separation layer is removed by laser light irradiation to separate the substrate and the integrated circuit. You may do it. Alternatively, the integrated circuit may be separated from the substrate by mechanically removing the highly heat-resistant substrate on which the integrated circuit is formed or removing the substrate by etching with a solution or gas.

  Note that although an example in which the antenna is formed over the same substrate as the integrated circuit has been described in this embodiment, the present invention is not limited to this structure. An antenna formed over another substrate and the integrated circuit may be bonded later to be electrically connected.

  In general, the frequency of radio waves used in RFIC is 13.56 MHz and 2.45 GHz, and it is very important to improve the versatility by forming an IC tag so that radio waves of this frequency can be detected. is important.

  Further, the IC tag of this embodiment has an advantage that radio waves are less shielded than an RFIC formed using a semiconductor substrate, and the signal can be prevented from being attenuated by shielding the radio waves. Therefore, it is not necessary to use a semiconductor substrate, so that the cost of the IC tag can be significantly reduced.

  Note that although an example in which the integrated circuit is separated and attached to a flexible substrate is described in this embodiment, the present invention is not limited to this structure. For example, in the case of using a substrate having a heat resistant temperature that can withstand heat treatment in a manufacturing process of an integrated circuit such as a glass substrate, the integrated circuit is not necessarily peeled off.

  This embodiment mode can be freely combined with Embodiment Mode 1, Embodiment Mode 2, Embodiment Mode 3, Embodiment Mode 4, Embodiment Mode 5, Embodiment Mode 6, or Embodiment Mode 7.

(Embodiment 11)
Various electronic devices can be completed using TFTs manufactured using the laser irradiation method of the present invention. Such electronic devices include video cameras, digital cameras, goggles-type displays, navigation systems, sound playback devices (car audio, audio components, etc.), personal computers, game devices, portable information terminals (mobile computers, mobile phones, mobile phones) Type game machine or electronic book), an image playback device (specifically, a device equipped with a display capable of playing back a recording medium such as Digital Versatile Disc (DVD) and displaying the image), etc. Is mentioned.

  By using the present invention, the semiconductor film can be favorably subjected to laser irradiation treatment, so that the degree of integration can be improved. Further, the quality of the manufactured semiconductor element product is in a good state, and variations can be eliminated. A specific example will be described with reference to FIG.

  FIG. 21A illustrates a display device, which includes a housing 1901, a support base 1902, a display portion 1903, speaker portions 1904, a video input terminal 1905, and the like. This display device is manufactured by using a thin film transistor formed by a manufacturing method shown in another embodiment for the display portion 1903 and a driver circuit. The display device includes a liquid crystal display device, a light emitting device, and the like, and specifically includes all information display devices such as a computer, a television receiver, and an advertisement display.

  FIG. 21B illustrates a computer, which includes a housing 1911, a display portion 1912, a keyboard 1913, an external connection port 1914, a pointing mouse 1915, and the like. By using the manufacturing methods described in the above embodiments, application to the display portion 1912 and other circuits is possible. Furthermore, the present invention can also be applied to semiconductor devices such as a CPU and a memory inside the main body.

FIG. 21C illustrates a mobile phone, which is a typical example of a portable information terminal. This mobile phone includes a housing 1921, a display portion 1922, a sensor portion 1924, operation keys 1923, and the like. The sensor unit 1924 includes an optical sensor element, and controls the luminance of the display unit 1922 according to the illuminance obtained by the sensor unit 1924 or controls illumination of the operation key 1923 according to the illuminance obtained by the sensor unit 1924. By doing so, the current consumption of the mobile phone can be suppressed. In the case of a mobile phone having an imaging function such as a CCD, it is detected whether or not the photographer has looked into the optical viewfinder by changing the amount of light received by the sensor unit 1924 provided near the optical viewfinder. When the photographer is looking into the optical viewfinder, power consumption can be suppressed by turning off the display portion 1922.

  Since electronic devices such as PDAs (Personal Digital Assistants, information portable terminals), digital cameras, and small game machines are portable information terminals, the display screen is small. Therefore, by forming a functional circuit such as a CPU, a memory, or a sensor using the fine transistor described in the above embodiment, the size and weight can be reduced.

In addition, a TFT formed using the laser irradiation apparatus of the present invention can also be used as a thin film integrated circuit or a non-contact thin film integrated circuit device (a wireless IC tag, also referred to as RFID (radio frequency identification)). In addition, by attaching the IC tag to various electronic devices, the distribution route of the electronic devices can be clarified.

FIG. 21D illustrates a state where the wireless IC tag 1942 is attached to the passport 1941. A wireless IC tag may be embedded in the passport 1941. Similarly, you can attach or embed a wireless IC tag to a driver's license, credit card, banknote, coin, securities, gift certificate, ticket, traveler's check (T / C), health insurance card, resident card, family register copy, etc. it can. In this case, only information indicating authenticity is input to the wireless IC tag, and an access right is set so that information cannot be read or written illegally. This can be realized by using the memory shown in the other embodiments. By using it as a tag in this way, it becomes possible to distinguish it from a forged one.

In addition, a wireless IC tag can be used as a memory. FIG. 21E illustrates an example in which the wireless IC tag 1951 is used as a label attached to a vegetable package. Further, a wireless IC tag may be attached or embedded in the package itself. The wireless IC tag 1951 includes a production stage process such as production place, producer, date of manufacture, processing method, product distribution process, price, quantity, usage, shape, weight, expiration date, various authentication information, etc. Can be recorded. Information from the wireless IC tag 1951 is received and read by the antenna unit 1953 of the wireless reader 1952 and displayed on the display unit 1954 of the reader 1952 so that the wholesaler, retailer, and consumer can easily grasp the information. become. In addition, by setting access rights for each of producers, traders, and consumers, the system is such that it cannot be read, written, rewritten or erased if it does not have access rights.

The wireless IC tag can be used as follows. At the time of accounting, the fact that accounting has been completed is entered in the wireless IC tag, and a check means is provided at the exit to check whether accounting has been written on the wireless IC tag. If you try to leave the store without checking out, an alarm will sound. This method can prevent forgetting to pay and shoplifting.

Further, in consideration of customer privacy protection, the following method can be used. At the stage of accounting at the cash register, (1) lock the data input to the wireless IC tag with a password, (2) encrypt the data itself input to the wireless IC tag, (3) wireless Either the data input to the IC tag is deleted, or (4) the data input to the wireless IC tag is destroyed. These can be realized by using the memory described in the other embodiments. Then, by providing a check means at the exit, it is checked whether any of the processes (1) to (4) has been performed, or whether the wireless IC tag data has not been processed. Check for accounting. In this way, it is possible to check whether or not there is a transaction in the store, and it is possible to prevent information on the wireless IC tag from being read outside the store against the will of the owner.

Since the wireless IC tag mentioned above has a higher manufacturing cost than a conventionally used barcode, it is necessary to reduce the cost. By using the present invention, it is possible to enlarge the region where large grain crystals are formed by one scan, which is effective in reducing the cost. In addition, any wireless IC tag can be manufactured with high quality and no variation in performance.

  As described above, the applicable range of the semiconductor device manufactured according to the present invention is so wide that the semiconductor device manufactured according to the present invention can be used for electronic devices in various fields.

  In addition, this embodiment is the same as that in Embodiment 1, Embodiment 2, Embodiment 3, Embodiment 4, Embodiment 5, Embodiment 6, Embodiment 7, Embodiment 8, Embodiment 8. It can be freely combined with Embodiment 9 or Embodiment 10.

  According to the present invention, a semiconductor film can be crystallized using a fundamental wave of a solid laser having a very high output without using a nonlinear optical element for wavelength conversion. Therefore, productivity can be significantly improved.

The top view of the whole board | substrate by which laser annealing is carried out, sectional drawing, and the figure which shows the temperature distribution of the semiconductor film formed by laser irradiation. The top view of a part of board | substrate. Sectional drawing which shows the manufacturing process of TFT. Sectional drawing which shows an example of TFT of a GOLD structure. The figure which shows an example which forms a light absorption layer in a multilayer. The figure which shows an example which forms a light absorption layer in a multilayer. Sectional drawing which shows the manufacturing process of TFT of a bottom gate structure. The figure which shows the example which forms a light absorption layer partially. It is sectional drawing which shows an example of TFT of a dual gate structure. It is a figure which shows an example of sectional drawing of a display apparatus. It is a figure which shows the top view of a display apparatus. Sectional drawing which shows the preparation processes of CPU. Sectional drawing which shows the preparation processes of CPU. Sectional drawing which shows the preparation processes of CPU. Sectional drawing which shows the preparation processes of CPU. The block diagram of CPU. Sectional drawing which shows the manufacturing process of IC tag. Sectional drawing which shows the manufacturing process of IC tag. Sectional drawing which shows the manufacturing process of IC tag. Sectional drawing which shows the manufacturing process of IC tag. FIG. 14 illustrates an example of an electronic device.

Explanation of symbols

24 source electrode 25 drain electrode 26 first LDD region 27 second LDD region 28 protective film 29a gate electrode upper layer 29b gate electrode lower layer 30 source region 31 drain region 32 channel formation region 33a first interlayer insulating film 33b first Second interlayer insulating film 36 First LDD region 37 Second LDD region 38a First gate insulating film 38b Second gate insulating film 39 Gate electrode 101 Substrate having an insulating surface 102 Base insulating film 103 Semiconductor film 104 Insulating film 105 light absorption layer 105a light absorption layer first layer 105b light absorption layer second layer 106 gate insulating film 107 gate electrode 108 source region 109 drain region 110 channel formation region 111 interlayer insulating film 112 source electrode 113 drain electrode 115 Laser beam 301 Light absorption layer longitudinal direction 302 Moving direction 303 Crystal growth direction 304 Island-like semiconductor film 610 Substrate 616 Flattened insulating film 623 First electrode 624 Layer 625 containing organic compound Second electrode 626 Transparent protective layer 627 Filler 628 Sealant 629 Insulator 631 Anisotropic Conductive Film 632 FPC
633 Sealing substrate 636 n-channel TFT
637 p-channel TFT
704 Insulating film 706 First LDD region 707 Second LDD region 710 Substrate having insulating surface 711 Underlying insulating film 712 Lower electrode 713 First insulating film 714 Second insulating film 715 Channel forming region 716 Source region 717 Drain region 718 First Second gate insulating film 719a First low-concentration impurity region 719b Second low-concentration impurity region 720a Upper electrode upper layer 720b Upper electrode lower layer 721 Insulating film 722 Source film 723 Drain wiring 1201 Source side driving circuit 1202 Pixel portion 1203 Gate side driving circuit 1204 Sealing substrate 1205 Sealing material 1207 Connection region 1208 Terminal portion 1209 FPC
1210 Substrate 1301 Drive IC
1302 Pixel portion 1304 Sealing substrate 1305 Sealing material 1307 Connection region 1308 Terminal portion 1309 FPC
1310 Substrate 1400 Substrate 1401 Base insulating film 1402 Amorphous semiconductor film 1406a Insular semiconductor layer 1406b Insular semiconductor layer 1406c Insular semiconductor layer 1406d Insular semiconductor layer 1406e Insular semiconductor layer 1408 Gate insulating film 1409a Conductive Film 1409b Conductive film 1410 Resist mask 1413 Gate length 1415 Resist mask 1416a Impurity region 1416b Impurity region 1416c Impurity region 1417 Resist mask 1418a Impurity region 1418b Impurity region 1419a Side wall 1419b Side wall 1419c Side wall 1420a High concentration impurity region 1420b High concentration impurity region 1420c High-concentration impurity region 1421 Resist mask 1422 First interlayer insulating film 1423 Second interlayer insulating film 1425 Wiring 1425b wiring 1425c wiring 1425d wiring 1425e wiring 1434 insulating layer 1435 light absorption layer 1500 substrate 1501 peeling layer 1502 base insulating film 1503 semiconductor film 1506 island-shaped semiconductor film 1507 island-shaped semiconductor film 1508 island-shaped semiconductor film 1509 gate insulating film 1510 Gate electrode 1511 Gate electrode 1512 Gate electrode 1513 Resist 1515 Resist 1516 Low concentration impurity region 1517 Low concentration impurity region 1518 Resist 1520 High concentration impurity region 1521 Insulating film 1522 Side wall 1523 Side wall 1524 Side wall 1526 Resist 1527 High concentration impurity region 1528 High-concentration impurity region 1530 n-channel TFT
1531 p-channel TFT
1532 n-channel TFT
1533 1st interlayer insulating film 1534 2nd interlayer insulating film 1535 Wiring 1536 Wiring 1537 Wiring 1538 Wiring 1539 Wiring 1541 Third interlayer insulating film 1542 Antenna 1545 Protective layer 1546 Groove 1550 Adhesive 1551 Adhesive 1553 Adhesive 1553 Cover material 1561 Insulating film 1562 Light absorption layer 1600 Substrate 1601 Arithmetic circuit 1602 Arithmetic circuit controller 1603 Instruction analyzer 1604 Interrupt controller 1605 Timing controller 1606 Register 1607 Register controller 1608 Bus interface 1609 ROM
1620 ROM interface 1621 Reference clock signal CLK1
1622 Internal clock signal CLK2
1901 Housing 1902 Support 1903 Display 1904 Speaker 1905 Video input terminal 1911 Housing 1912 Display 1913 Keyboard 1914 External connection port 1915 Pointing mouse 1921 Housing 1922 Display 1923 Operation key 1924 Sensor 1941 Passport 1942 Wireless IC tag 1951 Wireless IC tag 1952 Reader 1953 Antenna unit 1954 Display unit

Claims (7)

Forming an insulating film on the semiconductor film;
Forming a plurality of island-shaped light absorption layers on the insulating film;
By irradiating a fundamental wave of a solid-state laser and heating the island-shaped light absorption layer, the semiconductor film moves from a region not overlapping with the island-shaped light absorption layer to a region overlapping with the island-shaped light absorption layer. Crystal growth of the semiconductor film in the direction,
A method for manufacturing a semiconductor device, wherein a gate electrode is formed by patterning the island-shaped light absorption layer. Forming an insulating film on the semiconductor film;
Forming a plurality of island-shaped light absorption layers on the insulating film;
By irradiating a fundamental wave of a solid-state laser and heating the island-shaped light absorption layer, the semiconductor film moves from a region not overlapping with the island-shaped light absorption layer to a region overlapping with the island-shaped light absorption layer. Crystal growth of the semiconductor film in the direction,
A method for manufacturing a semiconductor device, wherein a gate insulating film and a gate electrode are formed by patterning the insulating film and the island-shaped light absorption layer. Forming an insulating film on the semiconductor film;
Forming a plurality of island-shaped light absorption layers on the insulating film;
By irradiating a fundamental wave of a solid-state laser and heating the island-shaped light absorption layer, the semiconductor film moves from a region not overlapping with the island-shaped light absorption layer to a region overlapping with the island-shaped light absorption layer. Crystal growth of the semiconductor film in the direction,
A method for manufacturing a semiconductor device, wherein a wiring is formed by patterning the island-shaped light absorption layer. In any one of Claims 1 thru | or 3 ,
A method for manufacturing a semiconductor device, wherein the wavelength of the fundamental wave of the solid-state laser is in the near-infrared to infrared wavelength range. In any one of Claims 1 thru | or 4 ,
The island-shaped light-absorbing layer has a first layer and a second layer,
Wherein each of the first layer and the second layer, the method for manufacturing a semiconductor device characterized by having a portion not overlapping the overlapping portion. In any one of Claims 1 thru | or 4 ,
The island-shaped light-absorbing layer has a first layer and a second layer,
A method for manufacturing a semiconductor device, wherein the first layer and the second layer have different widths. In any one of Claims 1 thru | or 6,
A method for manufacturing a semiconductor device, wherein a polycrystalline semiconductor film is formed by crystal growth of the semiconductor film.

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