JP2006165463A - Semiconductor device manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method which can elevate the uniformity of performance of the semiconductor device. <P>SOLUTION: The semiconductor device manufacturing method comprises a process which forms an amorphous silicon film 4 on a glass substrate 1, a process which forms an absorption film 6 on the amorphous silicon film 4, a process which forms a reflection controlling film 7 on the fixed area of the absorption film 6, and a process which irradiates a laser on the reflection controlling film 7 and the absorption film 6 to heat up the absorption film 6, and crystallizes the amorphous silicon film 4 by utilizing its heat, thereby forming a crystal silicon film 4a where the position of a continuous crystal grain boundary band 8 formed by a plurality of columnar crystals gathered is controlled. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device such as a thin film transistor (TFT).

  2. Description of the Related Art In recent years, TFTs using a crystalline silicon film as an active layer have been adopted as pixel driving transistors for liquid crystal display devices and organic EL (Electro Luminescence) display devices. Conventionally, by irradiating the absorption film with a continuous wave laser (CW laser), the amorphous silicon film is crystallized by utilizing the heat generated from the absorption film, so that a crystal as an active layer of the TFT is obtained. A method of manufacturing a semiconductor device for forming a silicon film is known (see, for example, Patent Document 1). In the method of manufacturing a semiconductor device disclosed in Patent Document 1, an absorption film is formed so as to cover the entire surface of the amorphous silicon film, and the amorphous silicon film is heated by heat generated from the absorption film. After melting, it is crystallized by cooling.

JP 2003-168646 A

  However, in the conventional method for manufacturing a semiconductor device disclosed in Patent Document 1, the amorphous silicon film is heated by heat from the absorption film formed so as to cover the entire surface of the amorphous silicon film. Almost the same temperature gradient occurs on the entire surface of the substrate or the entire surface of the amorphous silicon film. As a result, when the melted region of the amorphous silicon film is subsequently crystallized with cooling, there is a disadvantage that crystal grain boundaries are formed at various positions in the crystalline silicon film. For this reason, when a large number of TFTs are formed on a substrate as pixel driving transistors such as a liquid crystal display device or an organic EL display device, the position of the crystal grain boundary varies in the crystalline silicon film as the active layer of the TFT. There is an inconvenience. As a result, there is a problem that the uniformity of the TFT performance is reduced due to the variation in the position of the crystal grain boundary in the crystalline silicon film as the active layer (for example, the presence or absence of the crystal grain boundary in the channel region). .

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a method of manufacturing a semiconductor device that can improve the uniformity of the performance of the semiconductor device. That is.

Means for Solving the Problems and Effects of the Invention

  In order to achieve the above object, a method of manufacturing a semiconductor device according to one aspect of the present invention includes a step of forming a semiconductor film on a substrate, a step of forming an absorption film on the semiconductor film, and a predetermined region of the absorption film. A process of forming an antireflection film on the surface, and by irradiating the antireflection film and the absorption film with laser, the absorption film generates heat, and the heat is used to crystallize the semiconductor film, thereby associating a plurality of crystals. And a step of forming a crystal film in which the position of the continuous crystal grain boundary portion formed is controlled.

  In the method of manufacturing a semiconductor device according to this aspect, as described above, the reflection suppression film is formed on the predetermined region of the absorption film, the region of the absorption film where the reflection suppression film is formed, and the reflection of the absorption film By heating the absorption film by irradiating the region where the suppression film is not formed with the laser, the absorption rate of the laser is improved in the predetermined region where the reflection suppression film of the absorption film is formed, and the amount of heat generation increases. Thereby, the region corresponding to the predetermined region where the absorption film and the reflection suppressing film of the semiconductor film are formed can be heated to a higher temperature than the region corresponding to the region where only the absorption film of the semiconductor film is formed. . For this reason, a temperature gradient in which the temperature rises from a region corresponding to the region where only the absorption film of the semiconductor film is formed toward a region corresponding to the predetermined region where the absorption film and the reflection suppression film are formed may be formed. it can. As a result, when the semiconductor film is crystallized after melting, the crystal can be grown from the end side to the central part of the region where the absorption film and the reflection suppressing film of the semiconductor film are formed. It is possible to control the position of the crystal grain boundary part formed by the association of the two to the position corresponding to the vicinity of the central part of the reflection suppressing film. For this reason, variation in the position of the crystal grain boundary portion in the crystal film can be suppressed, so that when the semiconductor device using the crystal film as an active layer is formed, the performance uniformity of the semiconductor device is improved. Can do.

  Also, if the semiconductor film is heated by laser irradiation so that the temperature is higher than the melting point of the semiconductor film at a predetermined position near the end of the reflection suppression film of the semiconductor film, the predetermined region where the reflection suppression film is formed The temperature on the side is higher than the melting point of the semiconductor film. Thereby, not only the area | region corresponding to the reflection suppression film | membrane of a semiconductor film but the area | region outside the edge part vicinity of a reflection suppression film | membrane can be fuse | melted. Therefore, after that, when the semiconductor film melted with cooling is crystallized, the crystal is grown from the outer region near the end of the antireflection film of the semiconductor film toward the region corresponding to the antireflection film. Can do. As a result, it is possible to form a large-sized crystal grown from the outer region near the end of the reflection suppressing film of the crystal film toward the region corresponding to the reflection suppressing film. For this reason, it can suppress that a microcrystal is formed in the area | region corresponding to the edge part of the reflection suppression film | membrane of a crystal film. Thus, after forming the gate electrode using the region of the absorption film corresponding to the antireflection film, the channel region is formed in the region under the gate electrode of the crystal film, and a pair of source / In the case where a transistor is formed by forming a drain region in a crystal film, it is possible to suppress the placement of a microcrystal in the vicinity of the junction interface between the channel region and the source / drain region corresponding to the end portion of the gate electrode. . For this reason, it is possible to suppress the formation of carrier trap levels caused by the presence of microcrystals in the vicinity of the junction interface between the channel region and the source / drain region of the transistor. Thereby, it is possible to suppress the malfunction of the transistor caused by the carrier trap level being formed in the vicinity of the junction interface between the channel region and the source / drain region of the transistor.

  In the method of manufacturing a semiconductor device according to the above aspect, preferably, the step of forming the crystal film in which the position of the crystal grain boundary part is controlled corresponds to the position of the crystal grain boundary part in the vicinity of the center part of the antireflection film. A step of controlling the position. With this configuration, the position of the crystal grain boundary portion can be easily controlled to a position corresponding to the vicinity of the central portion of the reflection suppressing film, so that the position of the crystal grain boundary portion in the crystal film can be easily adjusted. Variations can be suppressed.

  In the method of manufacturing a semiconductor device according to the above aspect, the step of causing the absorption film to generate heat by irradiating a laser and crystallizing the semiconductor film by using the heat corresponds to the antireflection film of the semiconductor film. In addition to the region to be processed, the outer region near the end of the reflection suppressing film includes a step of heating to a temperature higher than the melting point of the semiconductor film by laser irradiation. If comprised in this way, not only the area | region corresponding to the reflection suppression film | membrane of a semiconductor film but the area | region outside the edge part vicinity of a reflection suppression film | membrane can be fuse | melted easily. This makes it possible to easily form a large-sized crystal grown from the outer region near the end of the reflection suppression film of the crystal film toward the region corresponding to the reflection suppression film. It is possible to suppress the formation of microcrystals in a region corresponding to the end portion of the reflection suppressing film.

  In the method of manufacturing a semiconductor device according to the above aspect, preferably, the step of forming the semiconductor film on the substrate includes a step of forming the semiconductor film in an island shape, and the step of forming the absorption film includes the island-shaped semiconductor. Forming an absorption film so as to cover the upper part of the film; If comprised in this way, by forming an absorption film so that the upper part of an island-like semiconductor film may be covered, a laser is irradiated to a reflection suppression film and an absorption film, and an absorption film will be heated, and the heat will be used. Thus, the entire semiconductor film covered with the absorption film can be heated. Thus, unlike the case where the absorption film is formed only above a partial region of the semiconductor film, the entire region of the semiconductor film can be easily crystallized.

  In the method of manufacturing a semiconductor device according to the above aspect, the pair of gate electrodes is preferably formed above the crystal film with a predetermined interval by removing a region corresponding to the position of the crystal grain boundary portion of the absorption film. The method further includes a forming step. After forming the pair of gate electrodes, the region including the crystal grain boundary portion of the crystal film is used as an intermediate source / drain region positioned between the pair of gate electrodes of the transistor having the pair of gate electrodes. With this configuration, a transistor having a pair of gate electrodes formed at a predetermined interval above the crystal film can be formed, and a crystal grain boundary portion can be formed in the source / drain region in the middle of the transistor. Can be arranged. Accordingly, since it is possible to suppress the crystal grain boundary portion from being arranged in the channel region of the transistor, it is possible to suppress carriers from moving across the crystal grain boundary portion arranged in the channel region when the transistor is driven. be able to. For this reason, the fall of the mobility of a carrier resulting from a carrier moving across a crystal grain boundary part can be suppressed. As a result, a transistor having a pair of gate electrodes formed at a predetermined interval above the crystal film and having excellent performance can be formed.

  In the method of manufacturing a semiconductor device according to the above aspect, it is preferable that two gate electrodes are formed on the upper side of the crystal film at a predetermined interval by removing a region corresponding to the position of the crystal grain boundary portion of the absorption film. And a step of removing a predetermined region corresponding to the gap between the two gate electrodes of the crystal film. With this configuration, two transistors each having two crystal films and gate electrodes respectively corresponding to the two crystal films can be formed. In addition, by removing a region corresponding to the crystal grain boundary portion of the absorption film and forming two gate electrodes, the crystal grain boundary portion is formed in the channel region corresponding to each gate electrode of the two transistors and the vicinity thereof. Can be excluded. Thereby, in two transistors, the influence by a crystal grain boundary part can be eliminated, so that two transistors having excellent performance can be formed. Note that in the step of removing the predetermined region corresponding to the two gate electrodes of the crystal film, if the region including the crystal grain boundary portion of the crystal film is removed, the crystal grain boundary in the two transistors can be easily obtained. The influence by the part can be eliminated.

  In the present invention, the following configurations are also conceivable. That is, in the method for manufacturing a semiconductor device according to the aforementioned aspect, the laser may include a continuous wave laser. With such a configuration, unlike a pulsed laser, a continuous wave laser can perform high-speed scanning of a laser beam, so that a large area can be irradiated uniformly and heated in a short time. Thereby, productivity (throughput) can be improved. In addition, since the continuous wave laser does not vary in beam intensity unlike the pulse laser, the heating can be performed uniformly. Further, since the continuous wave laser can be irradiated continuously unlike the pulse laser, the heating time can be increased as compared with the pulse laser. Accordingly, a high-quality crystal with few defects can be grown to a larger size as compared with the case of using a pulse laser, so that the crystallinity of the crystal film can be improved. In this case, the continuous wave laser may include an infrared laser such as a fundamental wave YAG laser.

  Further, in the method of manufacturing a semiconductor device according to the above aspect, the crystal film is an active layer of the transistor, and after the semiconductor film is crystallized, the absorption film is etched using the antireflection film as a mask, whereby the gate electrode of the transistor You may further provide the process of forming. According to this structure, when the absorption film is etched to form the gate electrode of the transistor, it is not necessary to separately form an etching mask, so that the manufacturing process can be simplified.

  In the structure including the step of forming the gate electrode of the transistor, the step of forming the antireflection film may include a step of forming the antireflection film in a shape corresponding to the shape of the gate electrode. If comprised in this way, a gate electrode can be easily formed by etching an absorption film by using a reflection suppression film as a mask.

  Further, in the structure including the step of forming the gate electrode of the transistor, the reflection suppression is performed after the crystallization of the semiconductor film prior to the step of forming the gate electrode of the transistor by etching the absorption film using the reflection suppression film as a mask. After introducing impurities into the crystal film using the film as a mask, the step of forming source / drain regions in the crystal film by electrically activating the impurities by irradiating the antireflection film and the absorption film with a laser again Furthermore, you may provide. According to this structure, the impurity introduced into the crystal film can be electrically activated using the laser irradiation apparatus used when crystallizing the amorphous silicon film. As a result, in order to electrically activate the impurities introduced into the crystal film, it is not necessary to separately heat the crystal film by using a heating device different from the laser irradiation device used for crystallization, so that the manufacturing process is complicated. Can be suppressed. Also, prior to the step of forming the gate electrode of the transistor by etching the absorption film using the antireflection film as a mask, the impurity is electrically activated by irradiating the antireflection film and the absorption film with a laser again. Thus, it is possible to heat the crystal film with the impurity-doped region covered with the absorption film. Thereby, since the region into which the impurity of the crystal film is introduced can be uniformly and efficiently heated, the impurity introduced into the crystal film can be electrically activated satisfactorily.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
1 to 9 are views for explaining a method of manufacturing a semiconductor device according to the first embodiment of the present invention. The semiconductor device manufacturing method according to the first embodiment will be described below with reference to FIGS. In the first embodiment, a method for manufacturing a semiconductor device for forming a TFT (thin film transistor) as an example of the semiconductor device according to the first embodiment will be described.

First, as shown in FIG. 1, a SiO ₂ film 2 having a thickness of about 300 nm is formed on a glass substrate 1 using a plasma CVD method. The glass substrate 1 is an example of the “substrate” in the present invention. Thereafter, a SiN _x film 3 having a thickness of about 20 nm is formed on the SiO ₂ film 2 by plasma CVD. The SiO ₂ film 2 and the SiN _x film 3 formed in this way function as a buffer layer for relaxing the heat transfer to the glass substrate 1. Thereafter, a dehydrogenation annealing process is performed for about 2 hours in a nitrogen (N ₂ ) atmosphere at about 500 ° C.

Then, an amorphous silicon film (not shown) having a thickness of about 50 nm is formed on the SiN _x film 3 by using a low pressure CVD method, and then the amorphous film is formed by using a photolithography technique and an etching technique. A plurality of island-shaped amorphous silicon films 4 are formed by patterning a silicon film (not shown). Note that the RIE (Reactive Ion Etching) method using SF ₆ as an etching gas is used for etching when the amorphous silicon film 4 is formed into an island shape. In FIG. 1, only one island-shaped amorphous silicon film 4 is shown, but actually, the island-shaped amorphous silicon film 4 is arranged at a predetermined interval. ing. This island-shaped amorphous silicon film 4 is used later as an active layer (active layer) of the TFT. The amorphous silicon film 4 is an example of the “semiconductor film” in the present invention.

Thereafter, a gate insulating film 5 made of a SiO ₂ film having a thickness of about 100 nm is formed on the amorphous silicon film 4 and the SiN _x film 3 by plasma CVD. At this time, the gate insulating film 5 is formed so as to cover the amorphous silicon film 4 formed into an island shape. Then, an absorption film 6 made of a Mo film having a thickness of about 200 nm is formed on the gate insulating film 5 by sputtering.

At this time, in the first embodiment, the absorption film 6 is formed so as to cover the entire upper portion of the island-shaped amorphous silicon film 4. Thereafter, in the first embodiment, by using a plasma CVD method, after forming the SiO ₂ film (not shown) with about 160nm thick on the absorber film 6, a photolithography technique and the SiO ₂ film and HF By patterning into a shape corresponding to the shape of a gate electrode 6a, which will be described later, using an etching technique using an aqueous solution, a reflection suppressing film 7 made of a SiO ₂ film is formed on a predetermined region of the absorption film 6. At this time, the reflection suppressing film 7 is formed on a region to be a channel region of the amorphous silicon film 4.

Next, in the first embodiment, the amorphous silicon film 4 is crystallized. Specifically, as shown in FIG. 2, the continuous wave type fundamental wave YAG laser is absorbed and reflected from above by heating it at about 200 ° C. in an inert gas atmosphere such as Ar or N _2. The film 6 is irradiated. The laser irradiation conditions in this case are laser power: about 170 W, scanning speed: about 700 mm / s (substrate relative speed). Further, for this laser irradiation, a laser beam having an irradiation range of about 0.1 mm (beam length: length in a direction parallel to the scanning direction) × about 3 mm (beam width: length in a direction perpendicular to the scanning direction). Is used. Since the absorption film 6 generates heat by this laser irradiation, the amorphous silicon film 4 is melted using the heat.

  At this time, the absorption rate of the laser in the region where the antireflection film 7 of the absorption film 6 is not provided is about 30%, whereas in the region where the antireflection film 7 of the absorption film 6 is provided, the laser is absorbed. By reducing the reflectance of the laser, the laser absorptance is improved to about 60%. Thereby, in the area | region in which the reflection suppression film | membrane 7 of the absorption film 6 was provided, the emitted-heat amount increases compared with the area | region in which the reflection suppression film | membrane 7 is not provided. For this reason, the region covered with the absorption film 6 and the reflection suppressing film 7 of the amorphous silicon film 4 is heated to a higher temperature than the region covered only with the absorption film 6 of the amorphous silicon film 4. As a result, as shown in FIG. 3, from the region covered only by the absorption film 6 on both ends of the amorphous silicon film 4 toward the region covered by the inner absorption film 6 and the reflection suppression film 7. A temperature gradient is formed with increasing temperature. At this time, the region of the amorphous silicon film 4 corresponding to the reflection suppressing film 7 is heated to about 1500 ° C. to about 1800 ° C. The outer region of the amorphous silicon film 4 near the end of the reflection suppressing film 7 is heated to about 1400 ° C. to about 1500 ° C., and the outer region is heated to about 1000 ° C. to about 1400 ° C. Heated.

  That is, in the first embodiment, not only the region of the amorphous silicon film 4 corresponding to the reflection suppressing film 7 but also the outer region near the end of the reflection suppressing film 7 has a melting point (about about 1414 ° C.). As a result, not only the region of the amorphous silicon film 4 corresponding to the reflection suppression film 7 but also the outer region near the end of the reflection suppression film 7 is melted. Since the region outside the melted region of the amorphous silicon film 4 has a temperature (about 1000 ° C. to about 1400 ° C.) lower than the melting point (about 1414 ° C.) of the amorphous silicon film 4, do not do. In the region where the amorphous silicon film 4 is not melted, as shown in FIGS. 3 and 4, microcrystalline silicon (μc-Si) is formed by solid phase growth.

  Then, after the laser beam passes over the reflection suppressing film 7 and the absorption film 6, cooling is performed. With this cooling, lateral crystal growth is performed in the melted region of the amorphous silicon film 4. This lateral crystal growth is performed by forming the temperature gradient shown in FIG. That is, since the crystal grows from the lower temperature to the higher temperature, it grows against the direction in which the temperature decreases (the direction of heat flow). Thereby, in the first embodiment, crystals grow laterally from the outside to the inside of the amorphous silicon film 4. Specifically, as shown in FIGS. 5 and 6, first, microcrystalline silicon (μc-Si) is formed by rapid cooling in the vicinity of the boundary between the melted region of the amorphous silicon film 4 and the non-melted region. The Note that the microcrystalline silicon formed by the rapid cooling is formed in a region outside the vicinity of the end of the reflection suppressing film 7 of the amorphous silicon film 4 (a region serving as an interface between the source / drain region and the channel region).

  Then, columnar crystals of silicon grow from both sides toward the inside using microcrystalline silicon by rapid cooling as a seed crystal. 6 to 9, the silicon columnar crystal is illustrated as being stacked in the thickness direction of the amorphous silicon film 4 (crystalline silicon film 4a), this is a columnar crystal. In actuality, the thickness of the amorphous silicon film 4 (crystalline silicon film 4a) is very small. Therefore, the thickness of the amorphous silicon film 4 (crystalline silicon film 4a) is 1 in the thickness direction. Two columnar crystals are formed. Accordingly, no grain boundary extending in parallel with the columnar crystal amorphous silicon film 4 is formed in the intermediate region in the thickness direction of the amorphous silicon film 4 (crystalline silicon film 4a). In the region corresponding to the end portion of the antireflection film 7 of the amorphous silicon film 4, columnar crystals are formed and no microcrystals are formed. Then, the silicon columnar crystals grown from both sides to the inside finally meet at a position corresponding to the vicinity of the central portion of the reflection suppressing film 7 as shown in FIG. As a result, a crystal grain boundary zone 8 in which grain boundaries of a plurality of columnar crystals of silicon are continuous is formed at a position corresponding to the vicinity of the central portion of the reflection suppressing film 7, and crystal growth is completed. The crystal grain boundary zone 8 is an example of the “crystal grain boundary part” in the present invention. The crystal grain boundary zone 8 is formed so as to extend in a direction substantially perpendicular to the growth direction of the columnar crystals. As described above, by crystallizing the amorphous silicon film 4, the position of the crystal grain boundary zone 8 of the columnar crystal is controlled to a position corresponding to the vicinity of the central portion of the reflection suppressing film 7. 4a is formed. The crystalline silicon film 4a is an example of the “crystal film” in the present invention.

  In the first embodiment, apart from the temperature gradient caused by the heat from the reflection suppressing film 7, a temperature gradient corresponding to the scanning direction or beam shape of the laser beam is formed by scanning the laser beam. The size of the region where the temperature gradient is formed is approximately the size of the laser beam. The beam length of the laser beam (length in the direction parallel to the scanning direction, short side) is about 0.1 mm (about 100 μm), and the size of the temperature gradient region is about 0.1 mm. On the other hand, the size of the temperature gradient region formed using the antireflection film 7 is several μm to several tens of μm. That is, the temperature gradient formed by the laser beam scanning is about 1/10 or less of the temperature gradient formed by the reflection suppressing film 7. For this reason, even if the temperature gradient generated by the scanning of the laser beam affects the temperature gradient for growing the columnar crystal on the silicon film, the effect is about 1/10 or less. Therefore, the influence of the temperature gradient generated by the scanning of the laser beam on the growth of the columnar crystal is very small and can be ignored.

In the first embodiment, the continuous wave fundamental wave YAG laser used for crystallization of the amorphous silicon film 4 is irradiated continuously unlike a pulse laser such as an excimer laser. Heating time increases compared to a pulsed laser. Specifically, in the method using the continuous wave type fundamental wave YAG laser, the time for the laser beam to pass through a predetermined irradiation region is about 10 ⁻⁴ sec. On the other hand, in a method using a pulse laser such as a general excimer laser, the irradiation time for each pulse irradiation to a predetermined irradiation region is about 10 ⁻⁸ sec. Thus, the method using the fundamental wave YAG laser described above continuous wave, as compared with the general method using a pulsed laser such as an excimer laser, the heating time is approximately 10 ⁴ times. Further, the average thermal diffusion distance x by laser irradiation is generally expressed by the equation x = (2ατ) ^1/2 (α: temperature transfer rate, τ: heating time≈passing time of laser beam). Therefore, in the case of using the fundamental wave YAG laser of a continuous oscillation type, as compared with the case of using a pulsed laser such as an excimer laser, since the heating time (tau) is about ¹⁰⁴ times, from the above equation, the average It can be seen that the thermal diffusion distance x is about 10 ² times. As a result, the manufacturing method according to the first embodiment using the continuous wave type fundamental wave YAG laser generates a temperature gradient for growing the crystal in the lateral direction as compared with the case of using a pulse laser such as an excimer laser. since the area of the can be expanded about 10 ^twice, it is understood that it is possible to form larger crystals.

  Table 1 below shows the thermal physical constants of the glass substrate 1 and the quartz substrate. Table 2 below shows calculated values of the average thermal diffusion distance x calculated using the above formula and the temperature transfer rate α shown in Table 1.

次に、第１実施形態では、図８に示すように、反射抑制膜７をマスクとして吸収膜６をエッチングすることにより、ＴＦＴのゲート電極６ａを形成する。この際、反射抑制膜７は、予めゲート電極６ａの形状と同じ所定の形状にパターニングされているので、ゲート電極６ａは、その所定の形状にパターニングされる。そして、ゲート電極６ａは、反射抑制膜７と同じ形状に形成されるので、結晶シリコン膜４ａ中の柱状結晶の結晶粒界帯８は、ゲート電極６ａの中央部近傍に対応する位置に配置される。また、結晶シリコン膜４ａの急冷による微結晶シリコン（μｃ−Ｓｉ）と、固相成長による微結晶シリコン（μｃ−Ｓｉ）とは、ゲート電極６ａの端部近傍よりも外側の領域に配置される。

Next, in the first embodiment, as shown in FIG. 8, the gate electrode 6 a of the TFT is formed by etching the absorption film 6 using the antireflection film 7 as a mask. At this time, since the reflection suppressing film 7 is patterned in advance in the same predetermined shape as the gate electrode 6a, the gate electrode 6a is patterned in the predetermined shape. Since the gate electrode 6a is formed in the same shape as the reflection suppressing film 7, the crystal grain boundary band 8 of the columnar crystal in the crystalline silicon film 4a is disposed at a position corresponding to the vicinity of the central portion of the gate electrode 6a. The Further, microcrystalline silicon (μc-Si) obtained by rapid cooling of the crystalline silicon film 4a and microcrystalline silicon (μc-Si) obtained by solid phase growth are arranged in a region outside the vicinity of the end portion of the gate electrode 6a. .

Next, as shown in FIG. 9, impurities are ion-implanted into the crystalline silicon film 4a using the reflection suppressing film 7 and the gate electrode 6a as a mask. At this time, in the case of forming an n-channel transistor (TFT), P ⁺ (phosphorus ions) are ion-implanted under conditions of implantation energy: about 100 keV and dose amount: about 2 × 10 ¹⁵ ions / cm ² . When an LDD structure is formed in an n-channel transistor (TFT), the above-described ion implantation is performed after masking the LDD formation region (near the gate electrode 6a) of the crystalline silicon film 4a with a photomask. P ⁺ (phosphorus ions) are implanted into the LDD formation region of the crystalline silicon film 4a under the conditions of implantation energy: about 100 keV and dose amount: about 3 × 10 ¹³ cm ⁻² . In order to make the source / drain region 9 have the LDD structure, P ⁺ (phosphorus ion) is separately implanted into the crystalline silicon film 4a under the conditions of implantation energy: about 100 keV and dose: about 3 × 10 ¹³ ions / cm ^2. To do. On the other hand, when forming a p-channel transistor (TFT), B ⁺ (boron ions) are ion-implanted under the conditions of implantation energy: about 35 keV and dose: about 1.5 × 10 ¹⁵ ions / cm ² .

Thereafter, after forming an interlayer insulating film (not shown), the impurity introduced into the crystalline silicon film 4a is electrically activated by heating the crystalline silicon film 4a by an RTA (Rapid Thermal Annealing) method. Thereby, a pair of source / drain regions 9 are formed in the crystalline silicon film 4a. At this time, the channel region 10 is formed in a region sandwiched between the pair of source / drain regions 9 below the gate electrode 6a. Incidentally, the gate electrode 6a made of Mo, the gate insulating film 5 made of SiO _2, by the crystalline silicon film 4a pair of source / drain regions 9 and the channel region 10 is formed, TFT is formed. The channel region 10 is composed of silicon columnar crystals. The source / drain region 9 is composed of microcrystalline silicon (μc-Si) formed by solid phase growth, microcrystalline silicon (μc-Si) formed by rapid cooling, and a part of an end portion of a silicon columnar crystal. . Further, the junction interface 11 between the source / drain region 9 and the channel region 10 is disposed in the region of the crystalline silicon film 4a where the silicon columnar crystal is formed. Thereafter, wirings (not shown) connected to the source / drain regions 9 of the crystalline silicon film 4a are formed.

  In the first embodiment, as described above, the reflection suppression film 7 is formed on a predetermined region of the absorption film 6 formed so as to cover the amorphous silicon film 4, and the reflection suppression film 7 of the absorption film 6 is By irradiating the formed region and the region where the antireflection film 7 of the absorption film 6 is not formed with the fundamental wave YAG laser, the absorption film 6 generates heat, thereby forming the predetermined antireflection film 7 of the absorption film 6. In the region, the amount of heat generation increases as the absorption rate of the fundamental wave YAG laser improves. Thereby, the region covered with the absorption film 6 and the reflection suppressing film 7 of the amorphous silicon film 4 is heated to a higher temperature than the region covered only with the absorption film 6 of the amorphous silicon film 4. Can do. For this reason, a temperature gradient is formed in which the temperature rises from the outer region covered only by the absorption film 6 of the amorphous silicon film 4 toward the inner region covered by the absorption film 6 and the reflection suppressing film 7. be able to. Thereby, columnar crystals grow from the outside to the inside of the amorphous silicon film 4, and the columnar crystals grown from both sides correspond to the vicinity of the central portion of the antireflection film 7 of the amorphous silicon film 4. To meet. For this reason, the position of the crystal grain boundary zone 8 of the columnar crystal in the crystalline silicon film 4 a can be controlled to a position in the vicinity of the central portion of the reflection suppressing film 7. Thus, the gate electrode 6a is formed by etching the absorption film 6 using the reflection suppression film 7 as a mask, and a pair of ions are implanted by implanting impurities into the crystalline silicon film 4a using the reflection suppression film 7 and the gate electrode 6a as a mask. By forming the source / drain regions 9 and the channel region 10, the channel region 10 is composed of columnar crystals, and the grain boundaries crossing the moving direction of carriers in the channel region 10 are near the center of the channel region 10. A crystalline silicon film 4a having only the crystal grain boundary zone 8 controlled in position can be obtained. For this reason, the variation in the position of the crystal grain boundary zone 8 of the columnar crystal in the crystalline silicon film 4a can be suppressed. As a result, the uniformity of the performance of the TFT formed by the gate electrode 6a, the gate insulating film 5, and the crystalline silicon film 4a including the pair of source / drain regions 9 and the channel region 10 can be improved.

  In the first embodiment, the temperature rises from the outer region covered only by the absorption film 6 of the amorphous silicon film 4 toward the inner region covered by the absorption film 6 and the reflection suppressing film 7. Since a temperature gradient can be formed, the temperature is higher than the melting point (about 1414 ° C.) of the amorphous silicon film 4 at a predetermined position outside the end of the reflection suppressing film 7 of the amorphous silicon film 4. By heating the amorphous silicon film 4 in such a manner, the region inside the predetermined position can be set to a temperature higher than the melting point (about 1414 ° C.) of the amorphous silicon film 7. Thereby, not only the region corresponding to the antireflection film 7 of the amorphous silicon film 4 but also the outer region near the end of the antireflection film 7 can be melted. For this reason, after that, when the amorphous silicon film 4 melted with cooling is crystallized, the size of the amorphous silicon film 4 increases from the outer region in the vicinity of the end portion of the antireflection film 7 toward the inner side. Columnar crystals can be grown. Thereby, it is possible to suppress the formation of microcrystals in the region corresponding to the end portion of the reflection suppressing film 7 of the crystalline silicon film 4a. Accordingly, the gate electrode 6a is formed by etching the absorption film 6 using the reflection suppression film 7 as a mask, and a pair of ions are implanted by implanting impurities into the crystalline silicon film 4a using the reflection suppression film 7 and the gate electrode 6a as a mask. By forming the source / drain region 9 and the channel region 10, the microcrystalline silicon is disposed at the junction interface 11 between the channel region 10 and the source / drain region 9 corresponding to the end of the gate electrode 6 a. Can be suppressed. Thereby, it is possible to suppress the formation of carrier trap levels caused by the presence of microcrystalline silicon in the vicinity of the junction interface between the channel region 10 and the source / drain region 9 of the TFT. For this reason, it is possible to suppress a malfunction of the TFT caused by the carrier trap level being formed in the vicinity of the junction interface between the channel region 10 and the source / drain region 9 of the TFT.

  Further, in the first embodiment, by using a continuous wave type fundamental wave YAG laser, unlike a pulse laser such as an excimer laser, a continuous wave laser can perform high-speed scanning of a laser beam, so that a large area is obtained. It is uniform and can be heated by irradiation in a short time. Thereby, productivity (throughput) can be improved. In addition, since the continuous wave type fundamental wave YAG laser does not vary in beam intensity unlike a pulse laser such as an excimer laser, the heating can be performed uniformly. Further, unlike a pulsed laser such as an excimer laser, a continuous wave type fundamental wave YAG laser can be irradiated continuously, so that the heating time at any point in the substrate can be increased. As a result, a high-quality crystal with few defects can be grown to a larger size than when a pulse laser such as an excimer laser is used, and the crystallinity of the crystalline silicon film 4a can be improved.

  In the first embodiment, the reflection suppressing film 7 is formed in advance in a shape corresponding to the shape of the gate electrode 6a, and after the amorphous silicon film 4 is crystallized, the absorption suppressing film 6 is used with the reflection suppressing film 7 as a mask. The gate electrode 6a of the TFT is formed by etching, so that it is not necessary to separately form a mask when the absorption film 6 is etched to form the TFT gate electrode 6a, thereby simplifying the manufacturing process. be able to.

  10 and 11 show a comparative example for explaining the effect of the manufacturing process of the semiconductor device according to the first embodiment. In order to control the position of the grain boundary zone of the columnar crystal in the crystalline silicon film to a position near the center of the channel region, the following manufacturing process can be considered. That is, as shown in FIG. 10, the patterned gate electrode 6a is formed on the gate insulating film 5, and the gate electrode 6a and the gate electrode 6a are formed without forming the antireflection film 7 according to the first embodiment shown in FIG. The gate insulating film 5 is irradiated with a continuous wave type fundamental wave YAG laser. The laser irradiation conditions at this time are the same as the laser irradiation conditions according to the first embodiment except that the laser power is about 340 W. As a result, the gate electrode 6a (absorption film) generates heat, and the amorphous silicon film 14 is melted using the heat.

  At this time, as shown in FIG. 10, the temperature rises from the region not covered by the gate electrodes 6a on both ends of the amorphous silicon film 14 toward the region covered by the inner gate electrode 6a. A gradient is formed. Thereby, the region of the amorphous silicon film 14 corresponding to the gate electrode 6a is heated to about 1000 ° C. to about 1800 ° C. Further, the region of the amorphous silicon film 14 corresponding to the outside of the end portion of the gate electrode 6a is heated to about 200 ° C. to about 1000 ° C.

  Thereby, in this comparative example, in the region inside the end portion of the gate electrode 6a of the amorphous silicon film 14, the temperature is higher than the melting point of the amorphous silicon film 14 (about 1400 ° C. to about 1800 ° C.). The heated area melts. On the other hand, the region outside the melted region of the amorphous silicon film 14 has a temperature (about 200 ° C. to about 1400 ° C.) lower than the melting point (about 1414 ° C.) of the amorphous silicon film 14. do not do. Microcrystalline silicon (μc-Si) is formed by solid phase growth in a region where the temperature of the amorphous silicon film 14 is about 900 ° C. to about 1400 ° C. in the region where the amorphous silicon film 14 is not melted. Since the region corresponding to the end of the gate electrode 6a of the amorphous silicon film 14 is about 1000 ° C., microcrystalline silicon is formed in this region by solid phase growth. Further, the region at about 200 ° C. to about 900 ° C. outside the region where the microcrystalline silicon is formed by solid phase growth is not crystallized. Thereby, the amorphous state is maintained in this region.

  Then, after the laser beam passes, cooling is performed. With this cooling, as shown in FIG. 11, columnar crystals of silicon grow from both sides toward the inside using microcrystalline silicon by rapid cooling as a seed crystal, as in the first embodiment. The silicon columnar crystals grown from both sides to the inside finally meet at a position corresponding to the vicinity of the central portion of the gate electrode 6a. As a result, a crystal grain boundary zone 8 of a silicon columnar crystal is formed at a position corresponding to the vicinity of the central portion of the gate electrode 6a of the crystalline silicon film 14a. Thereafter, as in the first embodiment, a pair of source / drain regions 9 and a channel region 10 are formed in the crystalline silicon film 14a by ion implantation of impurities using the gate electrode 6a as a mask. As a result, a crystal grain boundary zone 8 of silicon columnar crystals is formed near the center of the channel region 10 of the crystalline silicon film 14a.

  As described above, in the manufacturing method according to the comparative example shown in FIGS. 10 and 11 as well, as in the manufacturing method according to the first embodiment, the position of the crystal grain boundary zone 8 of the silicon columnar crystal in the crystalline silicon film 14a is determined. It is possible to control the position near the center of the channel region 10. However, in the manufacturing method according to this comparative example, as shown in FIG. 11, since microcrystalline silicon is formed at the junction interface 11 between the channel region 10 and the source / drain region 9, the carrier trap level is formed at the junction interface 11. Is formed. As a result, there arises a disadvantage that the performance of the TFT is deteriorated or a malfunction of the TFT occurs. However, in the crystalline silicon film 4a according to the first embodiment shown in FIG. 9, since microcrystalline silicon is not formed at the junction interface 11 between the channel region 10 and the source / drain region 9, there is no inconvenience due to the above comparative example. . As a result, the semiconductor device manufacturing method according to the first embodiment controls the position of the crystal grain boundary zone 8 of the columnar crystal in the crystalline silicon film 4a to be close to the center of the channel region 10, thereby improving the uniformity of the TFT performance. While improving, it has been found that it is effective to suppress the occurrence of malfunction of the TFT by suppressing the formation of microcrystalline silicon at the junction interface 11 between the channel region 10 and the source / drain region 9.

  In order to suppress the formation of microcrystalline silicon at the junction interface 11 between the channel region 10 and the source / drain region 9 by using the configuration according to the above comparative example, the power of the irradiated laser beam is increased. It is also conceivable that the amorphous silicon film 14 is melted to the outer region near the end of the gate electrode 6a by further heating or by separately heating the substrate itself by some method. However, when the power of the laser beam is increased and further heated, the amorphous silicon film 14 is melted to a region outside the vicinity of the end of the gate electrode 6a. The region with the highest temperature near the center is heated to near the boiling point (about 2642 ° C.) of the amorphous silicon film 14. In this case, there is a case where a region near the center of the amorphous silicon film 14 evaporates and disappears (ablation). On the other hand, when the substrate itself is separately heated by some method to melt the amorphous silicon film 14 to the outer region near the end of the gate electrode 6a, the substrate itself is brought to a temperature of about 1000 ° C. It is substantially difficult to heat the substrate to such a high temperature (about 1000 ° C.) because it needs to be heated.

(Second Embodiment)
12 to 14 are cross-sectional views illustrating a method of manufacturing a semiconductor device according to the second embodiment of the present invention. Next, with reference to FIGS. 12-14, the manufacturing method of the semiconductor device by 2nd Embodiment is demonstrated. In FIGS. 12 to 14, the silicon columnar crystals are illustrated so as to be stacked in the thickness direction of the crystalline silicon film 4 a, but this is for easy understanding of the columnar crystals. Actually, since the thickness of the crystalline silicon film 4a is very small, one columnar crystal is formed in the thickness direction of the crystalline silicon film 4a. Therefore, no grain boundary extending in parallel with the surface of the columnar crystal silicon film 4a is formed in the intermediate region in the thickness direction of the crystal silicon film 4a.

  In the second embodiment, unlike the first embodiment, a dual gate transistor (TFT) having a pair of gate electrodes 6b formed at a predetermined interval on the same side on the crystalline silicon film 4a is formed. In the semiconductor device manufacturing method according to the second embodiment, the same process as that of the semiconductor device manufacturing method according to the first embodiment shown in FIGS. Thereafter, in the second embodiment, as shown in FIG. 12, a predetermined region in the vicinity of the central portion corresponding to the crystal grain boundary zone 8 of the columnar crystal of the reflection suppressing film 7 is removed by using the photolithography technique and the etching technique. By doing so, a pair of antireflection films 7a are formed at a predetermined interval.

  In the second embodiment, as shown in FIG. 13, by etching the absorption film 6 made of Mo using the reflection suppression film 7a as a mask, a pair of gate electrodes 6b corresponding to the pair of reflection suppression films 7a is formed. Form. Thus, the pair of gate electrodes 6b are formed on the same side on the crystalline silicon film 4a with a predetermined interval. Further, the pair of gate electrodes 6b is not formed on the crystal grain boundary zone 8 of the columnar crystal of the crystalline silicon film 4a.

Next, as shown in FIG. 14, impurities are ion-implanted into the crystalline silicon film 4a using the pair of antireflection films 7a and the pair of gate electrodes 6b as a mask. The implantation conditions at this time are the same as the implantation conditions according to the first embodiment. Then, as in the first embodiment, the impurities introduced into the crystalline silicon film 4a by the RTA method are electrically activated, so that the pair of outer source / drain regions 9a, the intermediate source / drain regions 9b, Is formed. The intermediate source / drain regions 9b include columnar crystal grain boundary zones 8. A channel region 10a sandwiched between an outer source / drain region 9a and an intermediate source / drain region 9b is formed under the pair of gate electrodes 6b. Then, comprising a pair of gate electrodes 6b made of Mo, an interlayer insulating film (gate insulating film) 5 made of SiO _2, a pair of source / drain regions 9a, the intermediate source / drain region 9b and the pair of channel regions 10a A dual gate transistor (TFT) is formed by the crystalline silicon film 4a. Other manufacturing processes according to the second embodiment are the same as the manufacturing process according to the first embodiment.

  In the second embodiment, as described above, the region corresponding to the position of the crystal grain boundary zone 8 of the columnar crystal in the absorption film 6 is removed, so that a predetermined interval is provided on the same side of the crystalline silicon film 4a. After forming the pair of gate electrodes 6b, the region including the crystal grain boundary zone 8 of the columnar crystal in the crystalline silicon film 4a is used as the source / drain region 9b in the middle of the dual gate transistor (TFT) having the pair of gate electrodes 6b. By using it, it is possible to suppress the columnar crystal grain boundary zone 8 from being disposed in the channel region 10a of the TFT having the pair of gate electrodes 6b. Thereby, it is possible to suppress the carriers from moving through the crystal grain boundary zone 8 of the columnar crystals arranged in the channel region 10a when the TFT is driven. For this reason, it can suppress that the mobility of a carrier falls resulting from a carrier moving through the crystal grain boundary zone | band 8 of a columnar crystal. As a result, it is possible to suppress degradation of the performance of the dual gate transistor (TFT) having a pair of gate electrodes 6b formed on the same side of the crystalline silicon film 4a at a predetermined interval.

  In the second embodiment, the position of the crystal grain boundary zone 8 of the columnar crystal can be controlled to a predetermined position in the intermediate source / drain region 9b formed in the crystalline silicon film 4a. Variation in the position of the grain boundary zone 8 of the columnar crystal in 4a can be suppressed. As a result, a dual gate formed by a pair of gate electrodes 6b, a gate insulating film 5, and a crystalline silicon film 4a including a pair of source / drain regions 9a, an intermediate source / drain region 9b and a pair of channel regions 10a. The uniformity of the performance of the transistor (TFT) can be improved.

  In the second embodiment, a pair of reflection suppression is caused by a photomask misalignment or the like when a predetermined region near the center of the reflection suppression film 7 is removed by using a photolithography technique and an etching technique. Even when the films 7a are formed with different sizes, the total size of the pair of reflection suppressing films 7a is constant. As a result, even when the gate length of the pair of gate electrodes 6b is formed differently by etching the absorption film 6 using the pair of reflection suppressing films 7a having different sizes as a mask, the gates of the pair of gate electrodes 6b The total length is constant. Therefore, even in such a case, the uniformity of the performance of the dual gate transistor (TFT) having the pair of gate electrodes 6b is maintained.

  The effects of the second embodiment other than those described above are the same as the effects of the first embodiment.

  FIG. 15 is a cross-sectional view for explaining a method for manufacturing a semiconductor device according to a modification of the second embodiment. In the modification of the second embodiment, unlike the second embodiment, two TFTs are individually formed using two gate electrodes 6b formed from the absorption film 6. In the modification of the second embodiment, after the ion implantation is performed on the crystalline silicon film 4a by the manufacturing process according to the second embodiment shown in FIG. 14, the photolithography technique and the etching technique are performed as shown in FIG. The region including the crystal grain boundary zone 8 of the columnar crystal of the crystalline silicon film 4a according to the second embodiment shown in FIG. 14 and the region corresponding to the region including the crystal grain boundary zone 8 of the gate insulating film 5 are used. Remove. Thereby, the gate insulating film 5 is divided into two gate insulating films 5a. Further, the crystalline silicon film 4a as an active layer (active layer) is divided into two crystalline silicon films 4b. Along with this, the intermediate source / drain region 9b is also divided into two source / drain regions 9c. As described above, two TFTs each including the gate electrode 6b, the gate insulating film 5a, and the crystalline silicon film 4b including the source / drain regions 9a and 9c and the channel region 10a are formed. The channel region 10a of the crystalline silicon film 4b constituting these two TFTs is formed without including the crystal grain boundary zone 8 of columnar crystals.

  In the modification of the second embodiment, as described above, by removing the region corresponding to the position of the crystal grain boundary zone 8 of the columnar crystal in the absorption film 6, a predetermined interval is provided above the crystalline silicon film 4a. After forming the two gate electrodes 6b apart, the two crystal silicon films 4b are formed by removing the region including the crystal grain boundary bands 8 of the columnar crystals of the crystal silicon film 4a, thereby forming the crystal grain boundary bands 8 It is possible to form two TFTs having two crystalline silicon films 4a not containing silicon and two gate electrodes 6b respectively corresponding to the two crystalline silicon films 4a. Thereby, in these two TFTs, the influence of the crystal grain boundary portion 8 of the columnar crystal is eliminated, so that two TFTs having excellent performance can be formed.

(Third embodiment)
16 to 18 are cross-sectional views for explaining a method of manufacturing a semiconductor device according to the third embodiment of the present invention. Next, with reference to FIGS. 16-18, the manufacturing method of the semiconductor device by 3rd Embodiment is demonstrated. 16 to 18, the silicon columnar crystals are illustrated so as to be stacked in the thickness direction of the crystalline silicon film 4a. This is for easy understanding of the columnar crystals. Actually, since the thickness of the crystalline silicon film 4a is very small, one columnar crystal is formed in the thickness direction of the crystalline silicon film 4a. Therefore, no grain boundary extending in parallel with the surface of the columnar crystal silicon film 4a is formed in the intermediate region in the thickness direction of the crystal silicon film 4a.

In the third embodiment, unlike the first embodiment, before the gate electrode 6a is formed by etching the absorption film 6, impurities are introduced into the crystalline silicon film 4a, and the introduced impurities are removed. It is activated electrically using a laser. Specifically, in the third embodiment, the absorption film 6 and the reflection suppression film 7 are formed by the same process as that of the first embodiment shown in FIGS. Thereafter, as shown in FIG. 16, impurities are ion-implanted into the crystalline silicon film 4a using the antireflection film 7 as a mask. At this time, when forming an n-channel transistor (TFT), P ⁺ (phosphorus ions) are ion-implanted under conditions of implantation energy: about 250 keV and dose amount: about 3 × 10 ¹⁵ ions / cm ² . In the case of forming an n-channel transistor (TFT), in order to make the source / drain region 9 have an LDD structure, P ⁺ (phosphorus ion) is separately implanted into the crystalline silicon film 4a with an energy of about 250 keV and a dose amount: Ions are implanted under conditions of about 5 × 10 ¹³ ions / cm ² . On the other hand, when forming a p-channel transistor (TFT), B ⁺ (boron ions) are ion-implanted under conditions of implantation energy: about 85 keV and dose: about 2.5 × 10 ¹⁵ ions / cm ² . Note that, in the impurity ion implantation step in the third embodiment, unlike the first and second embodiments, it is necessary to penetrate through the absorption film 6 to reach the impurity to the crystalline silicon film 4a. Compared with the ion implantation process of the second embodiment, the implantation energy is increased and the dose is set larger. Further, at the same time as the ion implantation according to the third embodiment, it is also possible to introduce impurities into an auxiliary capacitor electrode (not shown) arranged in each pixel of the liquid crystal display device or the organic EL display device. .

  Thereafter, in the third embodiment, as shown in FIG. 16, the reflection suppression film 7 and the absorption film 6 are irradiated with a continuous wave type fundamental wave YAG laser from above. The laser irradiation conditions at this time are the same as the laser irradiation conditions used for crystallization of the amorphous silicon film 4 according to the first embodiment except that the laser power is about 180 W. Since the absorption film 6 generates heat by this laser irradiation, the impurities introduced into the crystalline silicon film 4a are electrically activated using the heat. At this time, in the region where the antireflection film 7 of the absorption film 6 is provided, the absorption rate of the laser is improved as compared with the region where the antireflection film 7 is not provided. In the provided region, the amount of heat generation increases compared to the region in which the antireflection coating 7 is not provided. As a result, the region corresponding to the reflection suppressing film 7 of the crystalline silicon film 4 is heated up to about 1350 ° C., while the region not covered by the reflection suppressing film 7 is heated to a temperature of about 1100 ° C. or higher. The

Therefore, the impurity introduced into the crystalline silicon film 4a is electrically activated, whereby a pair of source / drain regions 9 are formed in the crystalline silicon film 4a. A channel region 10 sandwiched between the pair of source / drain regions 9 is formed in the crystalline silicon film 4a. When the crystalline silicon film 4a is heated, the region (channel region 10) corresponding to the reflection suppressing film 7 of the crystalline silicon film 4a is heated up to about 1350 ° C., but the melting point of the crystalline silicon film 4a. Since it is not heated to a temperature of about 1414 ° C. or higher, it does not melt. Further, the region (channel region 10) corresponding to the reflection suppressing film 7 of the crystalline silicon film 4a is heated up to about 1350 ° C., whereby the crystallinity of the crystalline silicon film 4a is improved. At this time, the region corresponding to the reflection suppressing film 7 of the gate insulating film 5 is similarly heated, so that the gate insulating film 5 made of the SiO ₂ film can be densified.

  Next, as shown in FIG. 18, the gate electrode 6 a is formed by etching the absorption film 6 using the antireflection film 7 as a mask. As described above, a TFT is formed by the gate electrode 6a, the gate insulating film 5, and the crystalline silicon film 4a including the pair of source / drain regions 9 and the channel region 10.

  The other manufacturing processes of the third embodiment are the same as the manufacturing process according to the first embodiment.

  In the third embodiment, as described above, after introducing the impurity into the crystalline silicon film 4a, the impurity is electrically activated by irradiating the antireflection film 7 and the absorption film 6 with a laser again, so that non-impact is obtained. Impurities introduced into the crystalline silicon film 4a can be electrically activated by using the laser irradiation apparatus used when the crystalline silicon film 4 is crystallized. Thereby, in order to electrically activate the impurities introduced into the crystalline silicon film 4a, it is not necessary to separately heat the crystalline silicon film 4a by using a heating device different from the laser irradiation device, thereby simplifying the manufacturing process. can do.

  In the third embodiment, before the gate electrode 6a of the TFT is formed by etching the absorption film 6 using the reflection suppression film 7 as a mask, the laser is again irradiated to the reflection suppression film 7 and the absorption film 6. Thus, by electrically activating the impurities, it is possible to heat the crystalline silicon film 4a in a state where the region into which the impurities are introduced is covered with the absorption film 6. Thereby, the region of the crystalline silicon film 4a into which the impurities are introduced can be uniformly and efficiently heated, so that the impurities introduced into the crystalline silicon film 4a can be electrically activated satisfactorily. In addition, when activating the impurities in the crystalline silicon film 4a, by heating by laser irradiation, it can be heated to a high temperature in a short time compared to the case of heating using the RTA method. Thereby, the activation rate of impurities can be further improved as compared with the case of using the RTA method, and the crystallinity of the crystalline silicon film 4a and the denseness of the gate insulating film 5 can be further improved.

  The other effects of the third embodiment are the same as the effects of the first embodiment.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description of the embodiment but by the scope of claims for patent, and all modifications within the meaning and scope equivalent to the scope of claims for patent are included.

  For example, in the above embodiment, when the source / drain regions are formed in the crystalline silicon film, impurities are introduced into the crystalline silicon film by ion implantation. However, the present invention is not limited to this, and crystalline silicon is formed by a method other than ion implantation. Impurities may be introduced into the film. For example, impurities may be introduced into the crystalline silicon film by ion doping or the like.

  Moreover, in the said 2nd Embodiment, although only the center part of the reflection suppression film | membrane was etched, this invention is not restricted to this, When etching the center part of a reflection suppression film | membrane, both the outer side parts of a reflection suppression film | membrane simultaneously May be etched. In this case, the outer ends of the pair of gate electrodes formed by etching the absorption film using the antireflection film as a mask are then formed with respect to the formation region of the microcrystalline silicon in the crystalline silicon film. Since it can be arranged on the inner side, it can be ensured that microcrystalline silicon is not contained in the channel region and the vicinity thereof. Further, by etching both outer portions of the antireflection film, the size of the pair of gate electrodes formed by etching the absorption film using the antireflection film as a mask can be made more constant.

  In the second embodiment, the impurities introduced into the crystallized silicon film after etching the absorption film are electrically activated using the RTA method. However, the present invention is not limited to this, and in the second embodiment, The impurity introduced into the crystalline silicon film prior to etching of the absorption film may be electrically activated by laser irradiation by the same process as in the third embodiment. If comprised in this way, also in the manufacturing method of the semiconductor device by the said 2nd Embodiment, the effect similar to the effect by the said 3rd Embodiment can be acquired.

  Further, in the third embodiment, the absorption film is heated by irradiating the reflection suppressing film and the absorption film with laser, and the impurities introduced into the crystalline silicon film are electrically activated using the heat. However, the present invention is not limited to this, and the impurity introduced into the crystalline silicon film may be electrically activated using a method other than the above. For example, the impurity introduced into the crystalline silicon film may be electrically activated by heating the crystalline silicon film using the RTA method.

  In the second embodiment, the two crystalline silicon films are formed by removing the region including the crystal grain boundary zone of the crystalline silicon film located between the two gate electrodes. However, the present invention is not limited to this. Alternatively, the two crystalline silicon films may be formed by removing a region of the crystalline silicon film located between the two gate electrodes that does not include a crystal grain boundary zone.

  In the second embodiment, a dual gate transistor having a pair of gate electrodes is formed. However, the present invention is not limited to this, and two TFTs formed by the process according to the second embodiment are separated from each other. It may be used as In this case, the two TFTs may be formed in different conductivity types. Further, different signals may be input to the gate electrodes of the two TFTs. In addition, since the two TFTs formed by the process according to the second embodiment share an intermediate source / drain region, unlike the case where the two TFTs are individually formed, the two TFTs are individually provided with the source / drain. Since the etching process for forming the drain region and the wiring for connecting the source / drain regions where the potentials of the two TFTs are equal can be omitted or shared, an improvement in yield and an integration degree are expected. it can. Such two TFTs can be effectively applied to a CMOS circuit composed of an n-channel transistor and a p-channel transistor and various circuits in which one of the source / drain regions of the two TFTs has the same potential. it can.

  In the above embodiment, an amorphous film is used as a semiconductor film to be crystallized by heating with laser irradiation. However, the present invention is not limited to this, and the state of the semiconductor film before crystallizing is amorphous. It does not have to be. That is, the same effect as that of the above embodiment can be obtained by performing laser irradiation by the process of the present invention on any crystalline semiconductor film. Note that as a semiconductor film to which the present invention is applied, semiconductor films having various crystallinity such as a microcrystalline film, an isotropic crystalline film, and an anisotropic crystalline film can be used.

It is sectional drawing for demonstrating the manufacturing method of the semiconductor device by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the semiconductor device by 1st Embodiment of this invention. It is a figure for demonstrating the process of fuse | melting the predetermined area | region of the amorphous silicon film of the semiconductor device by 1st Embodiment of this invention. FIG. 4 is a plan view showing a state where a predetermined region of the amorphous silicon film of the semiconductor device according to the first embodiment corresponding to FIG. 3 is melted. FIG. 5 is a plan view showing a process in which a crystal grows by melting a predetermined region of the amorphous silicon film of the semiconductor device according to the first embodiment corresponding to FIG. 4 and then cooling it. It is sectional drawing for demonstrating the manufacturing method of the semiconductor device by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the semiconductor device by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the semiconductor device by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the semiconductor device by 1st Embodiment of this invention. It is a figure for demonstrating the process of melting the amorphous silicon film by the comparative example for demonstrating the effect of the manufacturing method of the semiconductor device by 1st Embodiment of this invention. It is sectional drawing for demonstrating the comparative example for demonstrating the effect of the manufacturing method of the semiconductor device by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the semiconductor device by 2nd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the semiconductor device by 2nd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the semiconductor device by 2nd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the semiconductor device by the modification of 2nd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the semiconductor device by 3rd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the semiconductor device by 3rd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the semiconductor device by 3rd Embodiment of this invention.

Explanation of symbols

1 Glass substrate (substrate)
4 Amorphous silicon film (semiconductor film)
4a Crystalline silicon film (Crystal film)
6 Absorption film 6a, 6b Gate electrode 7, 7a Antireflection film 8 Grain boundary zone 9, 9a, 9b, 9c Source / drain region 10 Channel region

Claims (6)

Forming a semiconductor film on the substrate;
Forming an absorption film on the semiconductor film;
Forming a reflection suppressing film on a predetermined region of the absorption film;
A continuous formation formed by associating a plurality of crystals by causing the absorption film to generate heat by irradiating the antireflection film and the absorption film with laser, and crystallizing the semiconductor film using the heat. Forming a crystal film in which the position of the crystal grain boundary is controlled.   The step of forming the crystal film in which the position of the crystal grain boundary part is controlled includes the step of controlling the position of the crystal grain boundary part to a position corresponding to the vicinity of the central part of the reflection suppressing film. The manufacturing method of the semiconductor device of description.   The step of causing the absorption film to generate heat by irradiating the laser and crystallizing the semiconductor film using the heat is not limited to the region corresponding to the antireflection film of the semiconductor film, but also the antireflection film. 3. The method for manufacturing a semiconductor device according to claim 1, further comprising a step of heating an outer region in the vicinity of the end portion to a temperature higher than a melting point of the semiconductor film by irradiation with the laser. Forming the semiconductor film on the substrate includes forming the semiconductor film in an island shape;
4. The method of manufacturing a semiconductor device according to claim 1, wherein the step of forming the absorption film includes a step of forming the absorption film so as to cover an upper portion of the island-shaped semiconductor film. A step of forming a pair of gate electrodes on the upper side of the crystal film at a predetermined interval by removing a region corresponding to the position of the crystal grain boundary portion of the absorption film;
After forming the pair of gate electrodes, a region including the crystal grain boundary portion of the crystal film is used as an intermediate source / drain region positioned between the pair of gate electrodes of the transistor having the pair of gate electrodes. The manufacturing method of the semiconductor device of any one of Claims 1-4. Forming two gate electrodes at a predetermined interval above the crystal film by removing a region corresponding to the position of the crystal grain boundary portion of the absorption film;
The method for manufacturing a semiconductor device according to claim 1, further comprising a step of removing a predetermined region corresponding to the gap between the two gate electrodes of the crystal film.

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