JP2011009583A - Semiconductor device, method for manufacturing the same, and display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device, a method for manufacturing the same, and a display device which can suppress reduction in the yield and the throughput, even when a crystalline silicon thin film is formed by laser annealing of an amorphous silicon thin film.SOLUTION: The semiconductor device is configured, by forming a thin film transistor TFT having a semiconductor layer 15 composed of crystalline silicon and a wiring layer LN composed of a metal wire 12, on one surface side of an insulating substrate 11 in an in-phase state. The semiconductor layer 15 in the thin film transistor TFT is formed, by patterning a photothermal conversion layer 22 only on a region which serves as a channel layer on an amorphous silicon thin film 15x formed on one surface side of the substrate 11, and then irradiating the whole area of the substrate 11 with a laser beam BM, by laser beam scanning and applying thermal annealing to crystallize the amorphous silicon thin film 15x.

Description

  The present invention relates to a semiconductor device, a manufacturing method thereof, and a display device, and more particularly, a thin film transistor using an amorphous semiconductor film and a thin film transistor using a crystalline or microcrystalline semiconductor film are provided over the same substrate. The present invention relates to a semiconductor device, a manufacturing method thereof, and a display device to which the semiconductor device is applied.

  In recent years, thin displays such as liquid crystal display devices, organic electroluminescence displays, and plasma displays have been used as displays and monitors for portable devices such as mobile phones and digital cameras, as well as electronic devices such as televisions and personal computers. In such a thin display panel and drive driver, a thin film transistor element using a silicon thin film as a channel layer is generally used.

As is well known, thin film transistor elements can be broadly classified into two types, an amorphous silicon thin film transistor and a crystalline silicon thin film transistor, based on the solid structure of the silicon thin film. Amorphous silicon thin film transistors are characterized in that an amorphous silicon thin film can be uniformly formed in a large area at a low cost, and there is little variation in performance between adjacent elements. However, since the electron mobility is low (approximately 0.5 to ¹ cm ² V ⁻¹ s ⁻¹ ), for example, an amorphous silicon thin film transistor is applied to the display device, and a circuit such as a driver is formed simultaneously with the pixels in the display region. In this case, there is a problem that sufficient performance as a driver circuit cannot be realized. In addition, the amorphous silicon thin film transistor also has a disadvantage that the threshold voltage (Vth) shifts (that is, stress resistance is low) when driven for a long period of time.

On the other hand, a crystalline silicon thin film transistor has a high electron mobility and a small shift of the threshold voltage Vth with time. Therefore, as described above, even when a driver circuit is formed simultaneously with a pixel of a display device, the driver It has a feature that it can realize sufficient performance as a circuit. As a method for forming a silicon thin film used for such a crystalline silicon thin film transistor, for example, a plasma enhanced chemical vapor deposition method (Plasma Enhanced chemical vapor deposition).
There is a known technique for crystallizing an amorphous silicon thin film by vapor deposition (PECVD), etc., and then melting and cooling the amorphous silicon by thermal annealing using an infrared lamp or laser. Yes.

  Here, when crystallizing amorphous silicon with a laser, an excimer laser having a high absorption coefficient of amorphous silicon is usually used, but the output is unstable and maintenance is poor from the viewpoint of mass production. Has the problem. Therefore, it has been proposed to use a semiconductor laser having a more stable output and excellent maintainability.

  However, amorphous silicon has a problem in that it has a low absorption coefficient for light having wavelengths of infrared light and visible light oscillated by a semiconductor laser. Therefore, as a method for efficiently annealing the amorphous silicon film, after forming an amorphous silicon thin film, a photothermal conversion layer having a high light absorption coefficient for infrared light and visible light is formed on the thin film. A method has been proposed. Thus, by irradiating the light-to-heat conversion layer with laser light, the light-to-heat conversion layer is heated, and the amorphous silicon in the lower layer can be annealed with the heat and efficiently crystallized. Such a method for forming a crystalline silicon thin film is described in, for example, Patent Document 1, Non-Patent Documents 1 and 2, and the like.

JP 2007-005508 A

T. Sameshima and N. Andoh: Jpn. J. Appl. Phys. 44 (2005) 7305. T. Sameshima, M. Maki, M, Takiuchi, N. Andoh, N. Sano, Y. Matsuda and Y. Andoh: Jpn. J. Appl. Phys. 46 (2007) 6474.

  In the method for forming a crystalline silicon thin film described in each of the prior art documents described above, a photothermal conversion layer is formed on the entire surface of the substrate on which the thin film transistor element is formed. Therefore, it is necessary to heat when irradiated with laser light. There was a possibility of heating up to a place where there was no. Therefore, there is a problem that, for example, when a wiring portion other than a region that becomes a channel layer of the crystalline silicon thin film transistor is heated, a film on the wiring is peeled off or a crack is generated. In particular, since the degree of heating is increased in the metal wiring portion, peeling of the interlayer film such as a silicon insulating film becomes prominent, resulting in a decrease in manufacturing yield. In order to avoid such a problem, it is necessary to locally irradiate the laser height so as not to heat the wiring portion. Therefore, there is a problem in that the throughput (or work efficiency) in the laser light irradiation process is reduced. Had.

  Therefore, in view of the above-described problems, the present invention provides a semiconductor device capable of suppressing a decrease in yield and throughput even when a crystalline silicon thin film is formed by laser annealing an amorphous silicon thin film. An object of the present invention is to provide a manufacturing method and a display device.

The semiconductor device according to claim 1 is provided with a thin film transistor having a semiconductor layer made of at least a crystalline film on a substrate, and the semiconductor layer of the thin film transistor is an amorphous film formed on the substrate. The thin film is crystallized by subjecting it to thermal annealing through a photothermal conversion layer formed only on a region to be a channel layer of the thin film transistor.
According to a second aspect of the present invention, in the semiconductor device according to the first aspect, the semiconductor layer of the thin film transistor has a microcrystalline film quality.

According to a third aspect of the present invention, there is provided a semiconductor device including, on a substrate, at least a first thin film transistor having a semiconductor layer having a crystalline film quality and a second thin film transistor having an amorphous semiconductor layer. The semiconductor layer of the first thin film transistor is heated with respect to an amorphous thin film formed on the substrate via a photothermal conversion layer formed only on a region that becomes a channel layer of the thin film transistor. It is crystallized by annealing, and the semiconductor layer of the second thin film transistor is made of the amorphous thin film.
According to a fourth aspect of the present invention, in the semiconductor device according to the third aspect, the semiconductor layer of the first thin film transistor has a microcrystalline film quality.

According to a fifth aspect of the present invention, there is provided a semiconductor device manufacturing method comprising: forming an amorphous thin film on a substrate; forming a photothermal conversion layer only on a region corresponding to a channel layer of a thin film transistor; Irradiating the entire area of the substrate with laser light and crystallizing the amorphous thin film formed under the photothermal conversion layer by thermal annealing; and removing the photothermal conversion layer; , Including.
According to a sixth aspect of the present invention, in the semiconductor device manufacturing method according to the fifth aspect, the semiconductor layer comprising the thin film crystallized by irradiating the laser beam and thermally annealing the amorphous thin film The method further includes the step of forming a first thin film transistor having a channel layer as a channel layer.
According to a seventh aspect of the present invention, in the method of manufacturing a semiconductor device according to the sixth aspect, the method further includes the step of forming a second thin film transistor having the semiconductor layer made of the amorphous thin film as a channel layer. It is characterized by being.
According to an eighth aspect of the present invention, in the method of manufacturing a semiconductor device according to the seventh aspect, the first thin film transistor and the second thin film transistor are simultaneously formed using the same process.
According to a ninth aspect of the present invention, in the method of manufacturing a semiconductor device according to any of the fifth to eighth aspects, the amorphous thin film is crystallized by irradiating the laser beam and thermally annealing the amorphous thin film. The thin film has a microcrystalline film quality.

According to a tenth aspect of the present invention, there is provided a display device including a display panel in which a plurality of display pixels each having a display element and a pixel driving circuit for driving the display element are two-dimensionally arranged on a substrate. The drive circuit includes at least a selection transistor for setting the display pixel in a selected state when writing display data to the display pixel, and a light emission drive current having a current value corresponding to the display data to the display element. A driving transistor to be supplied, wherein at least the driving transistor comprises a first thin film transistor having a semiconductor layer made of a crystalline film, and the selection transistor has a second thin film transistor having an amorphous semiconductor layer And the semiconductor layer of the first thin film transistor is formed on the amorphous thin film formed on the substrate. The semiconductor layer of the second thin film transistor is crystallized by performing thermal annealing through a light-to-heat conversion layer formed only on a region serving as a channel layer of the film transistor. It is characterized by comprising.
According to an eleventh aspect of the present invention, in the display device according to the tenth aspect, the semiconductor layer of the first thin film transistor has a microcrystalline film quality.
According to a twelfth aspect of the present invention, in the display device according to the tenth or eleventh aspect, the display element is an organic electroluminescence element.

According to a thirteenth aspect of the present invention, there is provided a pixel array in which a plurality of display pixels are two-dimensionally arranged on a substrate, and a selection driver for setting the display pixels to a selected state when writing display data to the display pixels. And a data driver unit for supplying the display data to the display pixel, wherein at least the selection driver unit and the driver circuit of the data driver unit have a semiconductor layer made of a crystalline film quality The semiconductor layer of the thin film transistor is thermally annealed with respect to an amorphous thin film formed on the substrate via a photothermal conversion layer formed only on a region to be a channel layer of the thin film transistor. It is characterized by being crystallized by applying.
A fourteenth aspect of the present invention is the display device according to the thirteenth aspect, wherein the semiconductor layer of the thin film transistor has a microcrystalline film quality.

  According to the semiconductor device, the manufacturing method thereof, and the display device according to the present invention, even when the amorphous silicon thin film is laser-annealed to form the crystalline silicon thin film, it is possible to suppress a decrease in yield and throughput. it can.

1 is a schematic cross-sectional view showing a first embodiment of a semiconductor device according to the present invention. FIG. 6 is a schematic process cross-sectional view (part 1) illustrating the example of the method for manufacturing the semiconductor device according to the first embodiment. FIG. 6 is a schematic process cross-sectional view (part 2) illustrating the example of the method for manufacturing the semiconductor device according to the first embodiment. It is a schematic process drawing which shows an example of the manufacturing method of the semiconductor device in a comparative example. It is a Raman (Raman) spectroscopy spectrum figure which shows an example of the crystallinity degree of the silicon thin film used for a thin-film transistor. It is a schematic block diagram which shows an example of the display apparatus with which the semiconductor device which concerns on this invention is applied. It is an equivalent circuit diagram which shows the circuit structural example of the display pixel to which the semiconductor device which concerns on this invention is applied. FIG. 6 is a cross-sectional structure diagram schematically illustrating a substrate structure of a display pixel applied to a second embodiment. It is a schematic process sectional drawing (the 1) which shows an example of the manufacturing method of the semiconductor device which concerns on 2nd Embodiment. FIG. 6 is a schematic process cross-sectional view (part 2) illustrating an example of a method for manufacturing a semiconductor device according to a second embodiment. It is a schematic process sectional drawing (the 3) which shows an example of the manufacturing method of the semiconductor device which concerns on 2nd Embodiment. It is a schematic block diagram which shows the other example of the display apparatus with which the semiconductor device which concerns on this invention is applied.

Hereinafter, a semiconductor device, a manufacturing method thereof, and a display device according to the present invention will be described in detail with reference to embodiments.
<First Embodiment>
(Semiconductor device)
FIG. 1 is a schematic cross-sectional view showing a first embodiment of a semiconductor device according to the present invention. Here, FIG. 1 shows a configuration in which one thin film transistor and one wiring layer are provided for simplification of description.

  As shown in FIG. 1, the semiconductor device according to the present embodiment has a semiconductor layer made of polycrystalline silicon or microcrystalline silicon on one surface (upper surface in the drawing) side of an insulating substrate 11 such as glass or plastic. The thin film transistor (crystalline silicon thin film transistor) TFT and the wiring layer LN made of the metal wiring 12 are provided in the same layer.

  Specifically, as shown in FIG. 1, the thin film transistor TFT includes, for example, a gate electrode 13 via a gate electrode 13 provided on one surface side of the insulating substrate 11 and an insulating film 14 serving as a gate insulating film. 13, a semiconductor layer (channel layer) 15 made of crystalline silicon provided in a region corresponding to 13, a channel protect layer (or block layer) 16 provided on the semiconductor layer 15, and both ends of the channel protect layer 16 A doped layer (impurity layer) 17 provided on the semiconductor layer 15 extending from the portion, and a source electrode and a drain electrode (hereinafter referred to as “source and drain electrodes”) provided in alignment on the doped layer 17 18). Further, as shown in FIG. 1, the wiring layer LN is made of, for example, a metal wiring 12 provided in the same layer as the gate electrode 13 of the thin film transistor TFT, and is covered with an insulating film 14 serving as a gate insulating film.

  Although FIG. 1 shows a state in which the source and drain electrodes 18 of the thin film transistor TFT provided on the substrate 11 are exposed, in the actual product, the upper surface of the substrate 11 including the thin film transistor TFT is not shown. It is covered and protected by an insulating film or the like. In addition, a structure in which a display element, an upper wiring layer, and the like are formed via an interlayer insulating film, a planarizing film, or the like on the structure shown in FIG.

  In the semiconductor device having the configuration as described above, the present embodiment is characterized in that the thin film transistor TFT includes a semiconductor layer 15 made of crystalline silicon. Here, in the present invention, “crystallinity” means that an amorphous silicon thin film formed on a substrate 11 is crystallized by thermal annealing, as will be described later in a method for manufacturing a semiconductor device. It is defined as having a polycrystalline (polycrystal) or microcrystalline (microcrystal) film quality. More detailed definition will be described later.

(Production method)
Next, a method for manufacturing the semiconductor device as described above will be described with reference to the drawings.
2 and 3 are schematic process cross-sectional views showing an example of a method for manufacturing a semiconductor device according to the present embodiment.

  First, as shown in FIG. 2A, a thin film containing a metal material is formed on an insulating substrate 11 by a sputtering method or the like, and then patterned into a desired planar shape to form the gate electrode 13 of the thin film transistor TFT and Metal wiring 12 is formed. Here, as the material of the substrate 11, for example, alkali-free glass is used. Examples of the gate metal that becomes the gate electrode 13 and the metal wiring 12 include aluminum (Al), titanium (Ti), vanadium (V), chromium (Cr), manganese (Mn), iron (Fe), and cobalt (Co ), Nickel (Ni), copper (Cu), zinc (Zn), zirconium (Zr), niobium (Nb), molybdenum (Mo), palladium (Pd), silver (Ag), indium (In), tin (Sn) ), Tantalum (Ta), tungsten (W), platinum (Pt), gold (Au), etc., or a metal material containing any of these, or a metal material containing these alloys.

  Next, the substrate 11 on which the gate electrode 13 and the metal wiring 12 are formed is set in a chamber of a CVD apparatus, and an insulating film 14 serving as a gate insulating film is formed over the entire region of the substrate 11 by using, for example, a plasma CVD method. As a result, the gate electrode 13 and the metal wiring 12 on the substrate 11 are covered with the insulating film 14 as shown in FIG. Here, as the insulating film 14, for example, a silicon nitride film or a silicon oxide film is used.

Next, as shown in FIG. 2B, an amorphous silicon thin film 15x and a buffer layer 21 are continuously formed over the entire region of the substrate 11 by plasma CVD in the chamber of the CVD apparatus. Specifically, as the film formation conditions for the amorphous silicon thin film 15x, the gas flow rates of silane gas and hydrogen gas are respectively silane gas / hydrogen gas = 1500/190 (SCCM), the power density is 0.034 W / cm ² , and the pressure in the chamber Was set to 50 Pa. Here, the thickness of the amorphous silicon thin film 15x is appropriately about 5 to 100 nm. This is because when the thickness of the amorphous silicon thin film 15x is 5 nm or less, it does not function as a thin film, and when it is too thick, the resistance in the direction perpendicular to the substrate surface increases, and the film stress This is because cracks are likely to occur.

  As will be described later, the buffer layer 21 is interposed between the amorphous silicon thin film 15x and the photothermal conversion layer 22x when a metal thin film is used as the photothermal conversion layer 22x formed on the amorphous silicon thin film 15x. To form. As the buffer layer 21, for example, a silicon oxide film or a silicon nitride film is used and is formed to a thickness of about 10 to 50 nm.

  Next, the substrate 11 on which the amorphous silicon thin film 15x and the buffer layer 21 are formed is taken out of the chamber, and the photothermal conversion layer 22x is formed over the entire substrate 11 as shown in FIG. Here, when diamond-like carbon (DLC) is used as the photothermal conversion layer 22x, the film is formed on the substrate 11 set in the chamber of the sputtering apparatus by using a sputtering method using carbon as a target in a vacuum atmosphere. To do. When a metal thin film is used as the photothermal conversion layer 22x, for example, a simple metal such as molybdenum (Mo), chromium (Cr), aluminum (Al), titanium (Ti), niobium (Nb), or an alloy thereof. A film is formed using a sputtering method with a target. The film thickness of the photothermal conversion layer 22x is set to about 50 to 400 nm.

  Further, when a metal thin film is used as the photothermal conversion layer 22x, amorphous silicon and metal may chemically react to form silicide, so that the amorphous silicon thin film 15x and the metal are formed as described above. A buffer layer 21 made of an insulating film is formed between the photothermal conversion layer 22x made of a thin film.

  Next, as shown in FIG. 2D, the photothermal conversion layer 22x is patterned using a photolithography technique to form the photothermal conversion layer 22 having a predetermined planar shape. Specifically, first, a photoresist (not shown) is applied to a region to be a channel layer of the thin film transistor TFT (that is, a region including the region where the gate electrode 13 is formed, and an amorphous silicon thin film is formed by laser annealing described later. 15x is patterned so as to remain only on the region to be crystallized), and the lower photothermal conversion layer 22x is etched using the photoresist. When the above-described diamond-like carbon (DLC) is used as the photothermal conversion layer 22x, etching is performed by a dry etching method using oxygen plasma. Further, when the metal thin film described above is used as the photothermal conversion layer 22x, wet etching is performed using an etchant suitable for each thin film material, or etching is performed by dry etching.

  Next, as shown in FIG. 2E, a laser beam BM is irradiated to the entire area of the substrate 11 using a semiconductor laser device (not shown), and only the amorphous silicon thin film 15x under the photothermal conversion layer 22 is irradiated. Perform thermal annealing (laser annealing). As a result, only the amorphous silicon thin film 15x immediately below the region where the photothermal conversion layer 22 remains is crystallized to form the semiconductor layer 15 made of a polycrystalline silicon thin film or a microcrystalline silicon thin film.

Specifically, as a laser light source used for laser annealing, for example, a broad area type high-power semiconductor laser device having a wavelength of 808 nm is used. In such a semiconductor laser device, laser light having a light output of about 4 W is continuously oscillated and shaped into a desired beam shape through a uniform illumination optical system such as a microlens array. Further, this beam is condensed to a light intensity of about ² mW / μm ² and irradiated while moving the substrate 11 at a constant speed of about 40 mm / s, for example. That is, the laser beam BM having a predetermined irradiation range is scanned to irradiate the entire region of the substrate 11 with the laser beam BM, thereby performing thermal annealing.

  As a result, the film material forming the photothermal conversion layer 22 is heated to a high temperature, and this heat is transferred to the amorphous silicon thin film 15x through the lower buffer layer 21 by heat conduction. Then, when the amorphous silicon thin film 15x reaches the melting point and is thermally annealed, only the amorphous silicon thin film 15x immediately below the photothermal conversion layer 22 is crystallized as shown in FIG. A semiconductor layer 15 made of a porous silicon thin film is formed. As described above, the amorphous silicon thin film 15x in the region to be the channel layer of the thin film transistor TFT is crystallized in accordance with the setting conditions of the laser annealing, and the semiconductor layer 15 made of the polycrystalline silicon thin film or the microcrystalline silicon thin film is formed. Can be formed. On the other hand, since the amorphous silicon thin film 15x in the region where the photothermal conversion layer 22 is not formed has a low absorption coefficient (absorbance), the laser beam BM does not pass through and is maintained in an amorphous state. .

  Next, as shown in FIG. 3B, after the photothermal conversion layer 22 on the buffer layer 21 is removed, an insulating layer 16x serving as a channel protection layer is formed over the entire region of the substrate 11 by using, for example, a plasma CVD method. . Here, as the method for removing the light-to-heat conversion layer 22, the same method as the step of patterning the light-to-heat conversion layer 22x described above (such as a dry etching method or a wet etching method depending on the film material) can be applied. As the insulating layer 16x, for example, a silicon nitride film or a silicon oxide film is used as in the case of the insulating film 14 and the buffer layer 21 described above.

  Next, as shown in FIG. 3C, the insulating layer 16x and the buffer layer 21 are successively patterned using a photolithography technique to form a channel protect layer 16 having a predetermined planar shape. Specifically, a photoresist (not shown) is patterned so as to remain only in a region that becomes a channel layer of the thin film transistor TFT and corresponds to a region where the gate electrode 13 is formed, and the photoresist is used. Then, the lower insulating layer 16x and the buffer layer 21 are continuously dry-etched. As a result, the channel protect layer 16 including the insulating layer 16x and the buffer layer 21 is formed.

Next, as illustrated in FIG. 3C, a doped layer (impurity layer) 17 x for forming the source and drain of the thin film transistor TFT is formed over the entire region of the substrate 11. Here, what material is used for the doped layer 17x differs depending on whether the thin film transistor TFT to be manufactured is p-type or n-type. In the case of a p-type thin film transistor, a doped layer 17x is formed by forming a silicon layer (p ⁺ -Si layer) in which an acceptor-type impurity such as diborane is mixed in silane gas by using a plasma CVD method. On the other hand, in the case of an n-type thin film transistor, a silicon layer (n ⁺ -Si layer) in which a donor-type impurity such as arsine or phosphine is mixed in a silane gas is formed using a plasma CVD method, thereby forming a doped layer 17x. Form. The thickness of the doped layer 17x is set to approximately 5 to 100 nm for the same reason as in the case of the amorphous silicon thin film 15x described above, which is a non-doped silicon layer (i-Si layer).

  Next, as shown in FIG. 3D, the doped layer 17x is patterned to form the doped layer 17 having a planar shape extending from both ends of the channel protect layer 16 onto the semiconductor layer 15, and the thin film transistor TFT. The amorphous silicon thin film 15x other than the semiconductor layer 15 in the region to be the channel layer is removed. Specifically, a photoresist (not shown) is patterned so as to remain only on the region corresponding to the planar shape of the source and drain electrodes 18 of the thin film transistor TFT, and the lower doped layer 17x and the non-doped layer are formed using the photoresist. The crystalline silicon thin film 15x is continuously dry etched. Thereby, the doped layer 17 is formed in the formation region of the thin film transistor TFT, and the amorphous silicon thin film 15x outside the formation region of the thin film transistor TFT is removed, and the insulating film 14 is exposed.

  Next, as shown in FIG. 3E, a drain metal layer 18 x for forming the source and drain electrodes 18 of the thin film transistor TFT is formed over the entire region of the substrate 11. The drain metal layer 18x has an electrode structure in which an electrode layer made of a single metal such as chromium (Cr), aluminum (Al), titanium (Ti), niobium (Nb), or an alloy thereof is laminated, for example. For example, it is formed using a sputtering method.

  Next, the drain metal layer 18x is patterned to have a predetermined planar shape, and the source and drain electrodes 18 are formed on the doped layer 17 of the thin film transistor TFT as shown in FIG. Specifically, a photoresist (not shown) is patterned so as to remain only on the region corresponding to the planar shape of the source and drain electrodes 18 of the thin film transistor TFT, and the underlying drain metal layer 18x is formed using the photoresist. Perform dry etching. As a result, the doped layer 17 and the source / drain electrodes 18 having a planar shape extending from both ends of the channel protect layer 16 onto the semiconductor layer 15 are formed in the formation region of the thin film transistor TFT.

  In the semiconductor device manufacturing method described above, the case where the removal of the amorphous silicon thin film 15x and the patterning of the doped layer 17 and the source and drain electrodes 18 are performed in separate steps has been described. It is not limited and the following manufacturing methods may be applied.

  That is, for example, as shown in FIG. 3C, after the channel protect layer 16 is formed by patterning in a region that becomes the channel layer of the thin film transistor TFT, the doped layer 17x and the drain metal layer 18x are sequentially formed on the substrate 11. . Next, patterning is performed so that the photoresist remains only on the region corresponding to the planar shape of the source and drain electrodes 18. Using the photoresist, the drain metal layer 18 x is first dry-etched to form the source and drain electrodes 18. Form. Next, using the patterned source and drain electrodes 18 as a mask, the lower doped layer 17x and the amorphous silicon thin film 15x are continuously dry etched to form the doped layer 17 that matches the source and drain electrodes 18. At the same time, the amorphous silicon thin film 15x is removed. According to such a manufacturing method, the number of photolithography and patterning steps can be reduced, and the manufacturing efficiency can be improved.

Next, the advantages of the operational effects of the semiconductor device and the manufacturing method thereof according to the above-described embodiment will be described in detail with reference to comparative examples.
FIG. 4 is a schematic process diagram showing an example of a method for manufacturing a semiconductor device in the prior art (hereinafter referred to as “comparative example”) for explaining the operational effects of the semiconductor device and the method for manufacturing the same according to the present embodiment. is there. Here, about the structure and manufacturing process equivalent to this embodiment mentioned above, while attaching | subjecting an equivalent code | symbol, the description is simplified or abbreviate | omitted with reference to FIG.2 and FIG.3.

  The semiconductor device manufacturing method in the comparative example is obtained by patterning the gate electrode 13 and the metal wiring 12 on the substrate 11 as shown in FIG. ), The insulating film 14, the amorphous silicon thin film 15x, and the photothermal conversion layer 22x are sequentially stacked over the entire substrate 11. Thereafter, as shown in FIG. 4B, the entire region of the substrate 11 is irradiated with the laser beam BM by scanning the laser beam BM having a predetermined irradiation region oscillated from a semiconductor laser device (not shown). Perform thermal annealing.

  In such a manufacturing method, laser light is irradiated in a state where the photothermal conversion layer 22x is formed over the entire area of the substrate 11, and therefore, in a region other than the region where the thin film transistor TFT (channel layer) that originally requires thermal annealing is formed. However, heating by the photothermal conversion layer 22x occurs. In this case, for example, the insulating film 14 on the metal wiring 12 is peeled off or cracked due to the difference in the heat absorption coefficient and the thermal expansion coefficient between the metal wiring 12 and the silicon nitride film or silicon oxide film constituting the insulating film 14. Have a problem. As a method for avoiding such a phenomenon, only a region where thermal annealing is necessary (a region where a thin film transistor TFT is formed) is irradiated with laser light, and a region where thermal annealing is not necessary (for example, a region where a wiring layer LN is formed) is lasered. Although it is conceivable to perform scanning so as not to irradiate light, in this case, there is a problem that the throughput (working efficiency) in the laser light irradiation process is reduced.

  In contrast, in the semiconductor device and the manufacturing method thereof according to the present embodiment, when the amorphous silicon thin film 15x is crystallized, the photothermal conversion layer 22 is formed only on the region that becomes the channel layer of the thin film transistor TFT. Thereafter, there is a method of performing thermal annealing by irradiating laser beam BM. According to this, only the amorphous silicon thin film 15x in the region where the thin film transistor TFT (channel layer) is formed can be efficiently heated and crystallized, and the metal wiring 12 other than the region where the thin film transistor TFT is formed, for example. It is possible to suppress heating due to thermal annealing in the formation region of the film, suppress peeling of the insulating film 14 and the like, and generation of cracks, thereby suppressing a decrease in manufacturing yield. In this case, similarly to the above-described comparative example, the laser beam BM may be scanned and irradiated to the entire area of the substrate 11, so that the throughput (working efficiency) in the laser beam BM irradiation process is not reduced. .

Here, element characteristics of the thin film transistor TFT applied to the semiconductor device according to the present embodiment will be described.
In the semiconductor device and the manufacturing method thereof described above, a polycrystalline (polycrystal) or microcrystalline (microcrystal) silicon thin film is used as the thin film transistor TFT having a semiconductor layer made of crystalline silicon formed by laser annealing. The thin film transistor included as the semiconductor layer has been described.

  In particular, a thin film transistor (microcrystalline silicon thin film transistor) having a microcrystalline silicon thin film as a semiconductor layer has a slightly lower electron mobility than a polycrystalline silicon thin film transistor, but is in comparison with an amorphous silicon thin film transistor. It has excellent characteristics that it has a high threshold voltage variation as low as that of a polycrystalline silicon thin film transistor, and that variations in performance between adjacent elements are as small as that of an amorphous silicon thin film transistor. is doing.

  Such microcrystalline silicon generally has a crystal grain size in the order of several tens of nm to several μm, and the crystallized silicon thin film contains approximately 30% of amorphous silicon. It is defined as the state of being. Here, a sample (crystalline silicon thin film) formed by thermal annealing by irradiating an amorphous silicon thin film with laser light based on the laser annealing setting conditions shown in the semiconductor device manufacturing method described above. The measured data of the Raman spectrum is shown, and the crystallinity is specifically analyzed.

FIG. 5 is a Raman spectroscopic spectrum diagram showing an example of the crystallinity of a silicon thin film used for a thin film transistor.
As shown in FIG. 5, the measured spectrum SPz of the above sample by Raman spectroscopy shows the peak intensity of a typical spectrum SPc in crystallized (polycrystalline) silicon (approximately 520 cm ⁻¹ ) and the typical spectrum in microcrystalline silicon. The peak intensity of a typical spectrum SPm (approximately around 500 cm ⁻¹ ) and the curve SPx of a calculated value obtained by summing the peak intensities of typical spectra SPa in amorphous silicon (approximately 470 cm ⁻¹ ) are substantially the same. That is, the microcrystalline silicon thin film is in a state where amorphous, microcrystalline, and crystalline silicon are mixed, and the measured spectrum SPz is as shown in FIG. It can be decomposed into three peaks of amorphous silicon. Thereby, the crystallinity of silicon can be expressed as shown in the following formula (1).
Crystallinity = (Ic-Si + I.mu.c-Si) / (Ic-Si + I.mu.c-Si + Ia-Si) (1)

  In formula (1), Ic-Si is the peak intensity of crystallized (polycrystalline) silicon in the Raman spectrum, Iμc-Si is the peak intensity of microcrystalline silicon, and Ia-Si is non- It is the peak intensity of crystalline silicon. Based on this formula (1), the crystallinity of the sample having the measured spectrum SPz shown in FIG. 5 is calculated to be 72.2%, and the content of amorphous silicon is approximately 30%. It can be determined that microcrystalline silicon is formed.

<Second Embodiment>
Next, a semiconductor device, a manufacturing method thereof, and a display device according to a second embodiment of the present invention will be described.
In the first embodiment described above, the case where the thin film transistor TFT having the semiconductor layer made of crystalline (polycrystalline or microcrystalline) silicon and the wiring layer LN are simultaneously formed on the single substrate 11 will be described. did. In the second embodiment, a case where a crystalline silicon thin film transistor, an amorphous silicon thin film transistor, and a wiring layer are simultaneously formed on a single substrate 11 will be described.

(Display device)
First, a display device and display pixels to which the semiconductor device and the manufacturing method thereof according to the present embodiment can be applied will be described. In the embodiment described below, the display panel has a configuration in which a plurality of display pixels each having an organic electroluminescence element (organic EL element) are two-dimensionally arranged, and each display pixel is used as display data (video data). The case where the semiconductor device of the present invention is applied to an organic EL display panel that displays image information by performing a light emission operation with a corresponding luminance gradation will be described. However, the present invention is applied to a display panel that displays image information by other display methods. You may do.

FIG. 6 is a schematic configuration diagram illustrating an example of a display device to which the semiconductor device according to the present invention is applied, and FIG. 7 is an equivalent circuit illustrating a circuit configuration example of a display pixel to which the semiconductor device according to the present invention is applied. FIG.
As shown in FIG. 6, the display device to which the semiconductor device according to the present embodiment is applicable sets at least the display panel 110 in which a plurality of display pixels PIX are two-dimensionally arranged and the display pixels PIX in a selected state. And a data driver 130 for supplying a gradation signal corresponding to display data to each display pixel PIX.

(Display pixel)
As shown in FIG. 7, each display pixel PIX includes a pixel drive circuit DC and an organic EL element OEL, and a light emission drive current having a current value corresponding to display data is supplied to the organic EL element OEL by the pixel drive circuit DC. Thus, the light emission operation is performed with a predetermined luminance gradation corresponding to the display data.

  For example, as shown in FIG. 7, the pixel drive circuit DC includes a thin film transistor Tr11, a thin film transistor Tr12, and a capacitor Cs. The thin film transistor Tr11 has a gate terminal connected to the selection line Ls, a drain terminal connected to the data line Ld, and a source terminal connected to the contact N11. The thin film transistor Tr12 has a gate terminal connected to the contact N11, a drain terminal connected to a power supply voltage line La to which a predetermined high potential voltage Vdd is applied, and a source terminal connected to the contact N12. The capacitor Cs is connected between the gate terminal and the source terminal (the contact N11 and the contact N12) of the thin film transistor Tr12.

  Here, as the thin film transistors Tr11 and Tr12, n-channel thin film transistors (field effect transistors) are applied. If the thin film transistors Tr11 and Tr12 are p-channel type, the source terminal and the drain terminal are opposite to each other. The capacitor Cs is a parasitic capacitance formed between the gate and the source of the thin film transistor Tr12, an auxiliary capacitance additionally provided between the gate and the source, or a capacitance component composed of these parasitic capacitance and auxiliary capacitance. It is.

  The organic EL element OEL has an anode terminal (anode electrode) connected to the contact N12 of the pixel drive circuit DC and a cathode terminal (cathode electrode) to which a predetermined low potential voltage Vss (for example, ground voltage Vgnd) is applied. The power supply voltage line Lc (or common electrode) is connected.

  The selection line Ls is connected to the gate driver 120 described above, and a selection voltage Vsel of a selection level or a non-selection level is applied at a predetermined timing, and the data line Ld is connected to the data driver 130 described above. Thus, the gradation signal (gradation voltage) Vdata corresponding to the display data is applied to the display pixel PIX set to the selected state by the selection voltage Vsel.

Next, the drive control operation of the display pixel PIX having such a circuit configuration will be briefly described.
First, in the selection period, the transistor Tr11 is turned on and set to the selected state by applying the selection voltage Vsel of the selection level (high level) from the gate driver 120 to the selection line Ls. In synchronization with this timing, the gradation voltage Vdata having a voltage value corresponding to the display data is applied from the data driver 130 to the data line Ld, so that the potential corresponding to the gradation voltage Vdata is connected to the contact N11 via the transistor Tr11. Applied to (gate terminal of transistor Tr12).

  As a result, the transistor Tr12 is turned on in a conductive state corresponding to the gradation voltage Vdata, and a light emission drive current having a predetermined current value flows between the drain and the source. Therefore, the organic EL element OEL emits light with a luminance gradation corresponding to the gradation voltage Vdata (that is, display data). At this time, charges are stored (charged) in the capacitor Cs connected between the gate and source of the transistor Tr12 based on the gradation voltage Vdata applied to the contact N11.

  Next, in the non-selection period, by applying a selection voltage Vsel of a non-selection level (low level) to the selection line Ls, the transistor Tr11 is turned off and set to a non-selection state. As a result, the charge accumulated in the capacitor Cs (that is, the potential difference between the gate and the source) is held, and a voltage corresponding to the gradation voltage Vdata is applied to the gate terminal of the transistor Tr12. Accordingly, a light emission drive current having a current value equivalent to that of the above light emission operation state flows between the drain and source of the transistor Tr12, and the light emission operation state of the organic EL element OEL is continued. Then, the desired image information is displayed by sequentially executing such a drive control operation on all the display pixels PIX two-dimensionally arranged on the display panel 110, for example, for each row.

  As described above, in the display pixel PIX including the pixel drive circuit DC as shown in FIG. 7, the transistor Tr11 functions as a selection transistor, and the transistor Tr12 functions as a drive transistor. Here, it is desirable that the selection transistor has excellent switching characteristics, and it is desirable that the driving transistor have a small variation in element characteristics and a high electron mobility.

  Therefore, when a crystalline silicon semiconductor layer is used as the channel layer in the selection transistor and the driving transistor formed on the same substrate, the threshold voltage variation (Vth shift) of the driving transistor is suppressed. Since the deterioration of characteristics can be suppressed and the electron mobility is improved, there is an advantage that a predetermined emission luminance can be obtained by supplying a light emission driving current having a desired current value with a low gate voltage. On the other hand, when the channel layer of the selection transistor is crystallized, the leakage current between the drain and the source becomes larger than when the amorphous silicon semiconductor layer is applied, as in the driving transistor. There is a demerit that deteriorates.

  Therefore, in the present embodiment, in the display pixel PIX including the pixel driving circuit DC as shown in FIG. 7, the crystal is only formed in the channel layer of the driving transistor among the selection transistor and the driving transistor formed on the same substrate. The substrate structure is such that an oxidized silicon semiconductor layer is applied and an amorphous silicon semiconductor layer is applied to the channel layer of the select transistor. Hereinafter, a substrate structure applied to the display pixel according to the present embodiment will be described with reference to the drawings.

  FIG. 8 is a cross-sectional structure diagram schematically showing the substrate structure of the display pixel applied to this embodiment. Here, in FIG. 8, for simplification of description, the thin film transistor and the wiring layer that are the selection transistor and the drive transistor are individually shown, and the illustration of the mutual connection relationship is omitted. In addition, components equivalent to those in the first embodiment described above are described with the same reference numerals.

  As shown in FIG. 8, the semiconductor device according to the present embodiment includes a thin film transistor having a semiconductor layer made of polycrystalline silicon or microcrystalline silicon on one surface (upper surface in the drawing) side of a single insulating substrate 11. Crystalline silicon thin film transistor; first thin film transistor) TFT-m, thin film transistor (amorphous silicon thin film transistor; second thin film transistor) TFT-a having an amorphous silicon semiconductor layer, and wiring layer LN including metal wiring 12 Are provided in the same layer. Here, the thin film transistor TFT-m corresponds to the thin film transistor Tr12 functioning as the drive transistor shown in FIG. 7, and the thin film transistor TFT-a corresponds to the thin film transistor Tr11 functioning as the selection transistor shown in FIG.

  Specifically, as shown in FIG. 8, the thin film transistor TFT-m includes a gate electrode provided on the surface on the one surface side of the insulating substrate 11, as in the first embodiment (see FIG. 1). 13 m, a semiconductor layer 15 m made of crystalline silicon provided in a region corresponding to the gate electrode 13 m via an insulating film 14 serving as a gate insulating film, and a channel protect layer 16 m provided on the semiconductor layer 15 m And a doped layer 17m provided on both ends of the channel protect layer 16m and extending on the semiconductor layer 15m, and a source / drain electrode 18m provided in alignment with the doped layer 17m.

  The thin film transistor TFT-a includes a gate electrode 13a provided on one surface of the substrate 11, and a semiconductor layer 15a made of amorphous silicon provided in a region corresponding to the gate electrode 13a via the insulating film 14. A channel protect layer 16a provided on the semiconductor layer 15a, a doped layer 17a provided on both sides of the channel protect layer 16a and extending on the semiconductor layer 15a, and a source / drain electrode 18a. Yes.

  Here, as shown in FIG. 8, the gate electrode 13m of the thin film transistor TFT-m, the gate electrode 13a of the thin film transistor TFT-a, and the metal wiring 12 constituting the wiring layer LN are provided in the same layer and have a common insulation. The membrane 14 is covered. Further, the semiconductor layer 15m, the channel protect layer 16m, the doped layer 17m, and the source / drain electrodes 18m of the thin film transistor TFT-m are respectively the semiconductor layer 15a, the channel protect layer 16a, and the doped layer of the thin film transistor TFT-a. 17a and the same layer as the source / drain electrode 18a. That is, the thin film transistor TFT-m and the thin film transistor TFT-a are formed such that only the film quality of the silicon thin film serving as the semiconductor layers 15m and 15a is different, and the other element structures are the same.

  8 shows the state in which the source and drain electrodes 18m and 18a of the thin film transistors TFT-m and TFT-a provided on the substrate 11 are exposed, as in FIG. It is covered and protected by an insulating film (not shown).

(Production method)
Next, a method for manufacturing the semiconductor device according to the present embodiment will be described with reference to the drawings.
9 to 11 are schematic process cross-sectional views showing an example of a method for manufacturing a semiconductor device according to this embodiment. Here, the description of the manufacturing steps equivalent to those of the first embodiment (see FIGS. 2 and 3) described above will be simplified.

  First, as shown in FIG. 9A, a thin film containing a metal material formed on an insulating substrate 11 is patterned to form a gate electrode 13m of the thin film transistor TFT-m and a gate electrode 13a of the thin film transistor TFT-a. And the metal wiring 12 is formed. Thereafter, an insulating film 14 serving as a gate insulating film is formed over the entire area of the substrate 11 to cover the gate electrodes 13 m and 13 a and the metal wiring 12. Thereafter, as shown in FIG. 9B, the amorphous silicon thin film 15x and the buffer layer 21 are continuously formed on the entire surface of the substrate 11 by using the plasma CVD method, and further, a sputtering method or the like is formed thereon. Is used to form the photothermal conversion layer 22x.

  Next, as shown in FIG. 9C, the photothermal conversion layer 22x is patterned using a photolithography technique to form a region to be a channel layer of the thin film transistor TFT-m (that is, a region including the formation region of the gate electrode 13m). The photothermal conversion layer 22 is left only on the region where the amorphous silicon thin film 15x is desired to be crystallized by laser annealing.

  Next, as shown in FIG. 10A, by scanning the laser beam BM and irradiating the entire region of the substrate 11, only the amorphous silicon thin film 15x directly under the photothermal conversion layer 22 is thermally annealed to be crystallized. As shown in FIG. 10B, a semiconductor layer 15m made of a polycrystalline silicon thin film or a microcrystalline silicon thin film is formed in the formation region of the thin film transistor TFT-m. At this time, the amorphous silicon thin film 15x in the formation region of the thin film transistor TFT-a and the wiring layer LN other than the formation region of the thin film transistor TFT-m is not crystallized and maintains an amorphous state.

  Next, as shown in FIG. 10C, after the photothermal conversion layer 22 on the buffer layer 21 is removed using an etching method or the like, the insulating layer 16x serving as a channel protection layer is formed over the entire substrate 11 using a plasma CVD method. A film is formed. Thereafter, as shown in FIG. 11A, the insulating layer 16x and the buffer layer 21 are continuously patterned by using a photolithography technique to form a channel layer of the thin film transistor TFT, the gate electrode 13m, Channel protect layers 16m and 16a made of the insulating layer 16x and the buffer layer 21 are formed on the region corresponding to the region 13a. Thereafter, a doped layer 17x for forming the source and drain of the thin film transistors TFT-m and TFT-a is formed over the entire region of the substrate 11 by plasma CVD.

  Next, as shown in FIG. 11B, the doped layer 17x is patterned to form doped layers 17m and 17a extending from both ends of the channel protect layers 16m and 16a onto the semiconductor layers 15m and 15a, respectively. At the same time, the amorphous silicon thin film 15x other than the semiconductor layers 15m and 15a in the region to be the channel layer of the thin film transistors TFT-m and TFT-a is removed.

  Next, as shown in FIG. 11C, a drain metal layer 18x for forming the source and drain electrodes 18m and 18a of the thin film transistor TFT is formed over the entire region of the substrate 11 by using a sputtering method or the like. Thereafter, the drain metal layer 18x is patterned to form source and drain electrodes 18m and 18a on the doped layers 17m and 17a of the thin film transistors TFT-m and TFT-a, respectively, as shown in FIG.

  As described above, in the semiconductor device and the manufacturing method thereof according to this embodiment, the thin film transistor TFT-m having the semiconductor layer 15m made of polycrystalline silicon or microcrystalline silicon on the single substrate 11, and the amorphous The thin film transistors TFT-a having the quality silicon semiconductor layer 15a are provided so as to coexist. Then, when the amorphous silicon thin film 15x is crystallized, after the photothermal conversion layer 22 is formed only on the region to be the channel layer of the thin film transistor TFT-m, a laser annealing is performed by irradiating the laser beam BM. Have.

  According to this, the semiconductor layer 15m made of crystalline silicon constituting the thin film transistor TFT-m and the amorphous silicon constituting the thin film transistor TFT-a are formed in a single laser annealing process on the single substrate 11. The semiconductor layer 15a can be formed at the same time, and peeling of the insulating film 14 and the like in the formation region of the thin film transistor TFT-a and the metal wiring 12 and the occurrence of cracks can be suppressed.

  At this time, only the amorphous silicon thin film 15x in the formation region of the thin film transistor TFT-m can be efficiently heated and crystallized, and the thin film transistor TFT-a and the metal other than the formation region of the thin film transistor TFT-m can be crystallized. Heating due to thermal annealing in the formation region of the wiring 12 can be suppressed. Accordingly, it is possible to satisfactorily form the driving transistor having a crystalline silicon semiconductor and the selection transistor having an amorphous silicon semiconductor on the same substrate while suppressing a decrease in manufacturing yield and throughput.

  According to the display panel having such a substrate structure, since the channel layer of the driving transistor (thin film transistor Tr12) is formed of a crystalline silicon thin film, the channel layer is formed of an amorphous silicon thin film. In comparison, the threshold voltage Vth shift can be reduced to suppress element degradation. In addition, since the electron mobility of the driving transistor (thin film transistor Tr12) can be improved, a light emitting operation with a predetermined luminance gradation can be realized with a low gate voltage (gradation voltage Vdata). On the other hand, since the channel layer of the selection transistor (thin film transistor Tr11) is formed of an amorphous silicon thin film, the influence of leakage current is greatly suppressed as compared with the case where the channel layer is formed of a crystalline silicon thin film. can do.

  In the present embodiment, the circuit configuration including two thin film transistors (transistors Tr11 and Tr12) is shown as the pixel drive circuit DC constituting the display pixel PIX, but the present invention is not limited to this. The present invention includes, for example, three or more thin film transistors as long as at least the pixel drive circuit DC includes one thin film transistor serving as a selection transistor and one thin film transistor serving as a drive transistor. There may be.

  In FIG. 7, the pixel driving circuit DC provided in the display pixel PIX is written in each display pixel PIX (specifically, the gate terminal of the transistor Tr12 of the pixel driving circuit DC; the contact N11) according to the display data. By adjusting (specifying) the voltage value of the gradation voltage Vdata, the current value of the light emission drive current that flows through the organic EL element OEL is controlled to perform the light emission operation at a desired luminance gradation. However, the present invention is not limited to this. That is, according to the present invention, by adjusting (specifying) the current value of the current written to each display pixel PIX according to the display data, the current value of the light emission drive current that flows to the organic EL element OEL is controlled, and the desired luminance It may have a circuit configuration of a current designation type gradation control system that performs light emission operation at gradation.

<Third Embodiment>
Next, a semiconductor device, a manufacturing method thereof, and a display device according to a third embodiment of the present invention will be described.
In the second embodiment described above, a substrate structure in which a crystalline silicon thin film transistor and an amorphous silicon thin film transistor are provided on a single substrate 11 is applied to each display pixel of a display device (display panel). Explained the case. In the third embodiment, a case will be described in which the substrate structure shown in the second embodiment is applied to a driver used for driving a display panel.

  FIG. 12 is a schematic configuration diagram showing another example of a display device to which the semiconductor device according to the present invention is applied. Here, about the structure equivalent to 2nd Embodiment mentioned above, the same code | symbol is attached | subjected and the description is simplified or abbreviate | omitted.

  As shown in FIG. 12, a display device to which the semiconductor device according to this embodiment can be applied includes a pixel array (display region) 111 in which at least a plurality of display pixels PIX are two-dimensionally arranged on a single substrate 11. And a gate driver 121 for setting each display pixel PIX to a selected state, and a data driver 131 for supplying a gradation signal corresponding to display data to each display pixel PIX.

  Here, in the present embodiment, the transistors provided on at least the driver circuits of the gate driver unit 121 and the data driver unit 131 formed on the same substrate 11 are shown in the second embodiment (see FIG. 8). Similarly to the thin film transistor TFT-m, a thin film transistor having a crystalline (polycrystalline or microcrystalline) silicon semiconductor layer is applied.

A method for manufacturing a semiconductor device (display device) having such a substrate structure will be described with reference to the drawings described in the second embodiment.
First, as shown in FIGS. 9A to 9C, the gate electrode of the thin film transistor TFT-m is formed on one surface side of the single substrate 11 in the formation region of the gate driver unit 121 and the data driver unit 131. 13m, the gate electrode 13a of the thin film transistor TFT-a and the metal wiring 12 are formed. Thereafter, an insulating film 14 serving as a gate insulating film is formed over the entire area of the substrate 11 to cover the gate electrodes 13m and 13a and the metal wiring 12, and further, an amorphous silicon thin film 15x, a buffer layer 21 and photothermal The conversion layer 22x is sequentially stacked.

  Next, the photothermal conversion layer 22x is patterned to leave the photothermal conversion layer 22 only in a region to be a channel layer of a transistor provided in the driver circuit of the gate driver unit 121 and the data driver unit 131. Then, in this state, as shown in FIG. 10A, the laser beam BM is scanned and irradiated to the entire area of the substrate 11, so that as shown in FIG. Only the amorphous silicon thin film 15x is crystallized by thermal annealing to form a semiconductor layer 15m made of a polycrystalline silicon thin film or a microcrystalline silicon thin film. At this time, the amorphous silicon thin film 15x in the region where the photothermal conversion layer 22 is not formed is not crystallized and maintains an amorphous state.

  Thus, thin film transistors having a crystalline silicon semiconductor layer are formed in the driver circuits of the gate driver unit 121 and the data driver unit 131, and thin film transistors having an amorphous silicon semiconductor layer are formed in other regions. Formed simultaneously.

  According to the semiconductor device, the manufacturing method thereof, and the display device according to this embodiment, when the amorphous silicon thin film is crystallized by thermal annealing, the photothermal conversion layer is formed only on the region that becomes the channel layer of the crystalline silicon thin film transistor. By performing laser annealing in a state in which the film is formed, only the amorphous silicon thin film in the region can be crystallized. Therefore, a crystalline silicon thin film transistor, an amorphous silicon thin film transistor, Can be formed simultaneously.

  At this time, since the photothermal conversion layer is not formed in the formation region of the amorphous silicon thin film transistor or the wiring layer other than the formation region of the crystalline silicon thin film transistor, heating by thermal annealing can be suppressed, and the gate electrode or Peeling of an insulating film or the like formed on the metal wiring and generation of cracks can be suppressed. Accordingly, in a display device in which the gate driver unit 121 and the data driver unit 131 for driving the pixel array 111 are provided on a single substrate 11, while suppressing a decrease in manufacturing yield and throughput, a crystalline silicon thin film transistor, An amorphous silicon thin film transistor can be formed satisfactorily.

  Here, as shown in FIG. 12, together with the display pixels PIX (pixel drive circuit) arranged in the pixel array 111, a gate driver unit 121, a data driver unit 131, and the like for driving the display pixels PIX are provided. A display device formed over one substrate 11 will be described in more detail.

  In the display device shown in FIG. 12, the case where the display pixel PIX includes the pixel driving circuit DC as shown in the second embodiment (see FIG. 7) will be considered. In the second embodiment, it is desirable in terms of pixel driving characteristics that an amorphous silicon thin film transistor or a crystalline silicon thin film transistor is applied as the thin film transistors Tr11 and Tr12 of the pixel drive circuit DC in accordance with their functions. did.

  However, depending on the display panel, even when only an amorphous silicon thin film transistor is applied as the thin film transistor of the pixel driving circuit DC, the condition necessary for pixel driving may be satisfied. In the display device shown in FIG. 12, the pixel array 111, the gate driver unit 121, and the data driver unit 131 are collectively formed on a single substrate 11, but all the thin film transistors on the substrate 11 are formed. Is formed of an amorphous silicon thin film transistor, the driving ability is insufficient to operate the gate driver unit 121 and the data driver unit 131 because of low electron mobility.

  As a technique to avoid such problems, the photothermal conversion layer is patterned only in the formation area of each driver part, and then laser annealing is performed to crystallize the channel layer of the thin film transistor in the driver part to improve electron mobility. However, since the area in the driver portion that does not need to be heated (for example, the formation area of the wiring, etc.) is also heated, there is a possibility that the insulating film on the wiring is peeled off or cracks are generated. there were.

  On the other hand, in the semiconductor device, the manufacturing method thereof, and the display device according to the present embodiment, at least the photothermal conversion layer used when the amorphous silicon thin film is crystallized by irradiating the substrate 11 with laser light is at least the gate. Patterning is performed so as to remain only on the channel layer formation region of the thin film transistor of the driver circuit provided in the driver unit 121 and the data driver unit 131. Then, a crystalline silicon thin film transistor is formed by irradiating laser light to crystallize the amorphous silicon thin film.

  As a result, a crystalline silicon thin film transistor and an amorphous silicon thin film transistor can be simultaneously formed on a single substrate, and heating in a formation region such as a wiring layer other than the formation region of the crystalline silicon thin film transistor can be suppressed. Further, peeling of a film on the wiring layer and generation of cracks can be suppressed, and a decrease in manufacturing yield and throughput can be suppressed.

  In the present embodiment, when an amorphous silicon thin film transistor is applied to the pixel drive circuit of the display pixel PIX, the technical idea of the present invention is applied to the drive circuit of the gate driver unit 121 and the data driver unit 131 of the display device. Although the case where it applies is demonstrated, this invention is not limited to this. That is, in addition to the drive circuits of the gate driver unit 121 and the data driver unit 131, as shown in the second embodiment, the drive transistors of the pixel drive circuit of the display pixels PIX arranged in the display panel (pixel array). Needless to say, a crystalline silicon thin film transistor may also be applied to apply the technical idea of the present invention.

  In each of the above-described embodiments, the case where the thin film transistor has an etching stopper type element structure has been described. However, the present invention is not limited to this, and has a channel etching type element structure. In addition, the same operational effects as described above can be obtained. Furthermore, in each of the above-described embodiments, the case where the thin film transistor has an inverted staggered element structure has been described. However, the present invention is not limited to this, and has a normal staggered element structure. Also good.

11 substrate 12 metal wiring 13, 13m, 13a gate electrode 14 insulating film 15, 15m, 15a semiconductor layer 15x amorphous silicon thin film 16, 16m, 16a channel protection layer 17, 17m, 17a doped layer 18, 18m, 18a source, Drain electrodes 22, 22x Photothermal conversion layer 110 Display panel 111 Pixel array 120 Gate driver 121 Gate driver part 130 Data driver 131 Data driver part BM Laser light PIX Display pixel DC Pixel drive circuit OEL Organic EL element

Claims (14)

A thin film transistor having a semiconductor layer made of at least a crystalline film quality on a substrate,
The semiconductor layer of the thin film transistor is subjected to thermal annealing with respect to an amorphous thin film formed on the substrate through a photothermal conversion layer formed only on a region to be a channel layer of the thin film transistor. A semiconductor device characterized by being crystallized by:   2. The semiconductor device according to claim 1, wherein the semiconductor layer of the thin film transistor has a microcrystalline film quality. On a substrate, at least a first thin film transistor having a semiconductor layer made of a crystalline film quality and a second thin film transistor having an amorphous semiconductor layer are provided,
The semiconductor layer of the first thin film transistor is thermally annealed with respect to the amorphous thin film formed on the substrate through a photothermal conversion layer formed only on a region that becomes a channel layer of the thin film transistor. Is crystallized by applying
The semiconductor device of the second thin film transistor, wherein the semiconductor layer is made of the amorphous thin film.   4. The semiconductor device according to claim 3, wherein the semiconductor layer of the first thin film transistor has a microcrystalline film quality. Forming an amorphous thin film on the substrate;
Forming a photothermal conversion layer only on the region corresponding to the channel layer of the thin film transistor;
Irradiating the entire area of the substrate with laser light and crystallizing the amorphous thin film formed in the lower layer of the photothermal conversion layer by thermal annealing; and
Removing the photothermal conversion layer;
A method for manufacturing a semiconductor device, comprising:   A step of forming a first thin film transistor having, as a channel layer, a semiconductor layer made of the thin film crystallized by irradiating the laser beam and thermally annealing the amorphous thin film; 6. The method of manufacturing a semiconductor device according to claim 5, wherein:   7. The method of manufacturing a semiconductor device according to claim 6, further comprising a step of forming a second thin film transistor having the semiconductor layer made of the amorphous thin film as a channel layer.   8. The method of manufacturing a semiconductor device according to claim 7, wherein the first thin film transistor and the second thin film transistor are simultaneously formed using the same process.   9. The thin film crystallized by irradiating the laser beam and thermally annealing the amorphous thin film has a microcrystalline film quality. A method for manufacturing the semiconductor device according to claim 1. In a display device including a display panel in which a plurality of display pixels each having a display element and a pixel driving circuit for driving the display element are two-dimensionally arranged on a substrate,
The pixel driving circuit includes at least a selection transistor for setting the display pixel to a selected state when writing display data to the display pixel.
A driving transistor that supplies a light emission driving current having a current value corresponding to the display data to the display element;
At least the driving transistor comprises a first thin film transistor having a semiconductor layer made of a crystalline film, and the selection transistor comprises a second thin film transistor having an amorphous semiconductor layer,
The semiconductor layer of the first thin film transistor is thermally annealed with respect to the amorphous thin film formed on the substrate through a photothermal conversion layer formed only on a region that becomes a channel layer of the thin film transistor. Is crystallized by applying
The display device, wherein the semiconductor layer of the second thin film transistor is made of the amorphous thin film.   11. The display device according to claim 10, wherein the semiconductor layer of the first thin film transistor has a microcrystalline film quality.   The display device according to claim 10, wherein the display element is an organic electroluminescence element. A pixel array in which a plurality of display pixels are two-dimensionally arranged on a substrate, a selection driver unit for setting the display pixels to a selected state when writing display data to the display pixels, and the display pixels In a display device comprising a data driver unit for supplying display data,
At least the driving circuit of the selection driver unit and the data driver unit is formed of a thin film transistor having a semiconductor layer made of a crystalline film,
The semiconductor layer of the thin film transistor is subjected to thermal annealing with respect to an amorphous thin film formed on the substrate through a photothermal conversion layer formed only on a region to be a channel layer of the thin film transistor. A display device characterized by being crystallized by.   14. The display device according to claim 13, wherein the semiconductor layer of the thin film transistor has a microcrystalline film quality.

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