JP5227552B2 - Thin film transistor, manufacturing method thereof, and semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof. In particular, the present invention relates to a semiconductor device having a crystalline thin film transistor and a manufacturing method thereof. Further, the present invention relates to a semiconductor device and an electronic device in which the thin film transistor is mounted.

  2. Description of the Related Art In recent years, technological development has been actively conducted on semiconductor devices having thin film transistors (hereinafter referred to as TFTs). In particular, application to an active matrix display device using a glass substrate is progressing.

  Semiconductor films used for TFTs can be broadly classified into those having a crystalline structure (polycrystalline structure) and those having an amorphous structure. A TFT using a polycrystalline semiconductor film has high field-effect mobility and can operate at high speed. Therefore, for example, a TFT of a liquid crystal display device can be reduced in size, and peripheral circuits such as a gate driver can be manufactured over the same substrate, so that a narrow frame can be achieved. In the polycrystalline structure, a driver IC (Integrated Circuit) can be formed integrally with a pixel circuit on a substrate, so that the number of components is reduced and the entire liquid crystal display device can be downsized. In addition to a display device, by forming a TFT over a glass substrate, a semiconductor device can be manufactured at a lower cost than using a silicon substrate.

  In general, a polycrystalline semiconductor film is formed by first forming an amorphous semiconductor film with a semiconductor source gas such as silane and crystallizing it with heat. As main crystallization methods, there are a laser crystallization method, a thermal crystallization method, a thermal crystallization method using an element that promotes crystallization such as nickel (Ni), and the like. Among these, when performing crystallization by a thermal crystallization method, an HTPS (High Temperature Poly Silicon) process is used. When the HTPS process is used, the TFT element can be miniaturized, so that a higher-definition liquid crystal display device can be manufactured. However, since crystallization is performed by heating the substrate, the substrate becomes extremely high in temperature (generally 1000 ° C. or more). On the other hand, the strain point of a glass substrate is about 600-700 degreeC. Therefore, glass cannot be used for the substrate in the HTPS process. In the thermal crystallization method using an element that promotes crystallization, it is possible to crystallize a semiconductor film at a temperature as low as about 500 to 600 ° C. and obtain a crystal with continuous grain boundaries compared to the above-described thermal crystallization method. Can do. However, the process is complicated as compared with the other two crystallization methods described above. Therefore, there has been a need for a means for applying a heat amount necessary for crystallization of the amorphous semiconductor film without damaging the glass substrate.

  In consideration of the above circumstances, a laser crystallization method is used for crystallization of a semiconductor film on a glass substrate. In the laser crystallization method, since local heating by a laser is used for crystallization of a semiconductor film, the process temperature is relatively low (generally 600 ° C. or lower). Therefore, a glass substrate can be used and the process is not complicated. By using the laser crystallization method, the amount of heat necessary for crystallization of the semiconductor film can be given by laser light irradiation without damaging the glass substrate.

  Here, the laser crystallization method is a method in which an amorphous semiconductor film is heated by locally applying heat to the amorphous semiconductor film at a temperature equal to or higher than the melting point of the amorphous semiconductor film, and the surface is locally heated for a very short time. It is a method to convert.

  A polycrystalline semiconductor film formed by a laser crystallization method has lower mobility than a single crystal semiconductor. This is thought to be due to the crystal grain boundaries that occur with crystallization. Therefore, for the purpose of reducing crystal grain boundaries existing in the semiconductor film and obtaining crystallinity close to a single crystal, the position of grain boundaries and the large grain size of the crystal itself are controlled by controlling the nucleation site in crystallization. Attempts have been made to develop technology to make it easier. As one of such techniques, the intensity of the linear pulse laser beam irradiated on the sample surface is periodically modulated using a phase shift mask having a stripe pattern, so that the semiconductor material can be made by SLG (Super Lateral Growth). There is a method of crystallizing and forming a polycrystalline semiconductor film (for example, Patent Document 1).

Note that the phase shift mask is a mask in which irregularities are formed on a quartz substrate, which is used in a phase shift method. The phase shift method is a method for improving the resolution by shifting the phase of adjacent patterns by 180 degrees.
JP 2004-119919 A

Lasers are roughly classified into two types, pulse oscillation and continuous oscillation, depending on the oscillation method. Since the pulsed laser has a relatively high output energy, the mass productivity can be increased by setting the size of the laser beam (the region where the laser beam is actually irradiated on the surface of the object to be processed) to several cm ² or more. In particular, when the shape of the laser light irradiation region is processed by an optical system to be a linear shape having a length of 10 cm or more, the substrate can be efficiently irradiated with the laser light, and the mass productivity can be further improved. . For this reason, pulsed lasers are becoming mainstream for crystallization of semiconductor films.

  However, it has been found that the size of crystal grains formed in a semiconductor film is larger when a continuous wave laser (hereinafter referred to as CW laser) is used than when a pulsed laser is used for crystallization of a semiconductor film. It was. When the size of the crystal grain in the semiconductor film is increased, the mobility of the TFT formed using the semiconductor film is increased by the interface (grain boundary) of the crystal grain. Therefore, continuous-wave lasers are in the spotlight.

  In addition, crystal growth by SLG occurs when a steep thermal gradient occurs, and its direction occurs from a low temperature portion to a high temperature portion. There is a limit to the crystal growth distance, which is at most about 10 μm, and the growth occurs toward the highest temperature portion, so that the growth collides and a ridge is generated.

  In addition, by scanning the linear beam in one direction and repeatedly irradiating it, the ridge portion is again melted and solidified to continuously cause SLG, thereby reducing the ridge as much as possible and increasing the crystal growth distance. (Sequential Lateral Solidification) method has also been developed. However, when SLG is continuously generated efficiently using a linear laser, it is necessary to narrow the short axis width very short in order to give a steep energy gradient to the short axis profile. It becomes very shallow, it is difficult to cause SLG continuously in a large area with good reproducibility. Therefore, the yield is remarkably bad and there is a big problem in productivity.

  An object of the present invention is to provide a semiconductor device having high carrier mobility and favorable electrical characteristics, and a manufacturing method thereof.

  The semiconductor device of the present invention has a crystal band in which crystal grains extend in one direction, and the appearance frequency of grain boundaries is small in the direction in which the crystal grains extend or there is no grain boundary in the direction in which the crystal grains extend It has a semiconductor film. In order to form a crystal band in which crystal grains extend in one direction, crystallization is performed using a linear laser beam. Laser light is irradiated through light intensity modulation means for periodically modulating the light intensity of the linear laser light in the long axis direction of the laser light, and one end to the other end of the semiconductor film for scanning the linear laser light In the meantime, a crystal band in which crystal grains are grown in the scanning direction of the laser beam can be formed by continuously causing crystal growth in time while maintaining at least a part of the semiconductor film in a completely melted state. . Alternatively, a periodic profile may be imparted to the laser light via a light intensity modulation means that periodically modulates the light intensity of the laser light, and the laser light may be shaped into a linear shape and irradiated. Furthermore, the periodic profile may be applied and the linear shape may be simultaneously formed.

  In the present invention, the crystal growth direction is generally aligned in one direction by completely melting the semiconductor film to be crystallized from one end to the other end of the semiconductor film to be crystallized through a phase shift mask having a stripe pattern. Ideally, a polycrystalline semiconductor film in which grain boundaries exist only in one direction is formed.

  One embodiment of the present invention is a thin film transistor including a crystalline semiconductor film, and the crystalline semiconductor film includes one or a plurality of crystal bands in which crystal grains extend in one direction, and at least one of the crystal bands includes: A thin film transistor including a source region, a channel formation region, and a drain region in the crystal band.

  Another embodiment of the present invention is a thin film transistor having a crystalline semiconductor film, wherein the crystalline semiconductor film has a plurality of crystal bands with crystal grains extending in one direction, and the plurality of crystal bands are adjacent crystal bands. The thin film transistor is characterized by having a boundary line in between, and the boundary line is substantially parallel to the channel length direction from the source region to the drain region of the thin film transistor.

  Another embodiment of the present invention is a thin film transistor having a crystalline semiconductor film formed on a substrate having an insulating surface, wherein the crystalline semiconductor film has a plurality of crystal bands in which crystal grains extend in one direction, The plurality of crystal bands have a boundary line between adjacent crystal bands, and the boundary line is substantially parallel to the channel length direction of the thin film transistor from one side of the crystalline semiconductor film to the opposite side. There is a thin film transistor.

  Another embodiment of the present invention is a thin film transistor having a crystalline semiconductor film formed on a substrate having an insulating surface, wherein the crystalline semiconductor film has a plurality of crystal bands in which crystal grains extend in one direction, In the thin film transistor, an average appearance interval of grain boundaries in the crystal band is larger than an interval in a minor axis direction of the crystal band.

  In the present invention configured as described above, it is preferable that the major axis direction of the crystal band substantially coincides with the channel length direction.

  In the present invention configured as described above, it is preferable that the length of the crystal band in the minor axis direction is substantially constant.

  In the present invention configured as described above, the length of the crystal band in the minor axis direction is preferably about 3 μm or less, and the length of the crystal band in the major axis direction is preferably about 3 μm or more and 20 μm or less.

  Another embodiment of the present invention is a thin film transistor having a crystalline semiconductor film formed on a substrate having an insulating surface, wherein the crystalline semiconductor film is composed of one crystal band in which crystal grains extend in one direction, The crystal band has one side of approximately 3 μm or less and another side of approximately 3 μm or more and 20 μm or less adjacent to the one side, and a channel formation region of the crystalline semiconductor film is formed in the crystal band, In the channel formation region of the crystalline semiconductor film, there is no grain boundary across the channel length direction.

  In the present invention having the above structure, it is preferable that a base film is provided between the substrate and the crystalline semiconductor film.

  In the present invention having the above structure, the crystalline semiconductor film is preferably a film containing silicon as a main component.

  In this invention of the said structure, it is preferable that the said board | substrate is a glass substrate.

  Another embodiment of the present invention is a method for manufacturing a thin film transistor in which an amorphous semiconductor film formed over a substrate having an insulating surface is crystallized by irradiation with continuous-wave laser light or pseudo-continuous laser light Then, an amorphous semiconductor film is formed, and the light intensity of the linearly shaped laser beam is spatially modulated by a light intensity modulating means that periodically modulates the laser beam in the long axis direction, By irradiating the amorphous semiconductor film with laser light, the amorphous semiconductor film is completely melted over the entire irradiation region of the laser light, and a crystal band grown in a direction substantially coinciding with the scanning direction of the laser light is formed. A method for manufacturing a thin film transistor is characterized in that a polycrystalline semiconductor film is formed.

  Another embodiment of the present invention is a method for manufacturing a thin film transistor in which an amorphous semiconductor film formed over a substrate having an insulating surface is crystallized by irradiation with continuous-wave laser light or pseudo-continuous laser light Then, an amorphous semiconductor film is formed, and the light intensity of the linearly shaped laser beam is spatially modulated by a light intensity modulating means that periodically modulates the laser beam in the long axis direction, By irradiating the amorphous semiconductor film with laser light, the amorphous semiconductor film is completely melted over the entire irradiation region of the laser light, and a crystal band grown in a direction substantially coinciding with the scanning direction of the laser light is formed. And forming a source region and a drain region by introducing impurities into a part of the polycrystalline semiconductor film, wherein at least one of the crystal bands included in the polycrystalline semiconductor film is The crystal band has a source region, a channel formation region, and a drain region, and the channel length direction of the channel formation region is substantially parallel to the long axis direction of the crystal band and intersects the boundary of the crystal band. A method for manufacturing a thin film transistor is characterized in that a line extending from a source region to a drain region can be drawn without any problem.

  In the present invention having the above-described configuration, it is preferable that the light intensity modulation means is a phase shift mask having irregularities in a direction substantially coinciding with the major axis direction of the laser light.

  In the present invention configured as described above, the light intensity modulating means is a phase shift mask having irregularities inclined in a direction inclined by a certain angle with respect to a direction parallel to the scanning direction of the laser light, and the modulated laser light The light intensity value has a maximum value and a minimum value in the major axis direction, and the angle is preferably adjusted so that the minimum value is 80% or more of the maximum value.

  In the present invention configured as described above, the phase shift mask is preferably a light-transmitting substrate having a stripe pattern in which grooves are formed at regular intervals.

  In the present invention configured as described above, the translucent substrate is preferably a quartz substrate.

  In the present invention configured as described above, the interval between the grooves is preferably the same length as the width of the grooves.

  In the present invention configured as described above, the semiconductor film is preferably made of silicon.

  In the present invention having the above-described structure, the crystallization is preferably performed using an element that promotes the crystallization.

  Another embodiment of the present invention is a semiconductor device having a thin film transistor manufactured according to the present invention having the above structure.

  As the semiconductor device of the present invention having the above structure, a liquid crystal display device or an EL display device can be used. In particular, it is preferable to apply the present invention to these peripheral circuits (such as a drive circuit).

  In the present invention, the crystal band refers to a crystal grain extending in a band shape. Ideally, it does not have a crystal grain boundary in the major axis direction of the crystal grain.

  In the present invention, between one end and the other end of a semiconductor film that scans with a linear laser beam, crystal growth is caused continuously in time while maintaining at least a part of the semiconductor film in a completely molten state. This shows that the crystallization of the semiconductor film of the present invention is not SLG. In SLG, a molten semiconductor film is immediately solidified (melting time is short), so that the semiconductor film repeats melting and solidification. In the present invention, for example, when a pulsed laser (including a pseudo CW laser) is used, the laser light of the next pulse is emitted from the state in which the semiconductor film is melted by irradiation with the laser light of one pulse. Until the semiconductor film is irradiated, crystallization is performed while continuously moving the solid-liquid interface so as to maintain at least a part of the molten semiconductor film in a molten state.

  In the present invention, it is preferable to carry out AR (Anti Reflection) coating on one or both of one main surface of the phase shift mask and the main surface opposite thereto. By performing AR coating on the phase shift mask, the light transmittance can be improved. As the AR coating, for example, a material having a light refractive index lower than that of a light-transmitting substrate used for a phase shift mask may be thinly coated.

  Note that in the present invention, a semiconductor device refers to a device having a circuit including a semiconductor element (such as a transistor or a diode). In addition, any device that can function by utilizing semiconductor characteristics may be used.

  Note that a transistor is an element having at least three terminals including a gate, a drain, and a source, and has a channel formation region between the drain region and the source region. Current can flow through the region and the source region. Here, since the source and the drain vary depending on the structure and operating conditions of the transistor, it is difficult to limit which is the source or the drain. Therefore, in the present invention, a region functioning as a source and a drain may not be called a source or a drain. In that case, as an example, there are cases where they are referred to as a first terminal and a second terminal, respectively. Note that the transistor may be an element having at least three terminals including a base, an emitter, and a collector. Similarly in this case, the emitter and the collector may be referred to as a first terminal and a second terminal.

  A display device refers to a device having a display element (such as a liquid crystal element or a light-emitting element). Note that in a display device in which the peripheral driver circuit is formed over the same substrate, it is particularly preferable to apply the present invention to the peripheral driver circuit.

  A light-emitting device refers to a display device having a self-luminous display element such as an EL element or an element used in an FED. A liquid crystal display device refers to a display device having a liquid crystal element.

  In the present specification, “substantially” means substantially the same. For example, “substantially parallel” allows a deviation of about ± 45 ° (preferably about ± 30 °) from parallel. In addition, the directions substantially coincide with each other, a deviation in a range in which the other direction is substantially the same direction with respect to a certain direction is allowed, and the other direction is within a range of ± 45 ° with respect to a certain direction ( Preferably, the range is up to ± 30 °. Further, the interval being substantially constant means that the interval is a / 2 or more and 3a / 2 or less, where a is the average interval. In addition, approximately 3 μm refers to 2.5 μm to 3.5 μm, and approximately 20 μm refers to 15 μm to 25 μm.

  According to the present invention, a crystalline semiconductor film in which the position and direction of grain boundaries are controlled can be obtained.

  According to the present invention, the direction of crystal growth can be controlled. Therefore, the crystal grain boundary can be reduced. Thereby, the mobility of the polycrystalline semiconductor layer can be dramatically improved.

  According to the present invention, since the mobility of carriers in the semiconductor layer of the TFT is improved, a TFT having good electrical characteristics can be manufactured.

  Since a TFT having favorable electrical characteristics can be manufactured according to the present invention, a circuit element with higher functionality than conventional ones can be formed. Therefore, a semiconductor device with higher added value than before can be manufactured over a glass substrate.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention can be implemented in many different modes, and those skilled in the art can easily understand that the modes and details can be variously changed without departing from the spirit and scope of the present invention. Is done. Therefore, the present invention is not construed as being limited to the description of this embodiment mode.

<Embodiment 1>
In this embodiment, a process for forming a semiconductor layer included in a semiconductor device to which the present invention is applied is described with reference to drawings. FIG. 1 shows a process until a polycrystalline semiconductor film is formed over a substrate, which will be described in this embodiment mode.

  As the substrate, a glass substrate 100 is used as an insulating substrate. The material of the glass substrate 100 is not limited to a specific material, and may be quartz glass, non-alkali glass such as borosilicate glass, or aluminosilicate glass. What is necessary is just to have heat resistance, chemical resistance, etc. which are required in the process of forming a thin film later. Note that the material of the substrate is not limited to a specific one as long as the substrate surface is insulative and has necessary heat resistance as well as the glass substrate. That is, a plastic substrate having heat resistance enough to withstand the temperature in the process of forming a thin film, a stainless steel substrate on which an insulating film is formed, or the like can also be used.

  Further, unlike quartz glass, borosilicate glass or the like contains a slight amount of impurities such as sodium (Na) and potassium (K). When these impurities diffuse around the active layer, a parasitic channel forming region is formed at the interface between the active layer and the base film or the interface between the active layer and the gate insulating film. These increase the leakage current generated during the operation of the TFT. These diffused impurities also affect the threshold voltage of the TFT.

  Therefore, when a TFT is manufactured over the glass substrate 100, a structure in which an insulating film called a base film is sandwiched between the glass substrate and the TFT is preferable. This base film is required to have a function of preventing diffusion of impurities from the glass substrate and a function of improving the adhesion with a thin film deposited on the insulating film. The material used for the base film is not limited to a specific material, and may be a silicon oxide material or a silicon nitride material. Note that a silicon oxide-based material refers to silicon oxide containing oxygen and silicon as main components, or silicon oxynitride in which silicon oxide contains nitrogen and the oxygen content is higher than the nitrogen content. The silicon nitride-based material means silicon nitride containing nitrogen and silicon as main components, or silicon nitride oxide in which silicon nitride contains oxygen and the nitrogen content is higher than the oxygen content. Or the structure which laminated | stacked the film | membrane which consists of these materials may be sufficient. When forming a base film by stacking, a lower layer portion that adheres to the glass substrate 100 functions as a blocking layer and mainly uses a material that prevents diffusion of impurities from the glass substrate, and an upper layer portion mainly includes a lower layer. It is preferable to use a material that enhances adhesion with a thin film deposited on the base film. Note that when a crystalline semiconductor film is formed in contact with a silicon nitride-based material, a trap level is generated at the interface; therefore, a silicon oxide-based material is preferably used as an insulating film in contact with the crystalline semiconductor film.

  Considering the above, in this embodiment, the base film 101 is formed on the glass substrate 100. Here, the base film 101 is formed by stacking silicon oxynitride over silicon nitride oxide. When an inexpensive coning glass or the like is used as a substrate and a semiconductor film functioning as a thin film transistor is formed in close contact therewith, movable ions such as sodium enter the semiconductor film from the substrate. Therefore, the silicon nitride film is formed as a blocking layer. The base film 101 can be formed by a CVD method, a plasma CVD method, a sputtering method, a spin coating method, or the like. The base film need not be formed if it is not particularly necessary.

Next, an amorphous semiconductor film 102 is formed (see FIG. 1A). Here, the amorphous semiconductor film 102 is formed of silicon. In order to form the amorphous semiconductor film 102, a semiconductor material gas such as silane (SiH ₄ ) is used to form the amorphous semiconductor film 102 by LPCVD (Low Pressure CVD), plasma CVD, vapor deposition, or sputtering.

Next, before the amorphous semiconductor film 102 is crystallized, a dehydrogenation step is performed as necessary. For example, when the amorphous semiconductor film 102 is formed by a normal CVD method using silane (SiH ₄ ), hydrogen remains in the film. When the amorphous semiconductor film is irradiated with laser light with hydrogen remaining in the film in this way, part of the film disappears due to the laser light having an energy value about half of the energy value optimum for crystallization. End up. Therefore, for example, hydrogen remaining in the film can be removed by heating in an N ₂ atmosphere. In the case where the amorphous semiconductor film 102 is formed by the LPCVD method or the sputtering method, the dehydrogenation step is not necessarily required.

  Moreover, you may perform channel dope as needed. Channel doping refers to a process in which an impurity having a predetermined concentration is added to a semiconductor layer, the threshold voltage of the TFT is intentionally shifted, and the threshold value of the TFT is controlled to a desired value. For example, when the threshold voltage is shifted to the negative side, a p-type impurity element is added as a dopant. When the threshold voltage is shifted to the positive side, an n-type impurity element is added to the dopant. Here, phosphorus (P) or arsenic (As) is given as the p-type impurity element, and boron (B) or aluminum (Al) is given as the n-type impurity element.

  Here, the oxide film formed on the surface of the amorphous semiconductor film 102 is removed as necessary. By removing the oxide film formed on the surface, impurities existing in or on the oxide film can be prevented from entering and diffusing into the semiconductor film due to crystallization.

  Next, the amorphous semiconductor film 102 is crystallized. In the present invention, laser light is used for crystallization of the amorphous semiconductor film 102. The amount of heat necessary for crystallization is supplied to the amorphous semiconductor film by irradiation with laser light. By using laser light, the amorphous semiconductor film can be locally heated, and the amorphous semiconductor film can be crystallized so that the temperature of the substrate is equal to or lower than the strain point of glass.

  The laser is composed of a laser medium, an excitation source, and a resonator. Lasers can be classified into gas lasers, liquid lasers, and solid-state lasers according to the medium. Free lasers, semiconductor lasers, and X-ray lasers can be classified according to the characteristics of oscillation. In the present invention, any laser is used. Also good. Note that a gas laser or a solid laser is preferably used, and a solid laser is more preferably used.

  Gas lasers include helium neon laser, carbon dioxide laser, excimer laser, and argon ion laser. The excimer laser includes a rare gas excimer laser and a rare gas halide excimer laser. A rare gas excimer laser has oscillation by three types of excited molecules, argon, krypton, and xenon. Argon ion lasers include rare gas ion lasers and metal vapor ion lasers.

  Liquid lasers include inorganic liquid lasers, organic chelate lasers, and dye lasers. Inorganic liquid lasers and organic chelate lasers use rare earth ions such as neodymium, which are used in solid-state lasers, as laser media.

A laser medium used by a solid-state laser is obtained by doping a solid matrix with an active species that acts as a laser. The solid matrix is a crystal or glass. Crystals include YAG (yttrium / aluminum / garnet crystal), YLF, YVO ₄ , YAlO ₃ , sapphire, ruby, and alexandride. The active species that act as a laser are, for example, trivalent ions (Cr ³⁺ , Nd ³⁺ , Yb ³⁺ , Tm ³⁺ , Ho ³⁺ , Er ³⁺ , Ti ³⁺ ).

  A fiber laser can also be used as the laser used in the present invention. Here, the fiber laser that can be used in the present invention will be described in detail with reference to FIG.

  The fiber laser uses an optical waveguide (optical fiber) as an oscillator. One configuration of a fiber laser oscillator is shown in FIG. The fiber laser is a laser diode 111 (LD) for excitation, an excitation light combiner 112, a fiber Bragg grating 113, a fiber Bragg grating 115 (Fiber Bragg Grating), an active gain fiber 114 which is an optical fiber doped with a laser medium as a core, And an output port 116. These devices are connected to each other via a fiber cable 117. The fiber laser can be continuous oscillation or pulse oscillation. In the present invention, continuous oscillation or pseudo continuous oscillation is used.

  The excitation light combiner 112 combines the excitation lights output from the plurality of laser diodes 111 and inputs the combined light to the fiber Bragg grating 113. 2 includes the pump light combiner 112, the pump light combiner 112 may not be included. That is, the single laser diode 111 and the fiber Bragg grating 113 are directly connected via the fiber cable 117, and the excitation light output from the single laser diode 111 is directly input to the fiber Bragg grating 113. May be.

  The fiber Bragg grating 113 functions as a total reflection mirror of the laser oscillator, and the fiber Bragg grating 115 functions as an output mirror. The fiber Bragg grating 113 and the fiber Bragg grating 115 do not require periodic cleaning and alignment adjustment unlike a solid-state laser resonator mirror such as a YAG laser. For this reason, compared with the case where a solid-state laser is used, it is resistant to thermal change and mechanical shock, and has high maintainability and mobility. The laser beam output from the fiber Bragg grating 115 is output (emitted) to the outside of the optical fiber via the output port 116. Here, the beam spot of the laser beam output from the fiber Bragg grating 115 is circular, and its aperture is several tens of μm (typically 10 to 30 μm). The beam spot of the laser beam is not limited to a circle but may be an ellipse or a rectangle.

  The active gain fiber 114 includes a cylindrical core 118 doped with a rare earth element such as erbium (Er) or ytterbium (Yb), and a pipe-shaped cladding 119 (FIG. 3). The core 118 has a diameter of several tens of μm (typically 10 to 30 μm). When excitation light is input from the fiber Bragg grating 113, laser oscillation occurs in the active gain fiber 114. Here, the active gain fiber 114 functions as an optical converter that converts the wavelength, beam quality, and the like of the light input from the laser diode 111. The clad 119 may have a single layer structure or a two layer structure. In the case of a two-layer structure, for example, a two-layer structure of an inner clad made of silica and an outer clad made of polymer may be used. The cross-sectional shape of the clad 119 may be any of a circle, a rectangle, and a polygon.

  The fiber cable 117 has a two-layer structure including a cylindrical core having a high refractive index and a pipe-like cladding having a low refractive index and covering the outer periphery of the core. The clad serves to confine light incident on the optical fiber. The outer diameter of the cladding is 100 to 150 μm. Since the refractive index of the core is higher than the refractive index of the clad covering the core, the light incident on the optical fiber is transmitted to the outside through the core portion.

  Patterns (modes) in which an optical signal travels in an optical fiber vary depending on the application, and are broadly classified into three types: multimode step type, multimode graded type, and single mode type. Any mode may be used in the present invention, but a single mode type is preferably used.

  Further, it is preferable that a nonlinear optical element is provided between the fiber Bragg grating 115 and the output port 116. By providing the nonlinear optical element, the fundamental laser beam output from the laser diode 111 can be converted into a harmonic (second harmonic, third harmonic, etc.).

  When laser light emitted from a fiber laser is used in the present invention, productivity improvement and cost reduction of a semiconductor device can be realized as compared with the case of crystallization using a solid laser.

  Further, the laser light used in the present invention may be laser light oscillated from a CW laser having a wavelength absorbed by the amorphous semiconductor film 102. Laser light oscillated from a pseudo CW laser may be used. In this embodiment mode, silicon is used for the amorphous semiconductor film 102. Therefore, the wavelength of the laser light used is 800 nm or less, preferably about 200 to 500 nm, more preferably about 350 to 550 nm, which is absorbed by silicon.

  Here, the pseudo CW laser is a pulse oscillation laser, which has a high oscillation frequency and can be handled in the same manner as a CW laser. In the present invention, since it is assumed that the irradiated surface is completely melted so as to have a molten state between one end and the other end of the semiconductor film to be crystallized, one pulse of laser light is irradiated. The solid-liquid interface is continuously maintained by maintaining at least a part of the melted semiconductor film from the melted state of the semiconductor film until the next pulse of laser light is irradiated to the semiconductor film. A pulsed laser that can be crystallized while being moved to is used.

  Further, the present invention has means for periodically modulating the light intensity of the laser light spatially in the major axis direction of the laser light. As such means, a phase shift mask is used. That is, laser irradiation is performed through a phase shift mask having a stripe pattern. FIG. 4 is a schematic diagram of a phase shift mask used in the present invention. 4A shows a side view of the phase shift mask, and FIG. 4B shows a top view of the phase shift mask. The phase shift mask used in the present invention is provided with a periodic stripe pattern composed of convex portions 121 and concave portions 122. Such a phase shift mask is manufactured by processing a substrate having high smoothness and translucency with laser light. As the light-transmitting substrate, for example, a quartz substrate is used. When the laser light passes through the phase shift mask having such irregularities, the phase is not inverted by the laser light that has passed through the convex portion, but the phase is inverted by 180 ° only by the laser light that has passed through the concave portion. Thereby, it is possible to obtain laser light having an intensity distribution reflecting the interval between the concave portion and the convex portion of the phase shift mask.

A step Δt is provided between the concave surface and the convex surface. Δt is obtained from the wavelength λ of the laser light to be used and the refractive index n ₁ of light in quartz and the refractive index n ₀ of light in air, which are materials of the phase shift mask, by the following formula.

Here, when the refractive index n ₁ = 1.486, the refractive index n ₀ = 1.000, and the wavelength λ = 532 nm, the step Δt = 547 nm. Therefore, the quartz substrate is processed so that Δt = 547 nm.

  FIG. 5 shows a schematic diagram of the positional relationship of the optical system apparatus when irradiating laser light in the present invention. The laser light oscillated from the laser oscillator 130 is first adjusted by the attenuator 131. The attenuator 131 adjusts the light intensity of the oscillated laser light. The laser beam that has passed through the attenuator 131 is irradiated from the slit 132 and passes through the cylindrical lens 133. The laser light that has passed through the cylindrical lens 133 and the cylindrical lens 136 is condensed at the respective rear focal points in the major axis direction and the minor axis direction, and is shaped into the shape of the irradiated beam. In the present invention, in order to form a linear beam, each of the major axis direction (FIG. 5A) and the minor axis direction (FIG. 5B) will be described separately.

  The laser light passes through the cylindrical lens 133 and is focused on the rear focal point 134 in the major axis direction. The rear focal point 134 is determined by the refractive index of the cylindrical lens 133. The length 39 in the major axis direction of the linear laser light irradiated on the irradiated surface 138 is determined by the rear focal length 135 which is the distance from the cylindrical lens surface 133a to the rear focal point. Therefore, the distance between the cylindrical lens 133 and the irradiated surface 138 is determined so that the length 39 in the major axis direction of the linear laser beam becomes a desired length. Note that in this embodiment mode, the irradiated surface 138 is the surface of the amorphous semiconductor film 102 shown in FIG. The laser light then passes through the cylindrical lens 136, but even if it passes through the cylindrical lens 136, it is not affected in the major axis direction of the laser light.

  With respect to the short axis direction of the laser beam, the laser beam passes through the cylindrical lens 133 without change, and the rear focal point of the cylindrical lens 136 is formed by the cylindrical lens 136 provided between the cylindrical lens 133 and the irradiated surface 138. 140 is condensed. The rear focal point 140 is determined by the refractive index of the cylindrical lens 136. The length 141 in the minor axis direction of the linear laser light irradiated on the irradiated surface 138 is determined by the rear focal length 142 which is the distance from the cylindrical lens surface 136a to the rear focal point 140. Therefore, the distance between the cylindrical lens 136 and the irradiated surface 138 is determined so that the length 141 in the short axis direction of the linear laser light becomes a desired length. Note that in this embodiment mode, the irradiated surface 138 is the surface of the amorphous semiconductor film 102. Here, in FIG. 5B, the rear focal point 140 exists behind the irradiated surface, but the rear focal point may be in front of the irradiated surface. Since laser light is also refracted by the phase shift mask, this point is also taken into consideration.

  In this embodiment mode, laser light is applied to the surface of the amorphous semiconductor film through the phase shift mask 137 having a stripe pattern. By passing through the phase shift mask 137, the laser light has an intensity distribution reflecting the stripe pattern of the phase shift mask 137 in the major axis direction.

  Here, the period of the unevenness of the stripe pattern formed on the phase shift mask 137 may be determined according to the laser beam used. The period of the unevenness of the stripe pattern may be determined by the size of crystal grains obtained when laser crystallization is performed without using a phase shift mask with the laser light. For example, when crystallization is performed without using the phase shift mask 137, if the crystal grain size is about 3 μm on average, the intensity-modulated period of the intensity-modulated laser beam is irradiated when the surface is irradiated with the intensity-modulated laser light. What is necessary is just to adjust so that a half may be 3 micrometers or less. Thereby, the position of crystal nucleation can be controlled. Here, the unevenness period is set to 6 μm. Therefore, the crystal band constituting the semiconductor film to be crystallized has an interval (width) of 3 μm.

  FIG. 6 shows the calculation result when the beam profile of the laser beam repeated with a period of 6 μm is formed by the interference light by the phase shift mask as described above. The horizontal axis represents the relative distance, and the vertical axis represents the normalized luminance. The calculation result is calculated by numerical integration of Fresnel-Kirchhoff diffraction integration. For the calculation, Mathematica was used.

  FIG. 6A shows the luminance distribution of the laser light when the scanning direction of the laser light and the stripe pattern of the phase shift mask are parallel. Note that the scanning direction of the laser beam is a direction parallel to a groove provided in the phase shift mask and forming the unevenness. As shown in FIG. 6A, the luminance of the irradiated laser light becomes almost zero every 3 μm (half the period of the beam profile of the laser light). As described above, at the position where the brightness of the irradiated laser beam is almost zero, a sufficient amount of heat for completely melting the amorphous semiconductor film is not given, and crystallization may not occur. Therefore, the scanning direction of the linear beam may be inclined by an angle θ (see FIG. 7A-1) without being parallel to the groove forming the unevenness provided in the phase shift mask. 7A-1 is a top view of the phase shift mask 151, FIG. 7A-2 is a side view of the phase shift mask 151, and FIG. 7B is a phase shift mask 151. A state in which the irradiated laser beam 150 is irradiated with the linear laser beam 150 is shown. As a result, it is possible to ensure a laser beam intensity sufficient for the amorphous semiconductor film to be completely melted at a minimum value of the luminance of the laser beam that periodically exists. FIG. 6B shows the case where the angle θ is 11.5 °, and FIG. 6C shows the case where the angle θ is 30.9 °. In one cycle of the laser light intensity in FIG. 6C, the luminance values of the light intensity maximum value and the minimum value are adjusted so as to be within a certain condition.

  Here, a fixed condition for the maximum value and the minimum value of the light intensity will be described. FIG. 8 shows the relationship between the brightness of the irradiated laser light and the form of the semiconductor film formed by the laser light irradiation.

  When the luminance of the irradiated laser beam is smaller than the p value in FIG. 8, the amorphous semiconductor film is not crystallized and remains amorphous.

  When the minimum value of the luminance of the irradiated laser light is larger than the p value in FIG. 8 and the maximum value of the luminance is smaller than the q value (see FIG. 8A), the amorphous semiconductor film is the entire surface. Is crystallized.

  The maximum value of the luminance of the irradiated laser light is larger than the q value in FIG. 8 and smaller than the r value, and the minimum value of the luminance of the irradiated laser light is p in FIG. When the value is larger than the value and smaller than the q value (see FIG. 8B), the amorphous semiconductor film is crystallized, and the crystalline semiconductor layer has a large crystal grain size and a small grain boundary. Crystals are mixed.

  When the maximum value and the minimum value of the luminance of the irradiated laser light are larger than the q value and smaller than the r value in FIG. 8 (see FIG. 8C), the amorphous semiconductor film is crystallized. A crystal having a large crystal grain size is formed in the semiconductor film.

  The maximum value of the luminance of the irradiated laser light is larger than the r value in FIG. 8, and the minimum value of the luminance of the irradiated laser light is larger than the q value in FIG. (See FIG. 8D), the semiconductor film remains only in the region where the luminance of the irradiated laser light is weak, and the semiconductor film in the region where the luminance is strong disappears to become a striped semiconductor film. .

  As described above, the size and the like of the crystal grains formed vary depending on the brightness of the irradiated laser light. In the present invention, in order to form a crystal having a large size, the brightness of the laser beam is adjusted as shown in FIG. It is empirically known that the q value in FIG. 8 is about 80% of the r value.

  For the above reasons, it is necessary to adjust the angle θ and the distance d between the phase shift mask and the amorphous semiconductor film so as to have optimum values. FIG. 9 shows the change in luminance when the angle θ is constant at 30.9 ° and the distance d is changed. FIGS. 9A to 9D show the luminance of the laser beam irradiated when d is 300 μm, 400 μm, 500 μm, and 800 μm, respectively. In FIG. 9D, the luminance changes periodically and there is little noise. Therefore, here, it is preferable to adjust the angle θ to be 30.9 ° and the distance d to be 800 μm. Such a relationship between the linear laser beam 150, the phase shift mask 151, and the irradiated surface 152 is shown in FIG. 7A-1 is a top view of the linear laser beam 150 and the phase shift mask 151, and FIG. 7A-2 is a side view of FIG. 7A-1. FIG. 7B is a side view of the irradiated surface, the phase shift mask, and the linear laser light at the time of linear laser light irradiation shown in FIGS. 7A-1 and 7A-2. Since the substrate is scanned during laser irradiation, the scanning direction of the substrate is shown in the drawing.

  In addition to those described above in the present embodiment, a projection lens can also be used. FIG. 10 shows a schematic diagram of an optical system when a projection lens is used. The laser irradiation device 160 includes a laser oscillation device 161, a first optical system 162 that shapes laser light, a second optical system 163 that equalizes laser light, a mask holder 170, and a third optical system 165. And a stage 166. A mask 164 is disposed on the mask holder 170. A substrate 167 is disposed on the stage 166. The substrate 167 corresponds to the glass substrate 100 on which an amorphous semiconductor film is formed, for example.

  Laser light obtained by oscillating with an oscillator of the laser oscillation device 161 is shaped by the first optical system 162. The shaped laser light passes through the second optical system 163 and is made uniform. Then, the shaped and uniformized laser light passes through the mask 164, is reduced to a desired magnification in the third optical system 165, and forms a pattern on the substrate 167 held on the stage 166.

  The laser oscillation device 161 includes a laser oscillator capable of obtaining a large output. For example, an excimer laser oscillator, a gas laser oscillator, a solid laser oscillator, a semiconductor laser oscillator and the like are provided. What can obtain a continuous wave laser beam or a pulsed laser beam can be used as appropriate. Specifically, the laser oscillator described in Embodiment 1 can be used.

  The first optical system 162 is an optical system for shaping the laser light obtained from the laser oscillation device 161 into a desired shape. Specifically, the cross-sectional shape of the laser light can be formed into a surface shape such as a circle, an ellipse, or a rectangle, or a line (strictly speaking, an elongated rectangle). For example, the beam diameter of the laser light may be adjusted using an expander or the like for the first optical system 162. In addition, a polarizer that aligns the polarization direction of the laser light, an attenuator that adjusts the energy of the laser light, a spectrometer, and the like may be provided. The attenuator is also called an attenuator and adjusts the light intensity of the oscillated laser beam. If the laser oscillation device 161 has a function of adjusting the output of laser light, an attenuator need not be provided.

  The second optical system 163 is an optical system for uniformizing the energy distribution of the laser light molded by the first optical system 162. Specifically, the energy distribution of the laser light applied to the mask 164 is made uniform. For example, the energy distribution of the laser beam may be made uniform using a homogenizer or the like. In addition, a field lens or the like may be provided between the homogenizer and the mask 164 so as to efficiently irradiate the mask 164 with laser light.

  Note that the mask 164 corresponds to a phase shift mask, a light shielding mask, a phase shift mask having a light shielding region, or the like. The light shielding region is made of a material that has excellent light shielding properties and is resistant to the energy of the irradiated laser beam.

  The third optical system 165 is an optical system for reducing laser light patterned through the mask 164. The laser light that has passed through the mask 164 corresponds to the pattern formed on the mask 164. The third optical system 165 is an optical system that reduces and forms an image on the substrate 167 while maintaining the pattern shape and intensity distribution of the laser light formed by the mask 164. For example, a reduction lens that is reduced to 1/5, 1/10, or the like is used.

  The substrate 167 is held by the stage 166 and can move in the XYZθ directions.

  The laser irradiation apparatus in FIG. 10 may be provided with a light receiving element 168 for monitoring and controlling whether the mask 164 is uniformly irradiated with laser light. In addition, a light receiving element 169 may be provided as an autofocus mechanism for focusing the laser beam on the substrate 167. As the light receiving elements 168 and 169, a CCD camera or the like may be used.

  In addition, a laser or the like may be appropriately provided in the laser irradiation apparatus in FIG. 10 to control the traveling direction of the laser light.

  As described above, by using the projection lens, the intensity distribution in the major axis direction of the irradiated laser light in the present invention is not constrained by the pattern period of the mask 164. Accordingly, a crystalline semiconductor film having a crystal band with a period different from that of the mask 164 can be formed.

  As described above, by applying the present invention, the crystal nucleation site is controlled as shown in FIGS. 1 (B-1) and (B-2), and the grain boundary extends in one direction. A polycrystalline semiconductor layer 103 formed with crystal grains having a large grain size can be obtained. Note that the polycrystalline semiconductor layer 103 in FIG. 1B-1 has a crystal band boundary 105 extending only in one direction, as shown in FIG. 1B-2. The region partitioned by is a single crystal band 104. Note that the crystal band 104 includes one or more crystal grains, but preferably includes one crystal grain. By using a crystal band composed of one crystal grain, a polycrystalline semiconductor having no grain boundary can be formed as in the case of a single crystal.

  An arbitrary point (point P in FIG. 1B-2) is taken in the crystal band 104, and a line drawn from the arbitrary point in parallel to the boundary 105 of the crystal band does not intersect the boundary 105 of the crystal band. . In addition, according to the present embodiment, no crystal grain boundary intersecting with the boundary 105 of the crystal band is formed, so that the direction of the TFT channel length is substantially parallel to the boundary 105 of the crystal band. By providing a TFT in this manner, a TFT with high mobility and good electrical characteristics can be manufactured.

  In this embodiment mode, the laser light is formed into a linear shape when the amorphous semiconductor film is crystallized by the laser light. As means for periodically modulating the intensity of linear laser light in the major axis direction, a phase shift mask having grooves formed at regular intervals is used. Therefore, the width of the formed crystal band is constant. By making the width of the crystal band constant, a TFT with good electrical characteristics can be manufactured.

  In crystallization, a metal element that promotes crystallization can also be used. When an amorphous semiconductor film is crystallized using a metal element that promotes crystallization, there is an advantage that crystallization can be performed in a short time at a low temperature and the directions of crystals are aligned. However, since the metal element remains in the crystalline semiconductor layer, there is a disadvantage that the off-current increases and the characteristics are not stable. Therefore, an amorphous semiconductor layer functioning as a gettering site is preferably formed over the crystalline semiconductor layer. Since the amorphous semiconductor layer serving as a gettering site needs to contain an impurity element such as phosphorus (P) or argon (Ar), sputtering that can preferably contain argon at a high concentration is preferable. It may be formed by the method. Thereafter, heat treatment (RTA method, thermal annealing using a furnace annealing furnace, etc.) is performed to diffuse the metal element in the amorphous semiconductor layer, and then the amorphous semiconductor layer containing the metal element and the surface The oxide film is removed. Then, the content of the metal element in the crystalline semiconductor layer can be reduced or removed.

  Alternatively, a passivation film may be formed using a silicon nitride film or a silicon oxynitride film after crystallization, and heat treatment may be performed at 450 to 800 ° C. for 1 to 24 hours in a nitrogen atmosphere. For example, by performing heat treatment at 550 ° C. for 14 hours, the impurity region becomes a gettering site, and the metal element can be segregated from the channel formation region to the impurity region. Both the donor or acceptor and the metal element are present in the impurity region. In this manner, the metal element that promotes crystallization can be removed from the channel formation region.

  Further, Ni, Fe, Ru, Rh, Pd, Os, Ir, Pt, Cu, Au, or the like can be used as a metal element that promotes crystallization.

  As described above, according to the present invention, the crystal nucleation site can be controlled. Therefore, the generation location, the generation direction, and the number per unit area of the crystal grain boundary can be controlled.

  According to the present invention, the direction of crystal growth can be controlled in one direction. Therefore, the crystal grain boundary can be reduced. Thereby, in a TFT having a polycrystalline semiconductor layer, the mobility of the semiconductor layer can be dramatically improved.

  In addition, according to the present invention, the mobility of the semiconductor layer of the TFT is improved, so that a TFT having favorable electrical characteristics can be manufactured.

  Since a TFT having favorable electrical characteristics can be manufactured according to the present invention, a circuit element with higher functionality than conventional ones can be formed. As a result, a semiconductor device with higher added value than conventional can be manufactured on a glass substrate.

<Embodiment 2>
In this embodiment, an example of a manufacturing process of a TFT in a liquid crystal display device to which the present invention is applied is described with reference to drawings. 11 to 14 show TFTs (pixel TFTs) included in the pixel portion of the liquid crystal display device. 11A to 14A are top views, and FIG. 11B is a cross-sectional view taken along lines X _{1 to} X ₃ in FIG.

  In this embodiment mode, a glass substrate 180 is used as the substrate. A base layer 181 is formed on the glass substrate 180. An amorphous silicon film is formed on the base layer 181. The base layer 181 may be formed using a silicon oxide material or a silicon nitride material. Or the structure which laminated | stacked the film | membrane which consists of these materials may be sufficient. Preferably, a two-layer structure in which a silicon oxide film is formed over a silicon nitride film may be used. The layer in contact with the semiconductor layer is preferably formed using silicon oxide. In particular, use of silicon oxide formed by thermal oxidation is more preferable because variation in interface states can be reduced. Here, a stacked structure in which a silicon oxide film 183 is formed over the silicon nitride film 182 is employed. Note that the present invention is not limited to this, and it is not necessary to provide the base layer 181 when it is unnecessary as in the first embodiment.

  Next, dehydrogenation treatment is performed. The dehydrogenation treatment may be performed by heating the glass substrate 180. For example, heating is performed at 500 ° C. for 1 hour. Note that the present invention is not limited to this, and the dehydrogenation treatment may not be performed if unnecessary.

  Next, channel doping is performed as necessary. Note that channel doping is a technique in which an impurity having a predetermined concentration is added to a semiconductor layer, the threshold voltage of the TFT is intentionally shifted, and the threshold value of the TFT is controlled to a desired value. For example, when the threshold voltage is shifted to the minus side, a p-type impurity element is used as the dopant, and when the threshold voltage is shifted to the plus side, an n-type impurity element is used as the dopant. Here, phosphorus (P) or arsenic (As) is given as the p-type impurity element, and boron (B) or aluminum (Al) is given as the n-type impurity element.

  Here, if necessary, the oxide film formed on the surface of the amorphous silicon film is removed.

  Next, the amorphous silicon film is crystallized by applying the present invention. The method described in Embodiment Mode 1 may be used for crystallization of the amorphous silicon film. As a result, the amorphous silicon film is crystallized to become a polycrystalline silicon layer 185.

Next, the polycrystalline silicon layer 185 is patterned by etching (see FIG. 11). The etching may be dry etching or wet etching, but the etching rate of the underlying layer (here, the silicon oxide film 183) is low and the etching rate of the polycrystalline silicon layer 185 is high, that is, the underlying layer The etching is performed under the condition that the etching selectivity of the polycrystalline silicon layer 185 is high. As the etching gas, a fluorine-based gas such as SF ₆ , a chlorine-based gas such as CCl ₄ or Cl _2, or a gas such as CBrF ₃ can be used. In the present specification, the etching rate is a depth etched per unit time. The etching selectivity is an etching rate of a film to be etched with respect to an etching rate of a base layer in etching of a stacked film.

  Next, a silicon oxide film is formed as a cap film, and an impurity element is added at a high concentration in a state where a resist is formed in a desired region. Here, if the TFT to be formed is an N-type TFT, phosphorus (P), arsenic (As), or the like can be used. Conversely, if the TFT to be formed is a P-type TFT, boron (B), aluminum (Al), or the like can be used. Here, an N-type TFT is formed using phosphorus (P) as an impurity element. Thereafter, the silicon oxide film formed as the resist and the cap film is removed. Note that the present invention is not limited to this, and the cap film may be formed of other materials.

  Next, a first insulating layer 187 is formed. The first insulating layer 187 may be formed using a silicon oxide material or a silicon nitride material, similarly to the base layer 181. Here, a stacked structure in which a silicon nitride film 189 is formed over the silicon oxide film 188 is employed.

  Next, the first electrode layer 202 is formed (see FIG. 12). The first electrode layer 202 can be formed by a CVD method, a sputtering method, a droplet discharge method, or the like. The first electrode layer 202 has an element selected from tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), aluminum (Al), and copper (Cu), or a main component thereof. What is necessary is just to form with an alloy material or a compound material. When aluminum (Al) is used for the first electrode layer, hillocks are suppressed by using an Al—Ta alloy that is alloyed by adding tantalum (Ta). In addition, when an Al—Nd alloy that is alloyed by adding neodymium (Nd) is used, not only hillocks are suppressed, but also wiring having low resistance can be formed. Therefore, it is preferable to use an Al—Ta alloy or an Al—Nd alloy. Alternatively, a semiconductor film typified by polycrystalline silicon doped with an impurity element such as phosphorus (P) or an AgPdCu alloy may be used. Further, it may be a single layer or a stacked layer. For example, a two-layer structure including a titanium nitride film and a molybdenum film, or a three-layer structure in which a tungsten film with a thickness of 50 nm, an alloy film of aluminum and silicon with a thickness of 500 nm, and a titanium nitride film with a thickness of 30 nm are stacked. It is good also as a structure. In the case of a three-layer structure, tungsten nitride may be used instead of tungsten of the first conductive film, or an alloy of aluminum and titanium instead of the alloy film of aluminum and silicon of the second conductive film. A film may be used, or a titanium film may be used instead of the titanium nitride film of the third conductive film. The first electrode layer 202 may be a single layer or a stacked layer. For example, a film whose main component is molybdenum (Mo) may be used.

  Here, part of the first insulating layer 187 formed in the previous step is removed by etching. Here, a part of the upper silicon nitride film 189 in the first insulating layer is removed.

  In order to form a semiconductor layer of one conductivity type, an impurity element is added at a high concentration. By this step, an LDD (Lightly Doped Drain) region is formed. Note that the LDD region is a region formed for the purpose of improving reliability in a TFT in which a semiconductor layer is formed of a polycrystalline silicon film. It is important to suppress the off-current in a TFT whose semiconductor layer is polycrystalline silicon. In particular, when a TFT is used as an analog switch such as a pixel circuit, a sufficiently low off-current is required. However, due to the reverse bias strong electric field at the drain junction, there is a leakage current through the defect even at the off time. Since the electric field in the vicinity of the drain end is relaxed by the LDD region, the off-current can be reduced. In addition, the reverse bias electric field at the drain junction can be distributed to the junction between the channel formation region and the LDD region, and the junction between the LDD region and the drain region, and the electric field is relaxed, thereby reducing leakage current. . Thereafter, annealing is performed to activate the impurities.

  Next, the second insulating layer 203 is formed. The second insulating layer 203 may be formed using a silicon oxide material or a silicon nitride material, similarly to the first insulating layer 187 and the base layer 181. Or the structure which laminated | stacked the film | membrane which consists of these materials may be sufficient. Preferably, a two-layer structure in which a silicon oxide film 193 is formed over the silicon nitride film 192 may be used. After the second insulating layer 203 is formed, hydrogenation treatment is performed.

  Next, an opening 194A and an opening 194B are formed by etching a desired position of the second insulating layer 203. The second electrode layer 195 is patterned in a state where the opening 194A and the opening 194B are formed (see FIG. 13). The second electrode layer 195 can be formed in a manner similar to that of the first electrode layer 202. For example, a three-layer structure in which a layer whose main component is aluminum (Al) is sandwiched between layers whose main component is molybdenum (Mo) may be used. The present invention is not limited to this. When the second insulating layer 203 is formed by a droplet discharge method or the like and the opening is not required, etching for forming the opening is not necessary.

  Next, the third insulating layer 196 is patterned. The third insulating layer 196 may be formed using a film formed of an organic material typified by polyimide, acrylic, or the like by a spin coating method or the like. When forming the pattern, the pattern is formed so as to have an opening 209. Note that the opening 209 is formed so as to expose the second electrode layer 195 at a desired position. In addition, when the droplet discharge method is used, it is not necessary to perform pattern formation by photolithography, so that the process is simplified. Here, the droplet discharge method is a method of selectively discharging droplets of a composition prepared for a specific purpose to form a predetermined pattern (also called an ink jet method depending on the method). ). In addition, methods that can transfer or depict other patterns, for example, various printing methods (methods for forming patterns such as screen printing, offset printing, letterpress printing, and gravure printing) can be used. Note that the third insulating layer 196 may also be formed to have a stacked structure. For example, a film made of an organic material may be formed over a film made of an inorganic material such as a silicon oxide-based material or a silicon nitride-based material.

  Next, the third electrode layer 198 is patterned (see FIG. 14). Since the third electrode layer 198 functions as a pixel electrode, the third electrode layer 198 is formed using a transparent conductive film. For example, it may be formed of ITO (indium tin oxide) or zinc oxide using a sputtering method. ITSO formed by a sputtering method using a target in which 2 to 10% of silicon oxide is contained in ITO may be used. In addition, a conductive material obtained by doping zinc oxide with gallium (Ga), or an oxide conductive material obtained by mixing 2 to 20% zinc oxide with indium oxide may be used. After the third electrode layer 198 is formed, a desired pattern may be formed by etching. The present invention is not limited to this. The third electrode layer 198 may be formed of another material that functions as a transparent conductive film.

  Furthermore, a fourth electrode layer may be formed as necessary. As the fourth electrode layer, for example, a reflective electrode necessary for a semi-transmissive / semi-reflective display device or a reflective display device can be given. By using the reflective electrode, display can be performed by effectively using external light. Accordingly, power consumption of the display device can be reduced. For the formation of the fourth electrode layer, a material mainly composed of aluminum (Al) or silver (Ag) is used. A material with high light reflectance may be used. Preferably, a layer whose main component is aluminum is formed on a layer whose main component is molybdenum to form a stacked structure. In the reflective display device, the third electrode layer 198 may be formed using a material for the fourth electrode layer (a material with high light reflectance).

  As described above, a TFT substrate used for a display device can be formed by applying the present invention. However, the present invention is not limited to this. A different example of a TFT to which the present invention can be applied is shown in FIG.

  FIG. 15 is a side view of a TFT that can be used for a pixel portion of a liquid crystal display device as in Embodiment Mode 2, and is referred to as a bottom-gate TFT. The details of the method of forming the TFT are almost the same as in the second embodiment. A base layer 201 is formed on the substrate 200, and a first electrode layer 202 is patterned on the base layer 201. A first insulating layer 203 is formed over the first electrode layer 202, and a polycrystalline semiconductor layer 204 is formed over the first insulating layer 203. Further, a second insulating layer 205 is formed on the polycrystalline semiconductor layer 204 so as to have an opening 209, and a second electrode layer 206 is patterned thereon. The polycrystalline semiconductor layer 204 and the second electrode layer 206 are electrically connected through the opening 209. A third insulating layer 207 is formed on the second electrode layer 206 so as to have an opening 210. A third electrode layer 208 is patterned on the third insulating layer 207. The second electrode layer 206 and the third electrode layer 208 are electrically connected through the opening 210.

  Each layer of the TFT described above may be formed by laminating. The material to be formed is not limited to a specific material. The polycrystalline semiconductor layer 204 is preferably doped with impurities so as to form an LDD region.

  Next, the structure of a pixel of a display panel in various forms is described with reference to an equivalent circuit diagram shown in FIG.

  In the pixel shown in FIG. 16A, a signal line 310 and a power supply line 311, a power supply line 312, a power supply line 313 are arranged in the column direction, and a scanning line 314 is arranged in the row direction. The pixel further includes a switching TFT 301, a driving TFT 303, a current control TFT 304, a capacitor 302, and a light emitting element 305.

  The pixel shown in FIG. 16C is different from the pixel shown in FIG. 16A except that the gate electrode of the TFT 303 is connected to the power supply line 315 arranged in the row direction. is there. That is, FIGS. 16A and 16C are equivalent circuit diagrams. However, when the power supply line 312 is arranged in the column direction (FIG. 16A) and when the power supply line 315 is arranged in the row direction (FIG. 16C), each power supply line has a different layer of conductivity. Formed with body layers. Here, attention is paid to the wiring to which the gate electrode of the driving TFT 303 is connected, and FIGS. 16A and 16C are shown separately to show that the layers for producing these are different.

As a feature of the pixel shown in FIGS. 16A and 16C, a TFT 303 and a TFT 304 are connected in series in the pixel, and a channel length L ₃ , a channel width W _{3 of the} TFT 303, a channel length L _{4 of the} TFT 304, a channel The width W ₄ is set so as to satisfy L ₃ / W ₃ : L ₄ / W ₄ = 5 to 6000: 1. As an example satisfying such a relationship, consider a case where L ₃ is 500 μm, W ₃ is 3 μm, L ₄ is 3 μm, and W ₄ is 100 μm. In addition, when the present invention is used, a large number of grain boundaries can be formed substantially parallel to the channel length direction, so that a TFT with high mobility can be formed and a display panel with excellent display capability can be manufactured. Become.

Note that the TFT 303 operates in a saturation region and has a role of controlling a current value flowing through the light emitting element 305, and the TFT 304 operates in a linear region and has a role of controlling supply of current to the light emitting element 305. It is preferable that the TFT 303 and the TFT 304 have the same conductivity type. The TFT 303 may be a depletion type TFT as well as an enhancement type TFT. In the present invention having the above structure, since the TFT 304 operates in a linear region, a slight change in V _GS (potential difference between the source or drain electrode and the gate electrode) of the TFT 304 affects the current value of the light emitting element 305. Absent. That is, the current value of the light emitting element 305 is determined by the TFT 303 operating in the saturation region.

  In the pixels shown in FIGS. 16A to 16D, a TFT 301 controls input of a video signal to the pixel. When the TFT 301 is turned on and a video signal is input into the pixel, the capacitor 302 The video signal is held in Note that FIGS. 16A to 16D illustrate a structure in which the capacitor 302 is provided; however, the present invention is not limited to this, and the capacity for holding a video signal can be covered by a gate capacity or the like. In that case, the capacitor 302 is not necessarily provided.

  The light-emitting element 305 has a structure in which an electroluminescent layer is sandwiched between two electrodes, and a potential difference is generated between the pixel electrode and the counter electrode (between the anode and the cathode) so that a forward bias voltage is applied. Is provided. The electroluminescent layer is made of a material selected from organic materials and inorganic materials. The luminescence in the electroluminescent layer includes light emission (fluorescence) when returning from the singlet excited state to the ground state and light emission (phosphorescence) when returning from the triplet excited state to the ground state. Note that the present invention is not limited to this, and a liquid crystal element may be used instead of the light emitting element.

  The pixel illustrated in FIG. 16B has the same pixel structure as that illustrated in FIG. 16A except that a TFT 306 and a scanning line 316 are added. Similarly, the pixel illustrated in FIG. 16D has the same pixel structure as that illustrated in FIG. 16C except that a TFT 306 and a scanning line 316 are added.

  The TFT 306 is controlled to be turned on or off by a newly arranged scanning line 316. When the TFT 306 is turned on, the charge held in the capacitor 302 is discharged, and the TFT 304 is turned off. That is, the arrangement of the TFT 306 can forcibly create a state in which no current flows through the light emitting element 305. Accordingly, the configurations of FIGS. 16B and 16D improve the duty ratio because the lighting period can be started simultaneously with or immediately after the start of the writing period without waiting for signal writing to all the pixels. can do.

  In the pixel shown in FIG. 16E, a signal line 350, a power supply line 351, a power supply line 352 are arranged in the column direction, and a scanning line 353 is arranged in the row direction. The pixel further includes a switching TFT 341, a driving TFT 343, a capacitor 342, and a light-emitting element 344. The pixel illustrated in FIG. 16F has the same pixel structure as that illustrated in FIG. 16E except that a TFT 345 and a scanning line 354 are added. Note that the duty ratio can also be improved by the arrangement of the TFT 345 in the structure in FIG.

  As described above, by applying the present invention, the size of crystal grains in the semiconductor layer can be increased and the position where the grain boundaries are formed can be controlled. Therefore, the number of grain boundaries existing in the channel length direction can be controlled. Thus, a polycrystalline semiconductor layer formed with crystal grains having a small crystal size and a large crystal grain size can be obtained. Accordingly, a TFT with high mobility in the semiconductor layer can be formed.

  In addition, according to the present invention, the mobility of the semiconductor layer of the TFT is improved, so that a TFT having favorable electrical characteristics can be manufactured.

  Since a TFT having good electrical characteristics can be manufactured, a circuit element with higher functionality than conventional ones can be formed. Thereby, a display device with higher added value than the conventional one can be manufactured on the glass substrate.

<Embodiment 3>
In this embodiment mode, details of the light-emitting element of Embodiment Mode 2 will be described.

  An EL display device manufactured by applying the present invention will be described with reference to FIG. When an N-type transistor is used as a transistor for driving the light-emitting element, light emitted from the light-emitting element is emitted from a bottom surface (see FIG. 17A), top surface (see FIG. 17B), double-sided radiation (see FIG. 17 (C)). By using the TFT 361, the TFT 371, and the TFT 381, the electric field to each light emitting layer connected to each TFT is controlled. The light-emitting layer 372 and the light-emitting layer 382 are electroluminescent layers, and EL may be used. Light-emitting elements using EL are distinguished depending on whether the light-emitting material is an organic compound or an inorganic compound. Generally, the former is called an organic EL element and the latter is called an inorganic EL element. The case where an inorganic EL element is formed will be described below.

  Inorganic EL elements are classified into a dispersion-type inorganic EL element and a thin-film inorganic EL element depending on the element structure. The former has an electroluminescent layer in which particles of a luminescent material are dispersed in a binder, and the latter has an electroluminescent layer made of a thin film of luminescent material, but is accelerated by a high electric field. This is common in that it requires more electrons. Note that the obtained light emission mechanism includes donor-acceptor recombination light emission using a donor level and an acceptor level, and localized light emission using inner-shell electron transition of a metal ion. In general, the dispersion-type inorganic EL often has donor-acceptor recombination light emission, and the thin-film inorganic EL element often has localized light emission.

  A light-emitting material that can be used in the present invention includes a base material and an impurity element serving as a light emission center. By changing the impurity element to be contained, light emission of various colors can be obtained. As a method for manufacturing the light-emitting material, various methods such as a solid phase method and a liquid phase method (coprecipitation method) can be used. Also, spray pyrolysis method, metathesis method, precursor thermal decomposition method, reverse micelle method, method combining these methods with high temperature firing, liquid phase method such as freeze-drying method, etc. can be used.

  The solid phase method is a method in which a base material and an impurity element or a compound containing the impurity element are weighed, mixed in a mortar, heated and fired in an electric furnace, reacted, and the base material contains the impurity element. The firing temperature is preferably 700 to 1500 ° C. This is because the solid phase reaction does not proceed when the temperature is too low, and the base material is decomposed when the temperature is too high. In addition, although baking may be performed in a powder state, it is preferable to perform baking in a pellet state. Although firing at a relatively high temperature is required, it is a simple method, so it has high productivity and is suitable for mass production.

  The liquid phase method (coprecipitation method) is a method in which a base material or a compound containing the base material and an impurity element or a compound containing the impurity element are reacted in a solution, dried, and then fired. The particles of the luminescent material are uniformly distributed, the size of the crystal grains is small, and the reaction can proceed even at a low firing temperature.

As a base material used for the light-emitting material, sulfide, oxide, or nitride can be used. Examples of the sulfide include zinc sulfide (ZnS), cadmium sulfide (CdS), calcium sulfide (CaS), yttrium sulfide (Y ₂ S ₃ ), gallium sulfide (Ga ₂ S ₃ ), strontium sulfide (SrS), and sulfide. Barium (BaS) or the like can be used. As the oxide, for example, zinc oxide (ZnO), yttrium oxide (Y ₂ O ₃ ), or the like can be used. As the nitride, for example, aluminum nitride (AlN), gallium nitride (GaN), indium nitride (InN), or the like can be used. Furthermore, zinc selenide (ZnSe), zinc telluride (ZnTe), and the like can also be used, and calcium sulfide-gallium sulfide (CaGa ₂ S ₄ ), strontium sulfide-gallium (SrGa ₂ S ₄ ), barium sulfide-gallium (BaGa). _It may be a ternary mixed crystal such as ₂ S ₄ ).

  As the emission center of localized emission, manganese (Mn), copper (Cu), samarium (Sm), terbium (Tb), erbium (Er), thulium (Tm), europium (Eu), cerium (Ce), praseodymium (Pr) or the like can be used. Note that a halogen element such as fluorine (F) or chlorine (Cl) may be added as charge compensation.

  On the other hand, a light-emitting material containing a first impurity element that forms a donor level and a second impurity element that forms an acceptor level can be used as the emission center of donor-acceptor recombination light emission. As the first impurity element, for example, fluorine (F), chlorine (Cl), aluminum (Al), or the like can be used. For example, copper (Cu), silver (Ag), or the like can be used as the second impurity element.

In the case where a light-emitting material for donor-acceptor recombination light emission is synthesized by a solid-phase method, a base material, a first impurity element or a compound containing the first impurity element, and a second impurity element or a second impurity element Each of the compounds containing is weighed and mixed in a mortar, and then heated and fired in an electric furnace. As the base material, the above-described base material can be used. Examples of the first impurity element or the compound containing the first impurity element include fluorine (F), chlorine (Cl), and aluminum sulfide (Al ₂ S). ₃ ) and the like, and examples of the second impurity element or the compound containing the second impurity element include copper (Cu), silver (Ag), copper sulfide (Cu ₂ S), and silver sulfide (Ag). ₂ S) or the like can be used. The firing temperature is preferably 700 to 1500 ° C. This is because the solid phase reaction does not proceed when the temperature is too low, and the base material is decomposed when the temperature is too high. In addition, although baking may be performed in a powder state, it is preferable to perform baking in a pellet state.

  In addition, as an impurity element in the case of using a solid phase reaction, a compound including a first impurity element and a second impurity element may be used in combination. In this case, since the impurity element is easily diffused and the solid-phase reaction easily proceeds, a uniform light emitting material can be obtained. Further, since no extra impurity element is contained, a light-emitting material with high purity can be obtained. As the compound including the first impurity element and the second impurity element, for example, copper chloride (CuCl), silver chloride (AgCl), or the like can be used.

  Note that the concentration of these impurity elements may be 0.01 to 10 atom% with respect to the base material, and is preferably in the range of 0.05 to 5 atom%.

  In the case of a thin-film inorganic EL, the electroluminescent layer is a layer containing the above-described luminescent material, and is a physical vapor deposition method such as a resistance heating vapor deposition method, a vacuum vapor deposition method such as an electron beam vapor deposition (EB vapor deposition) method, or a sputtering method ( PVD), metal organic chemical vapor deposition (CVD), chemical vapor deposition (CVD) such as hydride transport low pressure CVD, atomic layer epitaxy (ALE), or the like.

  FIGS. 18A to 18C illustrate an example of a thin-film inorganic EL element that can be used as a light-emitting element. 18A to 18C, the light-emitting element includes a first electrode layer 390, an electroluminescent layer 392, and a second electrode layer 393.

  The light-emitting element illustrated in FIGS. 18B and 18C has a structure in which an insulating layer is provided between the polar layer and the electroluminescent layer in the light-emitting element in FIG. The light-emitting element illustrated in FIG. 18B includes an insulating layer 394 between the first electrode layer 390 and the electroluminescent layer 392, and the light-emitting element illustrated in FIG. 18C includes the first electrode layer 390. And an electroluminescent layer 392, and an insulating layer 394b is provided between the second electrode layer 393 and the electroluminescent layer 392. Thus, the insulating layer may be provided only between one of the pair of electrode layers sandwiching the electroluminescent layer, or may be provided between both. Further, the insulating layer may be a single layer or a stacked layer including a plurality of layers.

  18B, the insulating layer 394 is provided so as to be in contact with the first electrode layer 390; however, the order of the insulating layer and the electroluminescent layer is reversed so as to be in contact with the second electrode layer 393. An insulating layer 394 may be provided.

  In the case of a dispersion-type inorganic EL, a particulate luminescent material is dispersed in a binder to form a film-like electroluminescent layer. When particles having a desired size cannot be obtained sufficiently by the method for manufacturing a light emitting material, the particles may be processed into particles by pulverization or the like in a mortar or the like. A binder is a substance for fixing a granular light emitting material in a dispersed state and maintaining the shape as an electroluminescent layer. The light emitting material is uniformly dispersed and fixed in the electroluminescent layer by the binder.

  In the case of a dispersion-type inorganic EL, the electroluminescent layer can be formed by a droplet discharge method capable of selectively forming an electroluminescent layer, a printing method (screen printing, offset printing, etc.), a coating method such as a spin coating method, dipping, etc. The method, the dispenser method, etc. can also be used. The film thickness is not particularly limited, but is preferably in the range of 10 to 1000 nm. In the electroluminescent layer including the light emitting material and the binder, the ratio of the light emitting material may be 50 wt% or more and 80 wt% or less.

  FIGS. 19A to 19C illustrate an example of a dispersion-type inorganic EL element that can be used as a light-emitting element. A light-emitting element in FIG. 19A has a stacked structure of a first electrode layer 400, an electroluminescent layer 402, and a second field electrode layer 403, and a light-emitting material 401 held in the electroluminescent layer 402 by a binder. including.

As a binder that can be used in this embodiment, an insulating material can be used, an organic material or an inorganic material can be used, and a mixed material of an organic material and an inorganic material can be used. As the organic insulating material, a polymer having a relatively high dielectric constant such as a cyanoethyl cellulose resin, or a resin such as polyethylene, polypropylene, polystyrene resin, silicone resin, epoxy resin, or vinylidene fluoride can be used. In addition, a heat-resistant polymer such as aromatic polyamide, polybenzimidazole, or siloxane resin may be used. Note that a siloxane resin corresponds to a resin including a Si—O—Si bond. Siloxane has a skeleton structure formed of a bond of silicon (Si) and oxygen (O). As a substituent, an organic group containing at least hydrogen (for example, an alkyl group or an aromatic hydrocarbon) is used. A fluoro group may be used as a substituent. Alternatively, an organic group containing at least hydrogen and a fluoro group may be used as a substituent. Moreover, resin materials such as vinyl resins such as polyvinyl alcohol and polyvinyl butyral, phenol resins, novolac resins, acrylic resins, melamine resins, urethane resins, and oxazole resins (polybenzoxazole) may be used. The dielectric constant can be adjusted by appropriately mixing fine particles having a high dielectric constant such as barium titanate (BaTiO ₃ ) and strontium titanate (SrTiO ₃ ) with these resins.

Examples of the inorganic insulating material contained in the binder include silicon oxide (SiO _x ), silicon nitride (SiN _x ), silicon containing oxygen and nitrogen, aluminum nitride (AlN), aluminum containing oxygen and nitrogen, or aluminum oxide (Al ₂ O ₃ ), titanium oxide (TiO ₂ ), BaTiO ₃ , SrTiO ₃ , lead titanate (PbTiO ₃ ), potassium niobate (KNbO ₃ ), lead niobate (PbNbO ₃ ), tantalum oxide (Ta ₂ O ₅ ), tantalum Formed with a material selected from materials including barium oxide (BaTa ₂ O ₆ ), lithium tantalate (LiTaO ₃ ), yttrium oxide (Y ₂ O ₃ ), zirconium oxide (ZrO ₂ ), ZnS and other inorganic insulating materials can do. By including an inorganic material having a high dielectric constant in the organic material (by addition or the like), the dielectric constant of the electroluminescent layer made of the light emitting material and the binder can be further controlled, and the dielectric constant can be further increased. .

  In the manufacturing process, the light-emitting material is dispersed in a solution containing a binder. As a solvent for the solution containing the binder that can be used in this embodiment mode, a method of forming an electroluminescent layer by dissolving the binder material ( A solvent capable of producing a solution having a viscosity suitable for various wet processes) and a desired film thickness may be appropriately selected. For example, when a siloxane resin is used as a binder, propylene glycol monomethyl ether, propylene glycol monomethyl ether acetate (also referred to as PGMEA), 3-methoxy-3-methyl-1-butanol (also referred to as MMB) can be used. ) Etc. can be used.

  The light-emitting element illustrated in FIGS. 19B and 19C has a structure in which an insulating layer is provided between the electrode layer and the electroluminescent layer in the light-emitting element in FIG. 19A. The light-emitting element illustrated in FIG. 19B includes an insulating layer 404 between the first electrode layer 400 and the electroluminescent layer 402, and the light-emitting element illustrated in FIG. 19C includes the first electrode layer 400. And an electroluminescent layer 402, and an insulating layer 404b is provided between the second electrode layer 403 and the electroluminescent layer 402. Thus, the insulating layer may be provided only between one of the pair of electrode layers sandwiching the electroluminescent layer, or may be provided between both. Further, the insulating layer may be a single layer or a stacked layer including a plurality of layers.

  In FIG. 19B, the insulating layer 404 is provided so as to be in contact with the first electrode layer 400; however, the order of the insulating layer and the electroluminescent layer is reversed so as to be in contact with the second electrode layer 403. An insulating layer 404 may be provided.

An insulating layer such as the insulating layer 394 in FIG. 18 and the insulating layer 404 in FIG. 19 is not particularly limited, but preferably has a high withstand voltage, a dense film quality, and a high dielectric constant. It is preferable. For example, silicon oxide (SiO ₂ ), yttrium oxide (Y ₂ O ₃ ), titanium oxide (TiO ₂ ), aluminum oxide (Al ₂ O ₃ ), hafnium oxide (HfO ₂ ), tantalum oxide (Ta ₂ O ₅ ), Barium titanate (BaTiO ₃ ), strontium titanate (SrTiO ₃ ), lead titanate (PbTiO ₃ ), silicon nitride (Si ₃ N ₄ ), zirconium oxide (ZrO ₂ ), etc., or a mixed film thereof or two or more kinds A laminated film can be used. These insulating films can be formed by a sputtering method, a vapor deposition method, a CVD method, or the like. The insulating layer may be formed by dispersing particles of these insulating materials in a binder. The binder material may be formed using the same material and method as the binder contained in the electroluminescent layer. The film thickness is not particularly limited, but is preferably in the range of 10 to 1000 nm.

  The light-emitting element described in this embodiment can emit light by applying a voltage between a pair of electrode layers sandwiching an electroluminescent layer, but can operate in either direct current drive or alternating current drive.

  As described above, a light emitting element can be formed. By forming a TFT substrate used for a display device by applying the present invention, the size of crystal grains of a semiconductor layer can be increased and the position where a grain boundary is formed can be controlled. Therefore, it is possible to obtain a polycrystalline semiconductor layer formed of crystal grains having a large size and a small number of grain boundaries existing in the channel length direction. Accordingly, a TFT with high mobility in the semiconductor layer can be formed, so that display performance of the light-emitting device can be improved. In particular, the present invention is preferably used for a driving circuit of a light emitting device.

  In addition, according to the present invention, the mobility of the semiconductor layer of the TFT is improved, so that a TFT having favorable electrical characteristics can be manufactured.

  In addition, since a TFT having good electrical characteristics can be manufactured, a circuit element with higher functionality than conventional ones can be formed. Thereby, a display device with higher added value than the conventional one can be manufactured on the glass substrate.

<Embodiment 4>
Next, a mode in which a driver circuit for driving is mounted on the display panels manufactured in Embodiment Mode 2 and Embodiment Mode 3 will be described.

  A general form of a display device equipped with a drive circuit will be described below.

  First, a display device employing a COG method is described with reference to FIG. A pixel portion 411 for displaying information such as characters and images is provided on the substrate 410. The pixel portion 411 includes a plurality of pixels 412 arranged in a matrix. A driver IC is manufactured by dividing a substrate provided with a plurality of drive circuits into a rectangular shape, and the manufactured driver IC is mounted on the substrate 410. FIG. 21A shows a form in which a plurality of driver ICs 417 and an FPC 416 are mounted on the tip of the driver ICs 417. Alternatively, the division size may be substantially the same as the length of the signal line side of the pixel portion, and a single driver IC may be used to mount a tape on the tip of the driver IC.

  Alternatively, a TAB method may be employed. In that case, a plurality of tapes may be attached and driver ICs may be mounted on the tapes as shown in FIG. As in the case of the COG method, a single driver IC may be mounted on a single tape. In this case, a metal piece or the like for fixing the driver IC may be attached together due to strength problems.

  A plurality of driver ICs mounted on these display panels may be formed on a rectangular substrate having a side of 300 mm to 1000 mm or more from the viewpoint of improving productivity.

  That is, a plurality of circuit patterns having a drive circuit portion and an input / output terminal as one unit may be formed on the substrate, and finally divided and taken out. The long side of the driver IC may be formed in a rectangular shape having a long side of 15 to 80 mm and a short side of 1 to 6 mm in consideration of the length of one side of the pixel portion and the pixel pitch. Or a length obtained by adding one side of the pixel portion and one side of each driver circuit.

  The driver IC is superior to the IC chip in terms of external dimensions in the length of the long side. When a driver IC formed with a long side of 15 to 80 mm is used, the number required for mounting corresponding to the pixel portion is smaller than in the case of using an IC chip, and the manufacturing yield is improved. it can. In the present invention, a driver IC can be formed over a glass substrate. However, in this case, the shape of the substrate used as a base is not limited, and thus productivity is not impaired. This is a great advantage compared with the case where the IC chip is taken out from the circular silicon wafer.

  In the case where the scan line side driver circuit 422 is formed over the substrate 420 as shown in FIG. 20B, a driver IC in which a signal line side driver circuit is formed in a region outside the pixel portion 421. Is implemented. These driver ICs are drive circuits on the signal line side. In order to form a pixel region corresponding to RGB full color, the number of signal lines in the XGA class is 3072 and the number in the UXGA class is 4800. The signal lines formed in such a number are divided into several blocks at the end of the pixel portion 421 to form lead lines, and are collected according to the pitch of the output terminals of the driver IC.

  In the present invention, the driver IC is formed by a crystalline semiconductor film formed on a substrate. By applying the present invention, the crystalline semiconductor film may be formed by irradiation with CW laser light or pseudo CW laser light. By applying the present invention, a TFT can be formed using a polycrystalline semiconductor layer with few crystal defects and large crystal grain size. In addition, since the mobility and response speed are good, high-speed driving is possible, and the operating frequency of the element can be improved as compared with the prior art. This is because when the present invention is applied, crystal grains extend in the channel length direction, and the number of crystal grain boundaries existing in the channel length direction of the transistor is small. Note that the channel length direction corresponds to the direction in which current flows, in other words, the direction in which charges move in the channel formation region.

  In order to perform laser crystallization, it is preferable to significantly narrow the laser beam. In the present invention, since the shape of the laser beam is linear, a sufficient and efficient energy density can be secured for the irradiated object. However, the line shape here does not mean a line in a strict sense, but means a rectangle or an ellipse with a large aspect ratio, and a certain width may be secured in the minor axis direction. .

  In the present invention, as shown in FIG. 20C, a pixel portion 431 is provided over a substrate 430, and a signal line driver circuit 432 and a scanning line driver circuit 434 are integrally formed.

  In the pixel region, signal lines and scanning lines intersect to form a matrix, and transistors are arranged corresponding to the respective intersections. The present invention is characterized in that a TFT having a crystalline semiconductor film as a channel formation region is used as a transistor arranged in a pixel region. In the present invention, since the mobility of the TFT in the semiconductor layer is high, a display panel that realizes system-on-panel can be manufactured.

  By setting the thickness of the driver IC to be the same as that of the counter substrate, the height between the two becomes substantially the same, which contributes to the reduction in thickness of the entire display device. In addition, since each substrate is made of the same material, thermal stress is not generated even when a temperature change occurs in the display device, and the characteristics of a circuit made of TFTs are not impaired. In addition, the number of driver ICs to be mounted in one pixel region can be reduced by mounting the drive circuit with a driver IC that is longer than the IC chip as shown in this embodiment.

  As described above, a driver circuit can be incorporated in a display panel. According to the present invention, since a semiconductor film with high mobility can be formed, a display device with higher function can be provided.

<Embodiment 5>
Embodiments of the semiconductor device other than the display device to which the present invention is applied will be described with reference to FIGS. Specifically, a semiconductor device capable of wireless communication will be described. In this embodiment, the case where six semiconductor devices are manufactured over a substrate 451 is described. Note that in FIGS. 22A, 23A, and 24A, a region where one semiconductor device is provided corresponds to a region 450 surrounded by a dotted line. Each of FIGS. 22B, 23B, and 24B is a cross-sectional view from point A to point B in FIGS. 22A, 23A, and 24A. It corresponds to.

  First, the insulating layer 459 is formed over the substrate 451 (see FIG. 22B). Next, a layer including a plurality of transistors 460 is formed over the insulating layer 459. Next, the insulating layer 462 and the insulating layer 463 are formed over the layer including the plurality of transistors 460. Next, the conductive layer 464 connected to the source region or the drain region of each of the plurality of transistors 460 through the openings provided in the insulating layers 462 and 463 is formed. Next, an insulating layer 465 is formed so as to cover the conductive layer 464.

  As the substrate 451, a glass substrate, a plastic substrate, a quartz substrate, or the like is preferably used. Preferably, a glass substrate or a plastic substrate is used. The substrate only needs to be insulating and have necessary heat resistance. When a glass substrate or a plastic substrate is used as the substrate, it is easy to manufacture a semiconductor device with one side of 1 meter or more or a semiconductor device with a desired shape.

  The insulating layer 459 functions as a barrier against contaminants (such as impurities contained in the substrate) from the outside. The insulating layer 459 is formed by a single layer or a stacked layer using a silicon oxide-based material or a silicon nitride-based material by a sputtering method, a plasma CVD method, or the like. Note that the insulating layer 459 is not necessarily provided when not necessary.

  Each of the plurality of transistors 460 includes a polycrystalline semiconductor layer 466, an insulating layer 461, and a conductive layer 467. For the crystallization of the polycrystalline semiconductor layer 466, the method described in Embodiment 1 may be used. The polycrystalline semiconductor layer 466 includes an impurity region 468 functioning as a source region or a drain region and a channel formation region 469. An impurity element imparting N-type or P-type is added to the impurity region 468. Specifically, an impurity element imparting N-type (elements belonging to Group 15 such as phosphorus (P) or arsenic (As)) and an impurity element imparting P-type (for example, boron (B)) are added. . Although not particularly shown, it is preferable to form an LDD region.

  Note that although only the plurality of transistors 460 are formed in the illustrated configuration, the present invention is not limited to this configuration. Elements provided over the substrate 451 may be appropriately adjusted depending on the use of the semiconductor device. For example, in the case of forming a semiconductor device having a function of transmitting and receiving electromagnetic waves, only a plurality of transistors may be formed over the substrate 451, or a plurality of transistors and a conductive layer functioning as an antenna may be formed over the substrate 451. Note that the conductive layer functioning as an antenna may be formed by stacking a plurality of layers instead of a single layer. In the case of forming a semiconductor device having a function of storing data, a memory element (eg, a transistor or a memory transistor) may be formed over the substrate 451. Further, a semiconductor device (for example, a CPU, a signal generation circuit, or the like) having a function of controlling a circuit, a function of generating a signal, or the like may be formed. In addition to the above, a resistor element, a capacitor element, or the like may be formed as necessary.

  The insulating layers 462 and 463 are formed as a single layer or stacked layers using an inorganic material or an organic material by an SOG (spin-on-glass) method, a droplet discharge method, a screen printing method, or the like. For example, the insulating layer 462 may be formed using a silicon nitride material, and the insulating layer 463 may be formed using a silicon oxide material.

  In the case where the separation layer is included, the stack 470 including the plurality of transistors 460 may be separated from the substrate 451. A semiconductor device including a TFT including the stacked body 470 can be manufactured. In addition, a bendable semiconductor device can be manufactured by transferring the peeled stack 470 to a flexible substrate.

  Here, an example of a structure of the semiconductor device of the present invention will be described with reference to FIG. The semiconductor device 510 of the present invention includes an arithmetic processing circuit 511, a memory circuit 513, an antenna 514, a power supply circuit 518, a demodulation circuit 520, and a modulation circuit 521. The semiconductor device 510 includes the antenna 514 and the power supply circuit 518 as essential components, and other elements are appropriately provided according to the use of the semiconductor device 510.

  The arithmetic processing circuit 511 performs analysis of instructions, control of the storage circuit 513, output of data to be transmitted to the modulation circuit 521, and the like based on a signal input from the demodulation circuit 520.

  The memory circuit 513 includes a circuit including a memory element and a control circuit that performs data writing and data reading. The memory circuit 513 stores at least an identification number of the semiconductor device itself. The identification number is used to distinguish from other semiconductor devices. The memory circuit 513 includes an organic memory, a DRAM (Dynamic Random Access Memory), a SRAM (Static Random Access Memory), a FeRAM (Ferroelectric Random Access Memory), and a mask ROM (Read Only Memory). It has one or more types selected from EPROM (Electrically Programmable Read Only Memory), EEPROM (Electrically Erasable Programmable Read Only Memory) and flash memory. An organic memory has a structure in which a layer containing an organic compound is sandwiched between a pair of conductive layers. Since the structure is simple, the organic memory has at least the following two advantages. One is that the manufacturing process can be simplified and the cost can be reduced. The other is that the area of the laminated body can be easily reduced, and a large capacity can be easily realized. Further, since it is a non-volatile memory, a battery may or may not be incorporated. Therefore, it is preferable to use an organic memory as the memory circuit 513.

  The antenna 514 converts the carrier wave supplied from the reader / writer 522 into an AC electrical signal. Further, load modulation is applied to the signal transmitted from the semiconductor device 510 by the modulation circuit 521. The power supply circuit 518 generates a power supply voltage using an AC electrical signal from the antenna 514 and supplies the power supply voltage to each circuit.

  The demodulation circuit 520 demodulates an alternating electrical signal from the antenna 514 and supplies the demodulated signal to the arithmetic processing circuit 511. The modulation circuit 521 applies load modulation to the antenna 514 based on the signal supplied from the arithmetic processing circuit 511.

  The reader / writer 522 receives the load modulation applied to the antenna 514 as a carrier wave. Further, the reader / writer 522 transmits a carrier wave to the semiconductor device 510. Note that a carrier wave is an electromagnetic wave transmitted and received by the reader / writer 522, and the reader / writer 522 receives the carrier wave modulated by the modulation circuit 521.

  As described above, the semiconductor device of the present invention having a function of transmitting and receiving electromagnetic waves wirelessly includes an RFID (Radio Frequency Identification) tag, an RF chip, an RF tag, an IC chip, an IC tag, an IC label, a wireless chip, a wireless tag, and an electronic device. It is called a chip, an electronic tag, a wireless processor, or a wireless memory. This embodiment can be freely combined with any of the other embodiments.

  As described above, a TFT substrate used for a semiconductor device such as an RFID tag can be formed by applying the present invention. By applying the present invention, the crystal grain size of the semiconductor layer can be increased and the position where the grain boundary is formed can be controlled. Therefore, the number of grain boundaries existing in the channel length direction is small, A polycrystalline semiconductor layer formed by large crystal grains can be obtained. Accordingly, a TFT with high mobility in the semiconductor layer can be formed.

  In addition, according to the present invention, the mobility of the semiconductor layer of the TFT is improved, so that a TFT having favorable electrical characteristics can be manufactured.

  According to the present invention, a TFT having good electrical characteristics can be manufactured, so that a circuit element having higher functionality than that of the conventional one can be formed. As a result, a semiconductor device with higher added value than conventional can be manufactured on a glass substrate.

<Embodiment 6>
The present invention can also be applied to a memory element having a crystalline semiconductor layer. As an example, a NOR flash memory manufactured by applying the present invention will be described with reference to FIGS. The NOR type flash memory is mounted on, for example, a mother board (also referred to as a main board), and is used for recording a BIOS (Basic Input Output System). The mother boat is a part of a computer and is a substrate on which various modules such as a CPU (Central Processing Unit) are mounted.

  In manufacturing the flash memory, the TFT manufacturing method is the same as that of the RFID tag described in Embodiment Mode 5 in many steps. Hereinafter, the configuration of the memory element 500 will be described. First, the insulating layer 482 is formed over one surface of the substrate 480. Next, a layer including a plurality of transistors is formed using the semiconductor layer 496 over the insulating layer 482. The semiconductor layer 496 includes an impurity region 497 and a channel formation region 498. Next, an insulating layer 483, a floating gate layer 489, and an insulating layer 484 are formed over the layer including a plurality of transistors. Next, a conductive layer 499 is formed, and an insulating layer 485 and an insulating layer 486 are formed. Next, a conductive layer connected to the source region or the drain region of each of the plurality of transistors through openings provided in the insulating layers 483, 484, 485, and 486 in the plurality of transistors. 487 is formed. Next, an insulating layer 495 is formed so as to cover the conductive layer 487.

  As the substrate 480, a glass substrate, a plastic substrate, a quartz substrate, or the like is preferably used. Preferably, a glass substrate or a plastic substrate is used. When a glass substrate or a plastic substrate is used as the substrate, it is easy to manufacture a semiconductor device having one side of 1 meter or more, or a substrate having a desired shape.

  The insulating layer 482 serves to prevent impurities from entering from the substrate 480. As the insulating layer 482, a silicon oxide film or a silicon nitride film is formed as a single layer or a stacked layer by a sputtering method, a plasma CVD method, or the like. Note that the insulating layer 482 is not necessarily provided when not necessary. Silicon is used for the semiconductor layer 496. A method for forming the semiconductor layer 496 is similar to that in Embodiment Mode 5.

  As the semiconductor layer 496, a crystalline semiconductor film obtained by crystallizing an amorphous semiconductor film is used. For the crystallization, the method described in Embodiment Mode 1 may be used. The semiconductor layer 496 includes an impurity region 497 and a channel formation region 498 that function as a source region or a drain region. An impurity element imparting N-type (an element belonging to Group 15 such as phosphorus or arsenic) or an impurity element imparting P-type (such as boron or aluminum) is added to the impurity region 497. For introduction of impurities, a method using a diffusion source, an ion implantation method, or the like may be used. Although not shown, it is preferable to form an LDD region between the impurity region 497 and the channel formation region 498. The insulating layers 483 and 484 can be formed in a manner similar to that of the insulating layer 482.

  The insulating layers 485 and 486 are formed as a single layer or stacked layers using an inorganic material or an organic material by an SOG (spin-on-glass) method, a droplet discharge method, a screen printing method, or the like. For example, the insulating layer 485 may be formed using silicon oxynitride, and the insulating layer 486 may be formed using silicon nitride oxide. Further, similarly to the insulating layer 482, the insulating layer 483, and the insulating layer 484, they may be formed by a sputtering method, a plasma CVD method, or the like.

  The floating gate layer 489, the conductive layer 487, and the conductive layer 499 are formed using a conductive material. For the formation, a CVD method, a sputtering method, a droplet discharge method, or the like may be used. Further, it may be formed of a single layer or may be formed by stacking.

  The insulating layer 495 is formed as a single layer or a stacked layer using an inorganic material or an organic material by an SOG (spin-on-glass) method, a droplet discharge method, a screen printing method, or the like, similarly to the insulating layers 485 and 486. Similarly to the insulating layer 482, the insulating layer 483, and the insulating layer 484, they may be formed by a sputtering method, a plasma CVD method, or the like.

  In the same manner as in Embodiment Mode 2, the electrode layer 503 and the electrode layer 504 are formed in the region where the conductive layer 487 is exposed by the screen printing method. After the electrode layer is formed, each element is cut.

  In the illustrated configuration, only the transistor is formed, but the present invention is not limited to this configuration. Elements provided over the substrate 480 may be adjusted as appropriate depending on the application of the semiconductor device. For example, an erase voltage control circuit may be mounted. Other elements such as a resistance element and a capacitance element may be formed as necessary.

An example of a circuit diagram of the above-described flash memory is shown in FIG. Write and read operations are performed using the word lines W _{1 to} W ₇ and the bit lines B _{1 to} B ₄ . The word line and the bit line are connected to a circuit for controlling each operation. Or you may connect to the wiring extended | stretched to the circuit which controls each operation | movement by a next process. The word line is connected to the gate electrode in the memory element, and the bit line is connected to the source electrode or the drain electrode in the memory element. A region 501 surrounded by a dotted line corresponds to a unit memory element.

  Although not shown, it is possible to mount a device having a more complicated circuit configuration in a small size by adopting a multilayer wiring structure.

  Although only the NOR flash memory has been described here, the present invention can of course be applied to a NAND flash memory.

  As described above, a TFT substrate used for a semiconductor device such as a flash memory can be formed by applying the present invention. By applying the present invention, the size of the crystal grain of the semiconductor layer can be increased and the position where the grain boundary is formed can be controlled. Therefore, the number of grain boundaries existing in the channel length direction is small, A polycrystalline semiconductor layer formed by large crystal grains can be obtained. Accordingly, a TFT with high mobility in the semiconductor layer can be formed.

  In addition, according to the present invention, the mobility of the semiconductor layer of the TFT is improved, so that a TFT having favorable electrical characteristics can be manufactured.

  Since the present invention can be applied to manufacture a TFT having good electrical characteristics, a circuit element with higher functionality than conventional ones can be formed. As a result, a semiconductor device with higher added value than conventional can be manufactured on a glass substrate.

<Embodiment 7>
The present invention can also be applied to a photoelectric conversion device having a crystalline semiconductor layer. One example will be described with reference to FIG.

  Note that a photoelectric conversion element refers to a thin film stack having one photoelectric conversion layer, and a photoelectric conversion device is a semiconductor device configured by combining one or a plurality of photoelectric conversion elements or other elements. Say. For example, a photoelectric conversion device having sensitivity from ultraviolet rays to infrared rays is generally called an optical sensor. The photoelectric conversion element is mounted on a display device, for example, and is used for detecting ambient brightness and adjusting display luminance. In addition to the brightness of the surroundings, the brightness of the display device can be adjusted by detecting the brightness of the display device using an optical sensor. Specifically, the brightness of the backlight of the liquid crystal display device is detected by an optical sensor, and the brightness of the display screen is adjusted.

  The photoelectric conversion device is also called a photodiode. Photodiodes are roughly classified into four types. That is, they are pn type, pin type, Schottky type, and avalanche type. A pn-type photodiode is configured by a photoelectric conversion element in which a p-type semiconductor and an n-type semiconductor are joined, and a pin-type photodiode is configured by sandwiching an intrinsic semiconductor between a pn-type p-type semiconductor and an n-type semiconductor. The pn type has a small dark current but a low response speed. The pin type has a high response speed but a large dark current. Here, a p-type semiconductor is a semiconductor in which holes are mainly used as carriers used for transporting charges due to a lack of electrons, and an n-type semiconductor is a charge due to the presence of excess electrons. A semiconductor in which electrons are mainly used as a carrier used for transporting the semiconductor, and an intrinsic semiconductor is a semiconductor composed of a high-purity semiconductor material. A Schottky photodiode is a photoelectric conversion element in which a gold thin film layer is formed in place of a p-type semiconductor layer and is joined to an n layer. An avalanche photodiode is a light-emitting diode by applying a reverse bias voltage. This is a high-speed and high-sensitivity photoelectric conversion element in which the current is doubled. In the present embodiment, the pin type will be described.

  27 includes a TFT 531A and a TFT 531B formed over a substrate 530, and a color filter layer 534A and a color filter layer 534B are included in the photoelectric conversion element portion 532A and the photoelectric conversion element portion 532B formed over the interlayer insulating layer 533. A cross-sectional view of a photoelectric conversion device including a light shielding layer 535C and a light shielding layer 535D made of the same material as the first conductive layer 535A and the first conductive layer 535B in the photoelectric conversion element portion 532A and the photoelectric conversion element portion 532B is shown. The first conductive layer 535A, the light shielding layer 535C, the first conductive layer 535B, and the light shielding layer 535D shield the light so that light incident on the photoelectric conversion layers from the end portions of the photoelectric conversion element portion 532A and the photoelectric conversion element portion 532B is blocked. Only light that has passed through the color filter layer 534A and the color filter layer 534B is incident on each photoelectric conversion layer. For this reason, the photoelectric conversion element portion 532A and the photoelectric conversion element portion 532B function as a color sensor. In addition, the color filter layer 534A, the color filter layer 534B, the overcoat layer 536A, and the overcoat layer 536B also function as a protective layer. The overcoat layer 536A and the overcoat layer 536B have a function of protecting the various impurity elements contained in the color filter layer 534A and the color filter layer 534B from diffusing into the photoelectric conversion layers. The second conductive layer 540 over the insulating layer 539 is connected to a contact electrode that is electrically connected to an external circuit.

  By applying the present invention to such a photoelectric conversion device, a photoelectric conversion device with high conversion efficiency can be manufactured.

  As described above, the present invention can be applied to form a photoelectric conversion device. By applying the present invention, the size of the crystal grain of the semiconductor layer can be increased and the position where the grain boundary is formed can be controlled. Therefore, the number of grain boundaries existing in the channel length direction is small and the size is large. A polycrystalline semiconductor layer formed of crystal grains can be obtained. Accordingly, a TFT with high carrier mobility can be formed.

  In addition, according to the present invention, the mobility of the semiconductor layer of the TFT is improved, so that a TFT having favorable electrical characteristics can be manufactured.

  Since a TFT having good electrical characteristics can be manufactured, a circuit element with higher functionality than conventional ones can be formed. As a result, a semiconductor device with higher added value than conventional can be manufactured on a glass substrate.

<Embodiment 8>
The present invention can be applied to form a CPU (Central Processing Unit) on an insulating substrate.

  FIG. 28 shows a block diagram of the CPU according to the present embodiment. The CPU is a CISC (Complex Instruction Set Computer) having a standard configuration including an arithmetic unit 601 (ALU: Arithmetic and Logic Unit), a general-purpose register 602, an instruction analysis unit 603, and the like.

  In particular, by forming a highly integrated circuit such as a CPU over a flexible substrate such as a plastic substrate, a lightweight semiconductor device having excellent impact resistance and flexibility can be manufactured.

  As described above, the present invention can be applied to form a CPU. By applying the present invention, the crystal grain size of the semiconductor layer can be increased and the position where the grain boundary is formed can be controlled. Therefore, the number of grain boundaries existing in the channel length direction is small, A polycrystalline semiconductor layer formed by large crystal grains can be obtained. Accordingly, a TFT with high mobility in the semiconductor layer can be formed.

  In addition, since the carrier mobility of the TFT is improved by the present invention, a TFT having good electrical characteristics can be manufactured.

  Since the present invention can be applied to manufacture a TFT having good electrical characteristics, a circuit element with higher functionality than conventional ones can be formed. As a result, a semiconductor device with higher added value than conventional can be manufactured on a glass substrate.

<Embodiment 9>
Various display devices can be manufactured by applying the present invention. That is, the present invention can be applied to various electronic devices in which these display devices are incorporated in a display portion.

  Such electronic devices include video cameras, digital cameras, projectors, head mounted displays (goggles type displays), car navigation systems, car stereos, personal computers, game machines, personal digital assistants (mobile computers, mobile phones, electronic books, etc.) ), An image reproducing device including a recording medium (specifically, an apparatus including a display capable of reproducing a recording medium such as Digital Versatile Disc (DVD) and displaying the image). Examples thereof are shown in FIG.

  FIG. 29A illustrates a computer, which includes a main body 711, a housing 712, a display portion 713, a keyboard 714, an external connection port 715, a pointing mouse 716, and the like. According to the present invention, a semiconductor film with high mobility can be formed; therefore, a computer that displays an image with higher function and higher image quality can be completed.

  FIG. 29B shows an image reproducing device (specifically, a DVD reproducing device) provided with a recording medium, which includes a main body 721, a housing 722, a first display portion 723, a second display portion 724, a recording medium ( DVD, etc.) includes a reading unit 725, operation keys 726, a speaker unit 727, and the like. The first display unit 723 mainly displays image information, and the second display unit 724 mainly displays character information. According to the present invention, since a semiconductor film with high mobility can be formed, an image reproducing device that displays an image with higher function and higher image quality can be completed.

  FIG. 29C illustrates a mobile phone, which includes a main body 731, an audio output portion 732, an audio input portion 733, a display portion 734, operation switches 735, an antenna 736, and the like. According to the present invention, since a semiconductor film with high mobility can be formed, a mobile phone displaying a higher-functionality and high-quality image can be completed.

  FIG. 29D illustrates a video camera, which includes a main body 741, a display portion 742, a housing 743, an external connection port 744, a remote control receiving portion 745, an image receiving portion 746, a battery 747, an audio input portion 748, operation keys 749, and an eyepiece. Part 750 and the like. According to the present invention, since a semiconductor film with high mobility can be formed, a video camera capable of displaying a higher-function and high-quality image can be completed. This embodiment mode can be freely combined with the above embodiment modes.

<Embodiment 10>
The semiconductor device 510 to which the present invention is applied can be used for various articles and systems by utilizing the function of transmitting and receiving electromagnetic waves. Articles include, for example, keys (see FIG. 30A), banknotes, coins, securities, bearer bonds, certificates (driver's license, resident's card, etc., see FIG. 30B), books, Containers (such as petri dishes, see FIG. 30C), packaging containers (such as wrapping paper and bottles, see FIGS. 30E and F), recording media (discs, video tapes, etc.), vehicles (bicycles) Etc.), accessories (such as bags and glasses, see FIG. 30D), foods, clothing, daily necessities, electronic devices (liquid crystal display devices, EL display devices, television devices, portable terminals, etc.) and the like. The semiconductor device of the present invention is fixed or mounted by being attached or embedded on the surface of an article having various shapes as described above. The system is an article management system, an authentication function system, a distribution system, or the like. By using the semiconductor device of the present invention, the system can be enhanced in function, multifunctional, and added value. This embodiment can be freely combined with any of the other embodiments.

  A polycrystalline semiconductor film formed by applying the present invention and using the method described in Embodiment Mode 1 will be described below.

  A glass substrate was used as the substrate. First. A base film was formed on a glass substrate. The base film has a stacked structure, and a silicon nitride oxide film formed with a thickness of 50 nm is stacked over a silicon oxynitride film formed with a thickness of 100 nm by a CVD method. The CVD method was used for the formation.

Next, an amorphous silicon film was formed. The amorphous silicon film was formed by CVD using silane (SiH ₄ ). The film thickness of the amorphous silicon film was 66 nm.

  Next, a dehydrogenation step was performed before the amorphous silicon film was crystallized. In the dehydrogenation step, heating was performed at 500 ° C. for 1 hour in a nitrogen atmosphere, followed by heating at 550 ° C. for 4 hours. Thereafter, the oxide film on the surface was removed with dilute hydrofluoric acid.

  Next, the amorphous silicon film was crystallized. In this embodiment, laser light was used for crystallization of the amorphous silicon film.

  The laser beam used in this example had an oscillation frequency of 80 MHz (error range ± 1 MHz), a wavelength of 532 nm, and an output power of the laser device of 18.41 W. The scanning speed of the laser beam was 210 mm per second. Moreover, the power was made variable using an attenuator. The laser beam to be irradiated was a linear laser, the short axis direction was 10 μm to 15 μm, and the long axis direction was 500 μm.

  In addition, the laser beam of a present Example is an example and this invention is not limited to this. For example, the oscillation frequency can be freely set as long as it is 10 MHz or higher.

  Further, in this example, laser irradiation was performed through a phase shift mask having a stripe pattern shown in FIG. FIG. 4 shows the phase shift mask used in this example. A quartz substrate on which a stripe pattern was formed by alternately appearing a concave region having a width k1 and a convex region having a width k2 was used. When the laser beam passes through the phase shift mask, the phase of the laser beam that has passed through the convex portion 121 is not reversed, and the phase of the laser beam that has passed through the concave portion 122 is inverted by 180 °. As a result, it was possible to obtain a laser beam having an intensity distribution reflecting the pattern of the phase shift mask.

  In this example, laser light was irradiated using an optical system apparatus having a positional relationship as shown in the schematic diagram of FIG. By using an optical system apparatus as shown in FIG. 5, the beam shape could be formed into a linear shape.

  The linear laser beam obtained as described above reaches the irradiated surface through the phase shift mask. For this reason, the intensity distribution of the laser beam has a pattern corresponding to the stripe pattern of the phase shift mask. In this embodiment, k1 and k2 are 3 μm.

  As described in the first embodiment, the scanning direction of the laser beam is inclined by an angle θ without making the scanning direction (short axis direction) of the linear beam and the stripe pattern of the phase shift mask parallel. This is to secure sufficient energy for the amorphous semiconductor film to be completely melted at a position where the luminance of the irradiated laser beam is minimized. In this example, since θ could not be adjusted strictly, it was adjusted so as to be within an appropriate angle range. The distance d between the phase shift mask and the amorphous semiconductor film was 800 μm.

  Using the scanning electron microscope (SEM (Scanning Electron Microscope)) method and the EBSP (Electron Back Scatter Diffraction Pattern) method, the sample surface is observed and the crystal orientation is measured for the semiconductor film crystallized as described above. went. The results are shown in FIG. 31 and FIG. FIG. 31A is an SEM image of a semiconductor film crystallized by applying the present invention using a phase shift mask. FIG. 31B is an SEM image (etched SEM image) obtained after etching the semiconductor film with a predetermined chemical solution. FIG. 32A shows a measurement result by an EBSP method of a semiconductor film crystallized using a phase shift mask by applying the present invention, and FIG. 32B is crystallized without using a phase shift mask. It is a measurement result by the EBSP method about a semiconductor film. Comparing FIG. 32A and FIG. 32B, in FIG. 32B to which the crystallization method is applied, there are an infinite number of small crystal grains in irregular directions. On the other hand, in FIG. 32A in which crystallization is performed by applying the present invention, it can be confirmed that a plurality of elongated crystal grain regions occupy most. Further, the major axis direction of the crystal grains is generally aligned in one direction. A crystal having a large grain size present on the semiconductor film is about 20 μm to 50 μm in the major axis direction. In this way, the crystal has a large particle size and forms a crystal band. In addition, it can be confirmed that the crystal grain boundaries (crystal band boundaries) running in the major axis direction of the crystal are aligned in one direction and have a constant period of about 3 μm in the minor axis direction of the crystal grains. It is clear that such crystal grains occupy at least 90% of the area of the semiconductor film.

  As described above, by applying the present invention, the crystal nucleation site is controlled, and it is formed by a crystal band composed of crystal grains having a large grain size with a small number of grain boundaries existing in one direction. A polycrystalline semiconductor film can be obtained. By manufacturing a crystalline semiconductor film in this manner, a semiconductor device having a high mobility with few grain boundaries in the channel length direction can be obtained.

  In addition, by using a region 800 having a grain boundary only in one direction or a region 801 having no grain boundary shown in FIG. 32 as a semiconductor layer of the thin film transistor, a thin film transistor having favorable electrical characteristics can be manufactured. The region 800 is a rectangular region having a major axis direction of 10 μm and a minor axis direction of 5 μm.

  By forming a thin film transistor using the region 800, a thin film transistor has a plurality of crystal bands, and a line drawn from an arbitrary point (point Q) in the Y direction once from the end of the region 800 to the boundary of the grain boundary or the crystal band. Can reach the other end without crossing. By using such a region 800 as a semiconductor layer of a thin film transistor, a thin film transistor having favorable electrical characteristics can be manufactured.

  The region 801 is composed of one crystal band, and there is no crystal grain boundary or crystal band boundary in the region. By using such a region 801 as a semiconductor layer of a thin film transistor, a thin film transistor having extremely good electrical characteristics can be manufactured as in the case of using a single crystal semiconductor.

  Among the crystalline semiconductor layers produced by applying the present invention and having a large crystal size, electrical characteristics are dramatically improved compared to conventional thin film transistors, especially by fabricating thin film transistors using one crystal grain. A thin film transistor can be manufactured. According to FIG. 32, the width of the crystal band is about 3 μm, the length of the crystal grain in the crystal band is larger than the width of the crystal grain, and the size of the crystal grain is about 3 μm wide and about 20 μm long. Therefore, a thin film transistor having such a size can be manufactured.

  Therefore, by applying the present invention, a high-function, high-value-added semiconductor device can be manufactured over a glass substrate.

  Note that the form of the sample and the crystallization conditions described in this example are examples for carrying out the present invention, and the present invention is not limited only to the conditions of this example.

8A to 8D illustrate a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate a fiber laser used for manufacturing a semiconductor device of the present invention. 3A and 3B illustrate an active gain fiber used for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate a phase shift mask used for manufacturing a semiconductor device of the present invention. 8A and 8B illustrate an optical system which can be used for manufacturing a semiconductor device of the present invention. The profile of the laser beam through the phase shift mask shown in FIG. 8A to 8D illustrate a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate a laser beam irradiation method in a method for manufacturing a semiconductor device of the present invention. A profile showing changes in the brightness of laser light. 8A and 8B illustrate an optical system which can be used for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate a method for manufacturing a TFT to which the present invention is applied. 4A and 4B illustrate a method for manufacturing a TFT to which the present invention is applied. 4A and 4B illustrate a method for manufacturing a TFT to which the present invention is applied. 4A and 4B illustrate a method for manufacturing a TFT to which the present invention is applied. 4A and 4B illustrate a manufactured TFT to which the present invention is applied. 4A and 4B each illustrate a pixel circuit of a display device to which the present invention is applied. 4A and 4B illustrate a state where a manufactured TFT to which the present invention is applied is applied to an EL element. 4A and 4B illustrate an EL element to which the present invention is applied. 4A and 4B illustrate an EL element to which the present invention is applied. FIG. 6 illustrates a liquid crystal panel to which the present invention is applied. FIG. 6 illustrates a liquid crystal panel to which the present invention is applied. 8A to 8D illustrate a method for manufacturing a semiconductor device of the present invention. 8A to 8D illustrate a method for manufacturing a semiconductor device of the present invention. 6A and 6B illustrate a semiconductor device to which the present invention is applied. 6A and 6B illustrate a circuit of a semiconductor device to which the present invention is applied. 6A and 6B illustrate a semiconductor device to which the present invention is applied. 6A and 6B illustrate a semiconductor device to which the present invention is applied. 6A and 6B illustrate a semiconductor device to which the present invention is applied. 6A and 6B illustrate a semiconductor device to which the present invention is applied. 6A and 6B illustrate a semiconductor device to which the present invention is applied. The figure which shows the observation result of the semiconductor film formed by applying this invention. The figure which shows the analysis result of the semiconductor film formed by applying this invention.

Explanation of symbols

100 Glass substrate 101 Base film 102 Amorphous semiconductor film 103 Polycrystalline semiconductor layer 104 Crystal band 105 Boundary 111 Laser diode 112 Excitation light combiner 113 Fiber Bragg grating 114 Active gain fiber 115 Fiber Bragg grating 116 Output port 117 Fiber cable 118 Core 119 Cladding 121 Convex part 122 Concave part 130 Laser oscillator 131 Attenuator 132 Slit 133 Cylindrical lens 134 Rear focal point 135 Rear focal length 136 Cylindrical lens 137 Phase shift mask 138 Irradiated surface 133a Cylindrical lens surface 136a Cylindrical lens surface 140 Rear focal point 141 Short Axial length 142 Rear focal length 150 Linear laser beam 151 Phase Optical mask 165 Optical system 166 Mask 165 Optical system 166 Stage 167 Substrate 168 Light receiving element 169 Light receiving element 170 Mask holder 180 Glass substrate 181 Underlayer 182 Silicon nitride film 183 Silicon oxide Film 185 polycrystalline silicon layer 186 silicon oxide film 187 insulating layer 188 silicon oxide film 189 silicon nitride film 190 electrode layer 191 insulating layer 192 silicon nitride film 193 silicon oxide film 194A opening 194B opening 195 electrode layer 196 insulating layer 197 opening 198 Electrode layer 200 Substrate 201 Underlayer 202 Electrode layer 203 Insulating layer 204 Polycrystalline semiconductor layer 205 Insulating layer 206 Electrode layer 207 Insulating layer 208 Electrode layer 209 Opening 210 Opening 301 TF
302 Capacitor 303 TFT
304 TFT
305 Light emitting element 306 TFT
310 Signal line 311 Power line 312 Power line 313 Power line 314 Scan line 315 Power line 316 Scan line 341 Switching TFT
342 Capacitance element 343 Driving TFT
344 Light emitting element 345 TFT
350 Signal line 351 Power line 352 Power line 353 Scan line 354 Scan line 361 TFT
362 Light emitting layer 371 TFT
372 Light emitting layer 381 TFT
382 Light emitting layer 390 Electrode layer 392 Electroluminescent layer 393 Electrode layer 394 Insulating layer 394a Insulating layer 394b Insulating layer 400 Electrode layer 401 Luminescent material 402 Electroluminescent layer 403 Electrode layer 404 Insulating layer 404a Insulating layer 404b Insulating layer 410 Substrate 411 Pixel portion 412 Pixel 416 FPC
417 Driver IC
420 Substrate 421 Pixel portion 422 Scan line side driver circuit 430 Substrate 431 Pixel portion 432 Signal line driver circuit 434 Scan line driver circuit 450 Region 451 Substrate 459 Insulating layer 460 Transistor 461 Insulating layer 462 Insulating layer 463 Insulating layer 464 Conducting layer 465 Insulating layer 466 Polycrystalline semiconductor layer 467 Conductive layer 468 Impurity region 469 Channel formation region 470 Stack 480 Substrate 482 Insulating layer 483 Insulating layer 484 Insulating layer 485 Insulating layer 486 Insulating layer 487 Conducting layer 489 Floating gate layer 495 Insulating layer 496 Semiconductor layer 497 Impurity Region 498 Channel formation region 499 Conductive layer 500 Memory element 501 Region 503 Electrode layer 504 Electrode layer 510 Semiconductor device 511 Arithmetic processing circuit 513 Memory circuit 514 Antenna 518 Power supply circuit 520 Demodulation circuit 521 Modulation circuit 522 reader / writer 530 substrate 531A TFT
531B TFT
532A Photoelectric conversion element part 532B Photoelectric conversion element part 533 Interlayer insulating layer 534A Color filter layer 534B Color filter layer 535A Conductive layer 535B Conductive layer 535C Light shielding layer 535D Light shielding layer 536A Overcoat layer 536B Overcoat layer 539 Insulating layer 540 Conductive layer 601 Calculation Device 602 General-purpose register 603 Command analysis unit 711 Main unit 712 Case 713 Display unit 714 Keyboard 715 External connection port 716 Pointing mouse 721 Main unit 722 Case 723 Display unit 724 Display unit 725 Recording medium (DVD etc.) reading unit 726 Operation key 727 Speaker Unit 731 main unit 732 audio output unit 733 audio input unit 734 display unit 735 operation switch 736 antenna 741 main unit 742 display unit 743 casing 744 external connection port 745 Remote control unit 746 Image receiving unit 747 Battery 748 Audio input unit 749 Operation key 750 Eyepiece 800 region 801 region

Claims (2)

A method for manufacturing a thin film transistor in which an amorphous semiconductor film formed over a substrate having an insulating surface is crystallized by irradiating a continuous wave laser beam or a pseudo continuous wave laser beam,
Forming an amorphous semiconductor film;
Irradiating the laser beam onto the amorphous semiconductor film by spatially modulating the light intensity of the laser light formed into a linear shape by a light intensity modulating means that periodically modulates the laser light in the long axis direction. The amorphous semiconductor film is completely melted over the entire irradiation region of the laser light to form a polycrystalline semiconductor film having a crystal band grown in a direction coinciding with the scanning direction of the laser light , and
The light intensity modulation means is a phase shift mask having irregularities in a direction inclined by a certain angle with respect to a direction parallel to the scanning direction of the laser light,
The value of the light intensity periodically modulated in the major axis direction of the laser beam has a local maximum value and a local minimum value alternately existing at regular intervals in the major axis direction,
The method for manufacturing a thin film transistor , wherein the angle is adjusted so that the minimum value is 80% or more of the maximum value . A method for manufacturing a thin film transistor in which an amorphous semiconductor film formed over a substrate having an insulating surface is crystallized by irradiating a continuous wave laser beam or a pseudo continuous wave laser beam,
Forming an amorphous semiconductor film;
Irradiating the laser beam onto the amorphous semiconductor film by spatially modulating the light intensity of the laser light formed into a linear shape by a light intensity modulating means that periodically modulates the laser light in the long axis direction. The amorphous semiconductor film is completely melted over the entire laser light irradiation region to form a polycrystalline semiconductor film having a crystal band grown in a direction that coincides with the scanning direction of the laser light,
Impurity is introduced into part of the polycrystalline semiconductor film to form a source region and a drain region,
At least one of the crystal bands included in the polycrystalline semiconductor film has a source region, a channel formation region, and a drain region in the crystal band,
The channel length direction of the channel forming region is substantially parallel to the long axis direction of the crystal band , and can draw a line extending from the source region to the drain region without intersecting the boundary of the crystal band , and
The light intensity modulation means is a phase shift mask having irregularities in a direction inclined by a certain angle with respect to a direction parallel to the scanning direction of the laser light,
The value of the light intensity periodically modulated in the major axis direction of the laser beam has a local maximum value and a local minimum value alternately existing at regular intervals in the major axis direction,
The method for manufacturing a thin film transistor wherein the minimum value, characterized that you adjust the angle so as to be 80% or more of the maximum value.

Images