JP4912627B2 - 薄膜集積回路の作製方法 - Google Patents
薄膜集積回路の作製方法 Download PDFInfo
- Publication number
- JP4912627B2 JP4912627B2 JP2005185380A JP2005185380A JP4912627B2 JP 4912627 B2 JP4912627 B2 JP 4912627B2 JP 2005185380 A JP2005185380 A JP 2005185380A JP 2005185380 A JP2005185380 A JP 2005185380A JP 4912627 B2 JP4912627 B2 JP 4912627B2
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- JP
- Japan
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- region
- layer
- substrate
- insulating film
- thin film
- Prior art date
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- Expired - Fee Related
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- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Thin Film Transistor (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005185380A JP4912627B2 (ja) | 2004-06-24 | 2005-06-24 | 薄膜集積回路の作製方法 |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004186543 | 2004-06-24 | ||
| JP2004186543 | 2004-06-24 | ||
| JP2005185380A JP4912627B2 (ja) | 2004-06-24 | 2005-06-24 | 薄膜集積回路の作製方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2006041502A JP2006041502A (ja) | 2006-02-09 |
| JP2006041502A5 JP2006041502A5 (enExample) | 2008-05-15 |
| JP4912627B2 true JP4912627B2 (ja) | 2012-04-11 |
Family
ID=35906104
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005185380A Expired - Fee Related JP4912627B2 (ja) | 2004-06-24 | 2005-06-24 | 薄膜集積回路の作製方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP4912627B2 (enExample) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5204959B2 (ja) | 2006-06-26 | 2013-06-05 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| JP5264016B2 (ja) * | 2006-06-30 | 2013-08-14 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| KR101430587B1 (ko) * | 2006-09-20 | 2014-08-14 | 더 보오드 오브 트러스티스 오브 더 유니버시티 오브 일리노이즈 | 전사가능한 반도체 구조들, 디바이스들 및 디바이스 컴포넌트들을 만들기 위한 릴리스 방안들 |
| EP3729499A4 (en) * | 2017-12-22 | 2021-12-15 | Board of Regents, The University of Texas System | NANOSCALE ALIGNED THREE-DIMENSIONAL STACKED INTEGRATED CIRCUIT |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4748859B2 (ja) * | 2000-01-17 | 2011-08-17 | 株式会社半導体エネルギー研究所 | 発光装置の作製方法 |
| EP1455394B1 (en) * | 2001-07-24 | 2018-04-11 | Samsung Electronics Co., Ltd. | Transfer method |
-
2005
- 2005-06-24 JP JP2005185380A patent/JP4912627B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2006041502A (ja) | 2006-02-09 |
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