JP4883621B2 - 半導体集積回路 - Google Patents

半導体集積回路 Download PDF

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Publication number
JP4883621B2
JP4883621B2 JP2006252772A JP2006252772A JP4883621B2 JP 4883621 B2 JP4883621 B2 JP 4883621B2 JP 2006252772 A JP2006252772 A JP 2006252772A JP 2006252772 A JP2006252772 A JP 2006252772A JP 4883621 B2 JP4883621 B2 JP 4883621B2
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Japan
Prior art keywords
circuit
latch circuit
data
signal
clock
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Expired - Fee Related
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JP2006252772A
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Japanese (ja)
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JP2008078754A (ja
JP2008078754A5 (enExample
Inventor
雄介 菅野
雅文 小野内
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Renesas Electronics Corp
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Renesas Electronics Corp
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Priority to JP2006252772A priority Critical patent/JP4883621B2/ja
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  • Static Random-Access Memory (AREA)
  • Logic Circuits (AREA)
JP2006252772A 2006-09-19 2006-09-19 半導体集積回路 Expired - Fee Related JP4883621B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2006252772A JP4883621B2 (ja) 2006-09-19 2006-09-19 半導体集積回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006252772A JP4883621B2 (ja) 2006-09-19 2006-09-19 半導体集積回路

Publications (3)

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JP2008078754A JP2008078754A (ja) 2008-04-03
JP2008078754A5 JP2008078754A5 (enExample) 2009-03-05
JP4883621B2 true JP4883621B2 (ja) 2012-02-22

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JP2006252772A Expired - Fee Related JP4883621B2 (ja) 2006-09-19 2006-09-19 半導体集積回路

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JP (1) JP4883621B2 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5008612B2 (ja) * 2008-06-27 2012-08-22 シャープ株式会社 半導体集積回路及びその制御方法
US7961502B2 (en) * 2008-12-04 2011-06-14 Qualcomm Incorporated Non-volatile state retention latch
JP2010282411A (ja) * 2009-06-04 2010-12-16 Renesas Electronics Corp 半導体集積回路、半導体集積回路の内部状態退避回復方法
KR102112367B1 (ko) * 2013-02-12 2020-05-18 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
JP6602278B2 (ja) * 2016-09-16 2019-11-06 株式会社東芝 半導体装置
WO2019142546A1 (ja) * 2018-01-16 2019-07-25 パナソニックＩｐマネジメント株式会社 半導体集積回路
CN112311383B (zh) * 2020-12-18 2025-03-11 福建江夏学院 实现电源监控高效低功耗的电路及工作方法
CN113176749B (zh) * 2021-04-23 2024-06-04 广东天波信息技术股份有限公司 一种避免处理器上电过程中i/o口闩锁的电路

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003215214A (ja) * 2002-01-29 2003-07-30 Matsushita Electric Ind Co Ltd 半導体集積回路装置
US7221205B2 (en) * 2004-07-06 2007-05-22 Arm Limited Circuit and method for storing data in operational, diagnostic and sleep modes
US7154317B2 (en) * 2005-01-11 2006-12-26 Arm Limited Latch circuit including a data retention latch
KR100630740B1 (ko) * 2005-03-03 2006-10-02 삼성전자주식회사 스캔 기능을 갖는 고속 펄스 기반의 리텐션 플립플롭

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JP2008078754A (ja) 2008-04-03

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