JP4842864B2 - Electronic device and manufacturing method thereof - Google Patents

Description

  The present invention relates to an electronic device and a method of manufacturing the same, and more particularly, a plurality of holes are filled with solder balls having the same diameter, and then heat-treated to cause the solder balls to flow into the holes and join the electrodes in the holes. The present invention relates to an electronic device configured to form a solder bump and a manufacturing method thereof.

  For example, as one method of forming a ball grid array (BGA) ball used to connect a bare chip and a substrate or a package substrate and a mother board, a plurality of electrodes are formed on the substrate and then communicated with the electrodes. A solder resist with holes is formed, and solder balls are mounted in the openings of each hole, and the solder balls are melted by heat treatment (reflow) and joined to the electrodes in the holes, and solder bumps are formed on the surface of the solder resist. A manufacturing method for forming a protrusion is known (see, for example, Patent Document 1).

  Usually, the inner diameters of the holes communicating with the plurality of electrodes formed on the substrate are formed to have the same diameter, and the solder balls having the same diameter are used.

However, in recent years, it has been studied to set the diameters of a plurality of electrodes to different dimensions. For example, in the central portion of the electrode formation region where the electrodes are arranged in a grid shape, a relatively large diameter power supply or GND is used. An electrode arrangement pattern is conceivable in which signal electrodes (hereinafter, both electrodes are collectively referred to as a power supply electrode) are arranged, and signal electrodes having a smaller diameter than the power supply electrode are arranged at narrow intervals around the electrodes. As a result, more signal electrodes can be disposed than when the signal electrodes are formed to have the same diameter as the power supply electrodes, and the impedance of the power supply electrodes can be reduced.
JP-A-7-176567

  When forming solder bumps on the electrodes formed on the substrate, the height of the solder bumps formed from the viewpoint of mountability from the substrate surface must be all equal. Even when solder bumps are formed on a plurality of electrodes having different diameters, the height of each solder bump to be formed from the substrate surface needs to be equal.

  Therefore, as a method of forming solder bumps having the same height from the substrate surface for a plurality of electrodes having different diameters, each solder ball having a different diameter corresponding to the inner diameter of each hole is mounted on the opening of each hole. A method of performing heat treatment and a method of mounting solder balls having the same diameter in holes having different inner diameters are conceivable.

  First, the problem in the former case will be described. When heat treatment is performed on solder balls having different diameters according to the inner diameter of each hole, the molten solder flows into the hole and is joined to the electrode surface formed at the bottom of the hole, which is more than the volume of the hole. A volume of solder is formed on the surface of the solder resist as solder bumps. In this case, the protrusion height of the solder bump can be made substantially constant by selecting solder balls having different diameters according to the inner diameter of each hole.

  However, when preparing a plurality of types of solder balls having different diameters according to the inner diameter of each hole, it is difficult to identify the difference between the solder balls because the diameter of the solder balls is as fine as several tens of μm. Therefore, in the process of mounting solder balls having a diameter corresponding to the inner diameter of each hole, it is difficult to check whether the diameter of the solder ball matches the inner diameter of the hole when the solder ball is surface-mounted. There is a problem in that it takes a lot of labor to mount solder balls having different diameters in corresponding inner diameter holes.

  On the other hand, in the latter case where solder balls having the same diameter are mounted in the holes of a plurality of electrodes having different inner diameters, it becomes possible to solve the problem in the former case of preparing solder balls having different diameters as described above. However, the following problems arise.

Next, a method for manufacturing the latter electronic device will be described with reference to FIGS. 1A to 1C. As shown in FIG. 1A, the electrode forming surface of the substrate is covered with a solder resist 10, and holes 16 and 18 communicating with the electrodes 12 and 14 are formed in the solder resist 10. In this electrode formation region, a relatively large-diameter electrode 12 (for example, a power supply electrode) is formed in the central portion, and a relatively small-diameter electrode 14 (for example, a signal wiring electrode) so as to surround the periphery thereof. Is formed.
As shown in FIG. 1B, electrodes 12 and 14 having different diameters are formed on a substrate 11 made of an insulating material. Note that Ni / Au electrode layers 17 and 19 made of a Ni layer and an Au layer are formed on the upper surfaces of the electrodes 12 and 14 made of Cu in order to improve the bonding with the solder. The Ni / Au electrode layers 17 and 19 are coated with a flux 18 for bonding the solder balls 20 (shown with a satin pattern in FIG. 1B), and then the solder balls 20 are placed thereon. The solder ball 20 has good wettability due to the flux 18.

  By the way, in the process of mounting the solder balls 20 in the holes 16 and 18, the solder balls 20 having the same diameter are mounted in the holes 16 and 18 having different inner diameters so that the solder balls having different diameters are opened in the holes. The work efficiency is improved compared to the method of mounting on the machine.

  However, when heat-treating the solder balls 20 having the same diameter into the holes 16 and 18 having different inner diameters, the volume of the holes 16 and 18 varies depending on the difference in the hole diameters 16 and 18 as shown in FIG. The protruding height of the bumps 22 and 24 varies depending on the hole diameter. For example, in the case of a large diameter such as the hole 16, the volume in the hole is large, so that the amount of solder remaining on the solder resist 10 is reduced, and the protrusion height H1 of the solder bump 22 is reduced accordingly. On the other hand, in the case of a small diameter such as the hole 18, since the volume in the hole is small, the amount of solder remaining on the solder resist 10 increases, and the protruding height H <b> 2 of the solder bump 24 increases.

  As described above, when the protruding heights of the solder bumps 22 and 24 are not constant, the solder bumps 22 having a low height may cause a connection failure between the solder bumps 24 having a high height. Therefore, the leveling process is performed after the heat treatment process. It was necessary and time-consuming, and it was difficult to increase production efficiency.

  SUMMARY OF THE INVENTION In view of the above circumstances, an object of the present invention is to provide an electronic device and a method for manufacturing the same that solve the above problems.

  In order to solve the above problems, the present invention has the following means.

The present invention includes an electrode forming step of forming an electrode on a substrate;
A solder resist forming step of forming a solder resist having a plurality of holes with different diameters on the substrate on which the electrodes are formed;
A bump forming step in which a plurality of the holes are filled with solder balls having the same diameter, and then heat-treated to join the solder balls to the electrodes through the holes to form solder bumps. A manufacturing method comprising:
In the electrode forming step, the electrodes having different thicknesses are formed in accordance with the inner diameter of the hole so that the height of the solder bump from the solder resist surface after the bump forming step is equalized. A method for manufacturing an electronic device.

  In addition, it is desirable that a large diameter hole among the plurality of holes is formed so that the electrode is thicker than a small diameter hole.

  It is desirable that the height of the electrode is changed by laminating an electrode layer according to the size of the inner diameter of the hole.

  Further, the present invention is characterized in that the number of the electrode layers is changed according to the size of the inner diameter of the hole and the thickness of the solder resist layer is selected.

  The electrode layer is preferably formed by a semi-additive method.

The present invention also includes a substrate on which a plurality of electrodes are formed,
A solder resist formed on the substrate and having a hole having a large diameter and a hole having a small diameter at a position facing the electrode;
Formed with solder balls having the same diameter, and having a plurality of solder bumps joined to the electrodes through the holes;
The thickness of the electrode facing the hole having a large diameter is made thicker than the electrode facing the hole having a small diameter so that the height of each solder bump from the surface of the solder resist is equal. It is an electronic device.

It is desirable that the electrodes have different thicknesses depending on the number of electrode layers stacked.
The present invention also includes a substrate on which a plurality of electrodes are formed,
A solder resist formed on the substrate and having a plurality of holes with different diameters at positions facing the electrodes;
It has a plurality of solder bumps joined to the electrodes through the holes,
The volume of each solder bump is the same,
The thickness of the electrode is varied according to the diameter of the hole so that the height of each solder bump from the surface of the solder resist becomes equal.

  According to the present invention, electrodes having different thicknesses are formed according to the inner diameter of the holes in the electrode forming step so that the heights of the solder bumps from the solder resist surface after the bump forming step are equal. Even if solder balls having the same diameter are loaded into a plurality of holes having different inner diameters facing each other, the amount of solder flowing into the holes is almost the same regardless of the inner diameter of the holes. For this reason, the height of the solder bump protruding from the solder resist can be made substantially the same regardless of the difference in the inner diameter of the hole, and further, the reliability of the solder bump can be improved by eliminating the conventional leveling process. Can be increased.

  The best mode for carrying out the present invention will be described below with reference to the drawings.

FIG. 2 is a longitudinal sectional view showing Embodiment 1 of the electronic device according to the present invention. As shown in FIG. 2, the electronic device 100 is a semiconductor device having a BGA (ball grid array) structure, for example, and electrodes 120 having different sizes by Cu plating on the electrode formation surface of the insulating layer 110 as a substrate. , 130 are formed. A solder resist 140 is coated on the surfaces of the insulating layer 110 and the electrodes 120 and 130.
Further, the solder resist 140 has holes 142 and 144 communicating with the electrodes 120 and 130, and in the holes 142 and 144, the upper surfaces of the electrodes 120 and 130 are formed of a Ni layer and an Au layer. / Au electrode layers 122 and 132 are formed.
The inner diameters D1 and D2 of the holes 142 and 144 are set so that D1 <D2 according to the size of the electrodes 120 and 130. For example, one electrode 120 is a signal electrode, and the other electrode 130 is a power supply electrode or a GND electrode.

The electrode 120 of the small hole 142 is formed by one electrode layer 124, whereas the electrode 130 of the large hole 144 is a laminate of two electrode layers 134 and 136. The thickness T2 of the electrode 130 is formed to be approximately twice as thick (higher) than the thickness T1 of the electrode 120 of the small-diameter hole 142 (T2> T1).
Furthermore, the solder bumps 152 and 154 that have flowed into the holes 142 and 144 in which the solder balls 150 (shown by alternate long and short dash lines in FIG. 2) are heat-treated (reflowed) are joined to the Ni / Au electrode layers 122 and 132. Is done. The solder ball 150 has a diameter D3 selected according to the volume of the holes 142 and 144, and has the same diameter D3 (D1 <D2 <D3).

  The volume of the small-diameter hole 142 is determined by the inner diameter D1 and the distance L1 (for example, 15 μm to 25 μm) from the surface of the Ni / Au electrode layer 122 to the upper surface of the solder resist 140. Similarly, the volume of the large-diameter hole 144 is determined by the inner diameter D2 and the distance L2 (for example, 5 μm to 15 μm) from the surface of the Ni / Au electrode layer 132 to the upper surface of the solder resist 140. In this embodiment, the large-diameter electrode 130 is formed by laminating two electrode layers 134 and 136, thereby reducing the depth (distance L 2) of the large-diameter hole 144 and reducing the small-diameter hole 142. The volume and the volume of the large-diameter hole 144 are set to be substantially the same. As a result, the volumes of the solder bumps 152 and 154 protruding from the surface of the solder resist 140 become substantially the same.

  Actually, since the curvature radii of the solder bumps 152 and 154 differ depending on the inner diameters of the holes 142 and 144, the volume of the large-diameter hole 144 is made slightly smaller than the volume of the small-diameter hole 142 based on the inner diameter difference. . The large-diameter electrode 130 is not limited to two layers, and three or more electrode layers may be stacked in accordance with the inner diameter difference between the holes 142 and 144.

  As a result, the heights H3 and H4 of the solder bumps 152 and 154 protruding from the surface of the solder resist 140 become substantially equal (H3≈H4). Therefore, according to the electronic device 100, the troublesome work of confirming solder balls having different diameters compared to the case where a plurality of solder balls having diameters corresponding to the inner diameters of the holes 142 and 144 is prepared is unnecessary. In addition to improving efficiency, it is also possible to eliminate the leveling process for aligning the protruding height of the solder bumps required when mounting solder balls having the same diameter in holes having different diameters. Reliability can be increased.

  Here, a method of manufacturing the electronic device 100 will be described with reference to FIGS. 3A to 3N. 3A to 3N are views for explaining a method (part 1 to part 14) for manufacturing the electronic device according to the first embodiment.

  The manufacturing method of the electronic device according to the first embodiment includes (a) an electrode forming step in which the electrodes 120 and 130 are formed on the insulating layer (substrate) 110, and (b) on the insulating layer 110 on which the electrodes 120 and 130 are formed. And a solder resist forming step of forming a solder resist 140 having a plurality of holes 142 and 144 having different diameters at positions facing the electrodes 120 and 130, and (c) a solder having the same diameter in the plurality of holes 142 and 144. And a bump forming step in which the solder balls 150 are joined to the electrodes 120 and 130 through the holes 142 and 144 to form solder bumps 152 and 154 by loading the balls 150 and then performing heat treatment.

  Further, in the first embodiment, the thicknesses of the solder bumps 152 and 154 after the bump forming process are different depending on the inner diameters of the holes 142 and 144 so that the heights from the surface of the solder resist 140 are equal. Next, the electrodes 120 and 130 are formed. That is, the small-diameter electrode 120 is formed by only one electrode layer 124, and the large-diameter electrode 130 is configured by laminating a plurality of layers (two layers in this embodiment) of electrode layers 134 and 136. The thicknesses of the electrodes 120 and 130 are set differently according to the inner diameters of the 142 and 144.

  As an electrode formation method in the present embodiment, for example, a semi-additive method is used, which is performed in the following procedure. The electrode forming step is performed by the following steps shown in FIGS. 3A to 3K.

  In FIG. 3A, first, a flat insulating layer 110 having a predetermined thickness is formed.

  In FIG. 3B, in order to promote the reduction reaction during the electroless Cu plating, a catalyst treatment is performed to adsorb palladium Pd on the surface (electrode formation surface) of the insulating layer 110 to promote Cu precipitation.

  In FIG. 3C, a Cu power feeding layer 160 is formed on the surface of the insulating layer 110 by electroless Cu plating.

  In FIG. 3D, a resist layer 170 is laminated on the surface of the Cu power supply layer 160. The thickness t1 of the resist layer 170 is the thickness of the electrode layers 124 and 134.

In FIG. 3E, patterning (exposure and development) is performed on the resist layer 170, and the resist layer is removed from the region corresponding to the electrode forming portion to form openings 172 and 174 having different diameters. The surface of the Cu power supply layer 160 is exposed at the bottom of the openings 172 and 174. The openings 172 and 174 have inner diameters D4 and D5 set to sizes corresponding to the outer diameters of the electrode layers 124 and 134, respectively, and are formed such that D4 <D5.
In FIG. 3F, electrolytic Cu plating is performed using the Cu power feeding layer 160 as a plating electrode. By depositing Cu on the surface of the Cu power supply layer 160 exposed in the openings 172 and 174 by electrolytic plating, and growing the Cu upward, electrode layers 124 and 134 having a thickness t1 and outer diameters D4 and D5 are formed. Is done.

  In FIG. 3G, the resist layer 170 remaining on the Cu power supply layer 160 is peeled off and removed. As a result, the electrode layers 124 and 134 having the thickness t1 remain on the insulating layer 110.

  In FIG. 3H, a resist layer 180 is laminated on the surfaces of the electrode layers 124 and 134 and the Cu power feeding layer 160. The thickness t2 of the resist layer 180 is a value set by the inner diameter difference (or volume difference) of the holes 142 and 144, and is the thickness of the electrode layers 134 and 136 stacked in two layers. Therefore, the thickness t3 of the electrode layer 136 is t2-t1.

  In FIG. 3I, patterning (exposure and development) is performed on the resist layer 180 to remove the resist layer from the region corresponding to the large-diameter electrode 130 to form an opening 182. The inner diameter D6 of the opening 182 is set to a size corresponding to the diameter of the electrode layer 136 (D5> D6> D2). The surface of the electrode layer 134 is exposed at the bottom of the opening 182.

  In FIG. 3J, electrolytic Cu plating is performed using the Cu power feeding layer 160 as a plating electrode. By depositing Cu on the surface of the electrode layer 134 exposed in the opening 182 by electrolytic plating and growing the Cu upward, an electrode layer 136 having a thickness t3 and a diameter D6 is laminated on the upper surface of the electrode layer 134. . In this way, the electrode layer 136 can be stacked on the upper surface of the electrode layer 134 by performing electrolytic Cu plating twice using the Cu power feeding layer 160 as a plating electrode.

  In FIG. 3K, the resist layer 180 remaining on the Cu power feeding layer 160 is peeled off and removed. Further, the Cu power supply layer 160 except for the electrode portion where the electrode layers 124 and 134 are formed is removed by etching. In the present embodiment, the large-diameter electrode 130 has a configuration in which the electrode layers 134 and 136 are stacked stepwise, and the outer diameter D5 of the lower electrode layer 134 is larger than the outer diameter D6 of the upper electrode layer 136. Therefore, the two electrode layers 124 and 134 having different sizes are laminated in a stable state.

  Next, the solder resist forming process will be described. The solder resist forming step includes the steps shown in FIGS. 3L to 3N.

  In FIG. 3L, a solder resist 140 is formed on the surfaces of the electrode layers 124, 134, 136 and the insulating layer 110. The thickness of the solder resist 140 is selected based on the thickness of the electrode layers 124, 134, 136, the relationship between the inner diameters of the holes 142, 144 and the diameter of the solder balls 150. That is, the protruding height of the solder bumps 152 and 154 can be defined to a desired height by the diameter and depth (volume) of the holes 142 and 144.

  In FIG. 3M, patterning is performed on the solder resist 140 to remove the solder resist layer from the region corresponding to the electrode forming portion to form holes 142 and 144. At the bottom of the holes 142 and 144, the surfaces of the electrode layers 124 and 136 are exposed.

  In FIG. 3N, Ni / Au electrode layers 122 and 132 composed of a Ni layer and an Au layer are formed on the surfaces of the electrode layers 124 and 136 by a thin film forming method such as plating. In the Ni / Au electrode layers 122 and 132, the Ni layer is bonded to the surfaces of the electrode layers 124 and 136, and the Au layer is exposed at the bottoms of the holes 142 and 144. Therefore, the bonding strength with the solder bumps 152 and 154 is enhanced by the Ni / Au electrode layers 122 and 132.

  Next, the bump forming process will be described. A bump formation process has each process shown to FIG. 3O-FIG. 3P.

  In FIG. 3O, flux 146 is injected into the holes 142 and 144, and the flux 146 (shown with a satin pattern in FIG. 3O) is applied to the Ni / Au electrode layers 122 and 132. Thereafter, the solder balls 150 having the same diameter are mounted on the openings of the holes 142 and 144 having different inner diameters formed in the solder resist 140. The solder ball 150 is improved in wettability by the flux 146. The volumes of the holes 142 and 144 having different inner diameters are set to substantially the same volume due to the difference in thickness of the electrode layers 124, 134, and 136, whereby the protrusion height of the solder bumps 152 and 154 from the surface of the solder resist 140 is set. Are almost the same.

  In FIG. 3P, heat treatment (reflow) is performed in a state where the solder balls 150 having the same diameter are mounted on the openings of the holes 142 and 144. When the solder ball 150 is heated to the melting point or higher, it is liquefied and flows into the holes 142 and 144 and joined to the Ni / Au electrode layers 122 and 132 exposed at the bottoms of the holes 142 and 144. On the other hand, the molten solder protruding upward from the holes 142 and 144 becomes spherical due to surface tension. Then, the heights H3 and H4 of the solder bumps 152 and 154 protruding upward from the surface of the solder resist 140 are substantially the same (H3≈H4).

  Since the solder balls 150 may have the same diameter regardless of the inner diameters of the holes 142 and 144, one type of solder ball 150 is used. Therefore, it is not necessary to prepare two types of solder balls 150 according to the inner diameters of the holes 142 and 144, and it is not necessary to perform a troublesome operation of confirming the diameters of a plurality of types of solder balls in the mounting process.

  In addition, after the bump forming process is completed, it may be divided into pieces by a dicing process according to the required size of the electronic device 100.

  FIG. 4 is a longitudinal sectional view showing the configuration of the second embodiment of the electronic apparatus. In FIG. 4, the same parts as those in the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.

  As shown in FIG. 4, in the electronic device 200 of Example 2, the inner diameter D2 of the hole 144 of the solder resist 140 is formed to be larger than the electrode layer 136 laminated on the upper surface of the electrode layer 134. . That is, the outer diameter D7 of the Ni / Au electrode layer 132 laminated on the surface (upper surface and outer periphery) of the electrode layer 136 is smaller than the inner diameter D2 of the hole 144 (D2> D7).

  Therefore, a minute gap 210 is formed in an annular shape between the outer periphery of the Ni / Au electrode layer 132 and the inner wall of the hole 144. The solder bump 154 melted by the heat treatment flows into the gap 210. Therefore, since the solder bump 154 is bonded to the Ni / Au electrode layer 132 laminated on the upper surface and the outer periphery of the electrode layer 136, the bonding area is increased as compared with the case of Example 1, and the Ni / Au is correspondingly increased. The bond strength with the electrode layer 132 is enhanced.

In the electronic device 200, as in the case of the first embodiment described above, the electrode 120 with the small-diameter hole 142 is formed by the single electrode layer 124, whereas the electrode with the large-diameter hole 144 is formed. 130 is a laminate of two electrode layers 134 and 136, and is formed so that the thickness T2 of the electrode 130 is approximately twice (higher) the thickness T1 of the electrode 120 of the small-diameter hole 142. (T2> T1).
By forming the large-diameter electrode 130 by laminating two electrode layers 134 and 136, the depth (distance L2) of the large-diameter hole 144 is reduced and the volume of the small-diameter hole 142 and the large-diameter hole are increased. The volume of the hole 144 is set to be substantially the same. Accordingly, even if the solder balls 150 having the same diameter are mounted in the holes 142 and 144 having different diameters, the volume of the solder bumps 152 and 154 protruding from the surface of the solder resist 140 becomes almost the same. The heights H3 and H4 of the solder bumps 152 and 154 projecting from H are substantially equal (H3≈H4).

  Therefore, according to the electronic device 200, since it is not necessary to level the solder bumps 152 and 154, it is possible to improve reliability during mounting.

  Here, a method of manufacturing the electronic device 200 will be described with reference to FIGS. 5A to 5D. 5A to 5D are views for explaining a method (No. 1 to No. 4) of manufacturing an electronic device according to the second embodiment. In addition, the electrode formation process in the manufacturing method of Example 2 performs each process shown in FIGS. 5A to 5D after the process shown in FIGS. 3A to 3L (No. 1 to No. 12) of Example 1 described above. . Since each process performed before the process shown in FIGS. 5A to 5D is the same as the process shown in FIGS. 3A to 3L (Nos. 1 to 12), the description thereof is omitted.

  In FIG. 5A, patterning is performed on the solder resist 140 laminated on the surfaces of the electrode layers 124, 134, 136 and the insulating layer 110 in the process of FIG. 3L described above, and the solder resist layer is deleted from the region corresponding to the electrode forming portion. Thus, holes 142 and 144 are formed. The surfaces of the electrode layers 124 and 136 and a part of the electrode layer 134 (between the inner wall of the hole 144 and the outer periphery of the electrode layer 136) are exposed at the bottoms of the holes 142 and 144.

  In FIG. 5B, Ni / Au electrode layers 122 and 132 composed of a Ni layer and an Au layer are formed on the surfaces of the electrode layers 124 and 136 by a thin film formation method such as plating. In the Ni / Au electrode layers 122 and 132, the Ni layer is bonded to the surfaces of the electrode layers 124 and 136, and the Au layer is exposed at the bottoms of the holes 142 and 144.

  Since the outer diameter of the electrode layer 136 is smaller than the inner diameter D2 of the hole 144, the Ni / Au electrode layer 132 is formed not only on the upper surface but also on the outer periphery. The Ni / Au electrode layer 132 is also formed on the upper surface of the electrode layer 134 exposed around the electrode layer 136 (the portion exposed between the inner wall of the hole 144 and the outer periphery of the electrode layer 136).

  Next, the bump forming process will be described. A bump formation process has each process shown to FIG. 5C-FIG. 5D.

  In FIG. 5C, flux 146 is injected into the holes 142 and 144, and the flux 146 (shown with a satin pattern in FIG. 5C) is applied to the Ni / Au electrode layers 122 and 132. Thereafter, the solder balls 150 having the same diameter are mounted on the openings of the holes 142 and 144 having different inner diameters formed in the solder resist 140. The solder ball 150 is improved in wettability by the flux 146. Since the volumes of the holes 142 and 144 having different inner diameters are set to substantially the same volume due to the difference in thickness of the electrode layers 124, 134, and 136, the protruding height of the solder bumps 152 and 154 from the surface of the solder resist 140 is It will be almost the same.

  In FIG. 5D, heat treatment (reflow) is performed in a state where the solder balls 150 having the same diameter are mounted on the openings of the holes 142 and 144. When the solder ball 150 is heated to the melting point or higher, it is liquefied and flows into the holes 142 and 144 and joined to the Ni / Au electrode layers 122 and 132 exposed at the bottoms of the holes 142 and 144. At that time, the melted solder also flows into a minute gap 210 formed between the outer periphery of the Ni / Au electrode layer 132 and the inner wall of the hole 144 and enters the upper surface of the Ni / Au electrode layer 132 and the gap 210. Joined to the exposed outer periphery. As a result, the solder bump 154 is firmly bonded to the Ni / Au electrode layer 132 in the hole 144. Further, the heights H3 and H4 of the solder bumps 152 and 154 protruding upward from the surface of the solder resist 140 are substantially the same (H3≈H4).

  FIG. 6 is a longitudinal sectional view showing the configuration of the third embodiment of the electronic apparatus. In FIG. 6, the same parts as those in the first and second embodiments are denoted by the same reference numerals, and the description thereof is omitted.

As shown in FIG. 6, in the electronic device 300 of Example 3, the outer diameter D <b> 8 of the lower electrode layer 134 formed on the insulating layer 110 was formed to be a small diameter and laminated on the upper side of the electrode layer 134. The outer diameter D9 of the electrode layer 136 is formed to be a large diameter (D8 <D9). The upper electrode layer 136 is formed so as to cover the upper surface and the outer peripheral surface of the lower electrode layer 134, and the upper surface of the electrode layer 136 is formed to have a larger diameter than the inner diameter D <b> 2 of the hole 144.
Therefore, the inner diameter D2 of the hole 144 can be made larger than those in the first and second embodiments. Therefore, since the surface area of the Ni / Au electrode layer 132 laminated on the upper surface of the electrode layer 136 is increased, the bonding strength between the solder bump 154 and the Ni / Au electrode layer 132 is enhanced.

Further, in the electronic device 300, as in the case of the first and second embodiments, the electrode 120 of the small diameter hole 142 is formed by the single electrode layer 124, whereas the large diameter hole 144 is formed. The electrode 130 is formed by laminating two electrode layers 134 and 136, and is formed such that the thickness T2 of the electrode 130 is approximately twice (higher) than the thickness T1 of the electrode 120 of the small-diameter hole 142. (T2> T1).
By forming the large-diameter electrode 130 by laminating two electrode layers 134 and 136, the depth (distance L2) of the large-diameter hole 144 is reduced and the volume of the small-diameter hole 142 and the large-diameter hole are increased. The volume of the hole 144 is set to be substantially the same. Accordingly, even if the solder balls 150 having the same diameter are mounted in the holes 142 and 144 having different diameters, the volume of the solder bumps 152 and 154 protruding from the surface of the solder resist 140 becomes almost the same. The heights H3 and H4 of the solder bumps 152 and 154 projecting from H are substantially equal (H3≈H4).

  Therefore, according to the electronic apparatus 300, since it is not necessary to level the solder bumps 152 and 154, it is possible to improve the reliability at the time of mounting.

  Here, a method of manufacturing the electronic device 300 will be described with reference to FIGS. 7A to 7L. 7A to 7L are views for explaining a method (No. 1 to No. 12) for manufacturing an electronic device according to the third embodiment. In addition, as for the electrode formation process in the manufacturing method of Example 3, each process shown to FIG. 7A-FIG. 7L is implemented after the process shown to FIGS. 3A-3D (the 1st-the 4th) of Example 1 mentioned above. . Each step performed before the steps shown in FIGS. 7A to 7L is the same as the steps shown in FIGS. 3A to 3D (No. 1 to No. 4), and thus description thereof is omitted.

In FIG. 7A, patterning (exposure and development) is performed on the resist layer 170, and the resist layer is removed from the region corresponding to the electrode forming portion to form openings 172 and 174 having different diameters. The surface of the Cu power supply layer 160 is exposed at the bottom of the openings 172 and 174. The openings 172 and 174 have inner diameters D4 and D5 set to sizes corresponding to the diameters of the electrode layers 124 and 134, respectively, and are formed so that D4≈D5 in this embodiment.
In FIG. 7B, electrolytic Cu plating is performed using the Cu power feeding layer 160 as a plating electrode. By depositing Cu on the surface of the Cu power supply layer 160 communicating with the inside of the openings 172 and 174 by electrolytic plating, and growing the Cu upward, the electrode layers 124 and 134 having the same outer diameter as the thickness t1. Is formed.

  In FIG. 7C, the resist layer 170 remaining on the Cu power feeding layer 160 is peeled off and removed. As a result, the electrode layers 124 and 134 having the thickness t1 remain on the insulating layer 110.

  In FIG. 7D, a resist layer 180 is stacked on the surfaces of the electrode layers 124 and 134 and the Cu power feeding layer 160. The thickness t2 of the resist layer 180 is a value set by the inner diameter difference (or volume difference) of the holes 142 and 144, and is the thickness of the electrode layers 134 and 136 stacked in two layers. Therefore, the thickness t3 of the electrode layer 136 is t2-t1.

In FIG. 7E, the resist layer 180 is patterned (exposure and development), and the resist layer is removed from the region corresponding to the large-diameter electrode 130 to form an opening 182. The inner diameter D6 of the opening 182 is larger than the diameter D5 of the lower electrode layer 134, and is set to a size corresponding to the diameter of the electrode layer 136 (D6> D5). An annular gap 184 is formed at the bottom of the opening 182 between the outer periphery of the electrode layer 134 and the inner wall of the opening 182.
In FIG. 7F, electrolytic Cu plating is performed using the Cu power feeding layer 160 as a plating electrode. By depositing Cu on the upper surface and outer periphery of the electrode layer 134 exposed in the opening 182 and the surface of the Cu power feeding layer 160 exposed outside the electrode layer 134 by electrolytic plating, the electrode layer 134 is grown by growing Cu upward. An electrode layer 136 having a diameter D6 is laminated on the upper surface and the outer periphery of the substrate. As described above, by performing electrolytic Cu plating twice using the Cu power supply layer 160 as a plating electrode, the electrode layer 136 can be stacked on the upper surface and the outer periphery of the electrode layer 134.

  In FIG. 7G, the resist layer 180 remaining on the Cu power feeding layer 160 is peeled off and removed. Further, the Cu power feeding layer 160 except for the electrode portion on which the electrode layers 124, 134, and 136 are formed is removed by etching. In this embodiment, since the electrode 130 is formed by laminating the electrode layer 136 having a large diameter (D6) so as to surround the upper surface and outer periphery of the electrode layer 134 having a small diameter (D5), the upper surface of the electrode layer 136 is formed. Can be increased in area. Further, since the electrode layer 136 is bonded so as to cover the upper surface and the outer periphery of the electrode layer 134, the electrode layer 136 is integrated with the electrode layer 134 to form the electrode 130 having the thickness T2 and the diameter D6.

  Next, the solder resist forming process will be described. The solder resist forming step includes the steps shown in FIGS. 7H to 7J.

  In FIG. 7H, a solder resist 140 is formed on the surfaces of the electrode layers 124 and 136 and the insulating layer 110. The thickness of the solder resist 140 is selected based on the thickness of the electrode layers 124 and 136 and the relationship between the inner diameters of the holes 142 and 144 and the diameter of the solder balls 150. That is, the protruding height of the solder bumps 152 and 154 can be defined to a desired height by the diameter and depth (volume) of the holes 142 and 144.

  In FIG. 7I, patterning (exposure and development) is performed on the solder resist 140, and the solder resist layer is removed from the region corresponding to the electrode forming portion to form the holes 142 and 144. At the bottom of the holes 142 and 144, the surfaces of the electrode layers 124 and 136 are exposed. Further, since the hole 144 communicates with the upper surface of the large-diameter electrode layer 136, the inner diameter D6 can be formed larger than those in the first and second embodiments. Therefore, this embodiment is effective when it is desired to increase the inner diameter difference between the holes 142 and 144.

  In FIG. 7J, Ni / Au electrode layers 122 and 132 composed of a Ni layer and an Au layer are formed on the surfaces of the electrode layers 124 and 136 by a thin film forming method such as plating. In the Ni / Au electrode layers 122 and 132, the Ni layer is bonded to the surfaces of the electrode layers 124 and 136, and the Au layer is exposed at the bottoms of the holes 142 and 144. Further, in this embodiment, since the hole 144 can be increased in diameter according to the electrode layer 136 having a large diameter, the joining area of the Ni / Au electrode layer 132 can be set larger.

  Next, the bump forming process will be described. A bump formation process has each process shown to FIG. 7K-FIG. 7L.

  In FIG. 7K, flux 146 is injected into the holes 142 and 144, and the flux 146 (shown with a satin pattern in FIG. 7K) is applied to the Ni / Au electrode layers 122 and 132. Thereafter, the solder balls 150 having the same diameter are mounted on the openings of the holes 142 and 144 having different inner diameters formed in the solder resist 140. The solder ball 150 is improved in wettability by the flux 146.

  In FIG. 7L, heat treatment (reflow) is performed in a state where solder balls 150 having the same diameter are mounted in the openings of the holes 142 and 144. When the solder ball 150 is heated to the melting point or higher, it is liquefied and flows into the holes 142 and 144 and joined to the Ni / Au electrode layers 122 and 132 exposed at the bottoms of the holes 142 and 144.

  The volumes of the holes 142 and 144 having different inner diameters are set to substantially the same volume due to the difference in height between the electrode layers 124 and 136, whereby the protruding height H 3 of the solder bumps 152 and 154 from the surface of the solder resist 140 is set. , H4 have substantially the same height (H3≈H4).

  The present invention is not limited to a semiconductor device having a BGA (ball grid array) structure in which solder bumps are formed on a substrate by heat-treating the solder balls. For example, a flip chip bonded to a substrate via solder bumps, or a solder Of course, the present invention can also be applied to a multilayer substrate or an interposer in which circuit boards are bonded via bumps.

It is a figure for demonstrating the manufacturing method (the 1) of the conventional electronic device. It is a figure for demonstrating the manufacturing method (the 2) of the conventional electronic device. It is a figure for demonstrating the manufacturing method (the 3) of the conventional electronic device. It is a longitudinal cross-sectional view which shows Example 1 of the electronic device by this invention. FIG. 6 is a view for explaining the electronic device manufacturing method (No. 1) according to the first embodiment. FIG. 6 is a diagram for explaining the electronic device manufacturing method (No. 2) according to the first embodiment. FIG. 6 is a diagram for explaining the electronic device manufacturing method (No. 3) according to the first embodiment. FIG. 6 is a view for explaining the electronic device manufacturing method (No. 4) according to the first embodiment. FIG. 10 is a diagram for explaining a method (part 5) for manufacturing the electronic device according to the first embodiment. FIG. 6 is a diagram for explaining the electronic device manufacturing method (No. 6) according to the first embodiment. FIG. 10 is a diagram for explaining the electronic device manufacturing method (part 7) according to the first embodiment. FIG. 10 is a view for explaining the electronic device manufacturing method (No. 8) according to the first embodiment. FIG. 10 is a diagram for explaining the electronic device manufacturing method (No. 9) according to the first embodiment. FIG. 10 is a view for explaining the electronic device manufacturing method (part 10) according to the first embodiment. FIG. 10 is a view for explaining the electronic device manufacturing method (part 11) according to the first embodiment. FIG. 10 is a diagram for explaining a method (No. 12) for manufacturing the electronic device according to the first embodiment. FIG. 10 is a view for explaining the electronic device manufacturing method (No. 13) according to the first embodiment. It is a figure for demonstrating the manufacturing method (the 14) of the electronic device of Example 1. FIG. It is a figure for demonstrating the manufacturing method (the 15) of the electronic device of Example 1. FIG. It is a figure for demonstrating the manufacturing method (the 16) of the electronic device of Example 1. FIG. It is a longitudinal cross-sectional view which shows Example 2 of the electronic device by this invention. FIG. 6 is a diagram for explaining a method (part 1) for manufacturing an electronic device according to a second embodiment. FIG. 10 is a diagram for explaining a method (part 2) for manufacturing the electronic device according to the second embodiment. FIG. 11 is a diagram for explaining a method (part 3) for manufacturing the electronic device according to the second embodiment. FIG. 10 is a view for explaining the electronic device manufacturing method (No. 4) according to the second embodiment. It is a longitudinal cross-sectional view which shows Example 3 of the electronic device by this invention. It is a figure for demonstrating the manufacturing method (the 1) of the electronic device of Example 3. FIG. It is a figure for demonstrating the manufacturing method (the 2) of the electronic device of Example 3. FIG. FIG. 10 is a view for explaining the electronic device manufacturing method (No. 3) according to the third embodiment. FIG. 10 is a view for explaining the electronic device manufacturing method (No. 4) according to the third embodiment. It is a figure for demonstrating the manufacturing method (the 5) of the electronic device of Example 3. FIG. It is a figure for demonstrating the manufacturing method (the 6) of the electronic device of Example 3. FIG. FIG. 10 is a view for explaining the electronic device manufacturing method (part 7) according to the third embodiment. It is a figure for demonstrating the manufacturing method (the 8) of the electronic device of Example 3. FIG. It is a figure for demonstrating the manufacturing method (the 9) of the electronic device of Example 3. FIG. It is a figure for demonstrating the manufacturing method (the 10) of the electronic device of Example 3. FIG. It is a figure for demonstrating the manufacturing method (the 11) of the electronic device of Example 3. FIG. It is a figure for demonstrating the manufacturing method (the 12) of the electronic device of Example 3. FIG.

Explanation of symbols

100, 200, 300 Electronic device 110 Insulating layer 120, 130 Electrode 122, 132 Ni / Au electrode layer 140 Solder resist 142, 144 Holes 124, 134, 136 Electrode layer 150 Solder balls 152, 154 Solder bumps 170, 180 Resist 172 174, 182 Opening 184, 210 Clearance

Claims (8)

An electrode forming step of forming an electrode on the substrate;
A solder resist forming step of forming a solder resist having a plurality of holes with different diameters on the substrate on which the electrodes are formed;
A bump forming step in which a plurality of the holes are filled with solder balls having the same diameter, and then heat-treated to join the solder balls to the electrodes through the holes to form solder bumps. A manufacturing method comprising:
In the electrode forming step, the electrodes having different thicknesses are formed in accordance with the inner diameter of the hole so that the height of the solder bump from the solder resist surface after the bump forming step is equalized. A method for manufacturing an electronic device.   2. The method of manufacturing an electronic device according to claim 1, wherein a large-diameter hole among the plurality of holes is formed so that the electrode is thicker than a small-diameter hole.   3. The method of manufacturing an electronic device according to claim 1, wherein the electrode has a height changed by laminating an electrode layer according to a size of an inner diameter of the hole.   4. The method of manufacturing an electronic device according to claim 3, wherein the number of stacked electrode layers is changed in accordance with the size of the inner diameter of the hole, and the thickness of the solder resist layer is selected.   5. The method of manufacturing an electronic device according to claim 1, wherein the electrode layer is formed by a semi-additive method. A substrate on which a plurality of electrodes are formed;
A solder resist formed on the substrate and having a hole having a large diameter and a hole having a small diameter at a position facing the electrode;
Formed with solder balls having the same diameter, and having a plurality of solder bumps joined to the electrodes through the holes;
The thickness of the electrode facing the hole having a large diameter is made thicker than the electrode facing the hole having a small diameter so that the height of each solder bump from the surface of the solder resist is equal. Electronic equipment.   The electronic device according to claim 6, wherein the thickness of the electrode varies depending on the number of electrode layers stacked. A substrate on which a plurality of electrodes are formed;
A solder resist formed on the substrate and having a plurality of holes with different diameters at positions facing the electrodes;
It has a plurality of solder bumps joined to the electrodes through the holes,
The volume of each solder bump is the same,
The electronic device according to claim 1, wherein the thickness of the electrode is varied according to the diameter of the hole so that the height of each solder bump from the surface of the solder resist is equal.

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