JP4828451B2 - 基板処理方法、半導体装置の製造方法および基板処理装置 - Google Patents
基板処理方法、半導体装置の製造方法および基板処理装置 Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
- H01L21/02063—Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76826—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
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- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Cleaning Or Drying Semiconductors (AREA)
- Drying Of Semiconductors (AREA)
Description
請求項1に記載したように、
絶縁膜とCu層よりなる金属層が形成された被処理基板の基板処理方法であって、
前記被処理基板上に無水カルボン酸を供給するとともに前記被処理基板を加熱する処理工程を有し、
前記処理工程では、前記金属層の酸化膜が除去され、さらに前記絶縁膜の脱水処理が行われることを特徴とする基板処理方法により、また、
請求項2に記載したように、
前記絶縁膜は、多孔質膜もしくはフッ素を含む膜のいずれかを含むことを特徴とする請求項1記載の基板処理方法により、また、
請求項3に記載したように、
前記処理工程では、前記被処理基板上に無水カルボン酸とともにH2Oが供給されることを特徴とする請求項1または2記載の基板処理方法により、また、
請求項4に記載したように、
前記無水カルボン酸は、無水酢酸、無水プロピオン酸、無水酪酸、および無水吉草酸のうち、いずれかを含むことを特徴とする請求項1乃至3のうち、いずれか1項記載の基板処理方法により、また、
請求項5に記載したように、
Cu配線と層間絶縁膜を含む半導体装置の製造方法であって、
前記Cu配線と前記層間絶縁膜が形成された被処理基板上に、無水カルボン酸を供給すると共に前記被処理基板を加熱する処理工程を含み、
前記処理工程では、前記Cu配線の酸化膜が除去され、さらに前記層間絶縁膜の脱水処理が行われることを特徴とする半導体装置の製造方法により、また、
請求項6に記載したように、
前記層間絶縁膜は、多孔質膜もしくはフッ素を含む膜のいずれかを含むことを特徴とする請求項5記載の半導体装置の製造方法により、また、
請求項7に記載したように、
前記処理工程では、前記被処理基板上に無水カルボン酸とともにH2Oが供給されることを特徴とする請求項5または6記載の半導体装置の製造方法により、また、
請求項8に記載したように、
前記無水カルボン酸は、無水酢酸、無水プロピオン酸、無水酪酸、および無水吉草酸のうち、いずれかを含むことを特徴とする請求項5乃至7のうち、いずれか1項記載の半導体装置の製造方法により、また、
請求項9に記載したように、
絶縁膜と、金属配線を構成する金属層と、当該金属配線の層間絶縁膜が形成された被処理基板を処理する基板処理装置であって、
前記被処理基板を保持すると共に該被処理基板を加熱する保持台と、
前記保持台を内部に備えた処理容器と、
前記処理容器内に、処理ガスを供給するガス供給部と、
前記処理容器内からガスを排気するガス排出部と、を備え、
前記処理ガスは、無水カルボン酸を含み、
前記処理ガスにより、前記金属配線の酸化膜の除去を行い、さらに前記層間絶縁膜の脱水処理を行うことを特徴とする基板処理装置により、また、
請求項10に記載したように、
前記処理容器内にH2Oを供給するH2O供給手段をさらに有する請求項9記載の基板処理装置により、また、
請求項11に記載したように、
前記H2O供給手段は、水蒸気発生器を含むことを特徴とする請求項10記載の基板処理装置により、また、
請求項12に記載したように、
前記処理容器内または前記ガス排出部のH2Oを検出するH2O検出手段をさらに有する請求項9乃至11のうち、いずれか1項記載の基板処理装置により、また、
請求項13に記載したように、
前記処理容器内のH2Oを検出するH2O検出手段をさらに有し、該H2O検出手段の検出値に対応して、前記H2O供給手段からのH2Oの供給量が制御されるよう構成されていることを特徴とする請求項10記載の基板処理装置により、また、
請求項14に記載したように、
前記H2O検出手段は、赤外線照射手段と赤外線検知手段を含むことを特徴とする請求項12または13記載の基板処理装置により、解決する。
100A 制御手段
100a 温度制御手段
100b ガス制御手段
100c 圧力制御手段
100B コンピュータ
100d CPU
100e 記録媒体
100f 入力手段
100g メモリ
100h 通信手段
100i 表示手段
101 処理容器
101A 処理空間
102 ガス供給部
102A ガス穴
102B 反応促進室
102b ヒータ
103 保持台
103A ヒータ
104 電源
105 排気ライン
105A 圧力調整バルブ
106 排気ポンプ
107、111 ガス供給ライン
110 原料供給手段110
110a 原料
110A ヒータ
112 水蒸気発生器
113,117 ガスライン
108,114,118 バルブ
109,115,119 MFC
116,120 ガス供給源
Claims (14)
- 絶縁膜とCu層よりなる金属層が形成された被処理基板の基板処理方法であって、
前記被処理基板上に無水カルボン酸を供給するとともに前記被処理基板を加熱する処理工程を有し、
前記処理工程では、前記金属層の酸化膜が除去され、さらに前記絶縁膜の脱水処理が行われることを特徴とする基板処理方法。 - 前記絶縁膜は、多孔質膜もしくはフッ素を含む膜のいずれかを含むことを特徴とする請求項1記載の基板処理方法。
- 前記処理工程では、前記被処理基板上に無水カルボン酸とともにH2Oが供給されることを特徴とする請求項1または2記載の基板処理方法。
- 前記無水カルボン酸は、無水酢酸、無水プロピオン酸、無水酪酸、および無水吉草酸のうち、いずれかを含むことを特徴とする請求項1乃至3のうち、いずれか1項記載の基板処理方法。
- Cu配線と層間絶縁膜を含む半導体装置の製造方法であって、
前記Cu配線と前記層間絶縁膜が形成された被処理基板上に、無水カルボン酸を供給すると共に前記被処理基板を加熱する処理工程を含み、
前記処理工程では、前記Cu配線の酸化膜が除去され、さらに前記層間絶縁膜の脱水処理が行われることを特徴とする半導体装置の製造方法。 - 前記層間絶縁膜は、多孔質膜もしくはフッ素を含む膜のいずれかを含むことを特徴とする請求項5記載の半導体装置の製造方法。
- 前記処理工程では、前記被処理基板上に無水カルボン酸とともにH2Oが供給されることを特徴とする請求項5または6記載の半導体装置の製造方法。
- 前記無水カルボン酸は、無水酢酸、無水プロピオン酸、無水酪酸、および無水吉草酸のうち、いずれかを含むことを特徴とする請求項5乃至7のうち、いずれか1項記載の半導体装置の製造方法。
- 絶縁膜と、金属配線を構成する金属層と、当該金属配線の層間絶縁膜が形成された被処理基板を処理する基板処理装置であって、
前記被処理基板を保持すると共に該被処理基板を加熱する保持台と、
前記保持台を内部に備えた処理容器と、
前記処理容器内に、処理ガスを供給するガス供給部と、
前記処理容器内からガスを排気するガス排出部と、を備え、
前記処理ガスは、無水カルボン酸を含み、
前記処理ガスにより、前記金属配線の酸化膜の除去を行い、さらに前記層間絶縁膜の脱水処理を行うことを特徴とする基板処理装置。 - 前記処理容器内にH2Oを供給するH2O供給手段をさらに有する請求項9記載の基板処理装置。
- 前記H2O供給手段は、水蒸気発生器を含むことを特徴とする請求項10記載の基板処理装置。
- 前記処理容器内または前記ガス排出部のH2Oを検出するH2O検出手段をさらに有することを特徴とする請求項9乃至11のうち、いずれか1項記載の基板処理装置。
- 前記処理容器内のH2Oを検出するH2O検出手段をさらに有し、該H2O検出手段の検出値に対応して、前記H2O供給手段からのH2Oの供給量が制御されるよう構成されていることを特徴とする請求項10記載の基板処理装置。
- 前記H2O検出手段は、赤外線照射手段と赤外線検知手段を含むことを特徴とする請求項12または13記載の基板処理装置。
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