JP4791456B2 - 低ｋ材料上にＴａＮ拡散バリア領域を堆積する方法（低ｋ材料上のＴａＮ拡散バリア領域のＰＥ−ＡＬＤ） - Google Patents

低ｋ材料上にＴａＮ拡散バリア領域を堆積する方法（低ｋ材料上のＴａＮ拡散バリア領域のＰＥ−ＡＬＤ） Download PDF

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JP4791456B2
JP4791456B2 JP2007515460A JP2007515460A JP4791456B2 JP 4791456 B2 JP4791456 B2 JP 4791456B2 JP 2007515460 A JP2007515460 A JP 2007515460A JP 2007515460 A JP2007515460 A JP 2007515460A JP 4791456 B2 JP4791456 B2 JP 4791456B2
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tantalum
low
protective layer
diffusion barrier
layer
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JP2008502147A5 (enExample
JP2008502147A (ja
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ダン、デレン、エヌ
キム、ヒュンジュン
ロスナーガル、スティーヴン、エム
セオ、スン−チェオン
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International Business Machines Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76846—Layer combinations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • H01L21/28562—Selective deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Vapour Deposition (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
JP2007515460A 2004-06-02 2005-05-31 低ｋ材料上にＴａＮ拡散バリア領域を堆積する方法（低ｋ材料上のＴａＮ拡散バリア領域のＰＥ−ＡＬＤ） Expired - Fee Related JP4791456B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/709,865 US7211507B2 (en) 2004-06-02 2004-06-02 PE-ALD of TaN diffusion barrier region on low-k materials
US10/709,865 2004-06-02
PCT/US2005/018953 WO2005122253A2 (en) 2004-06-02 2005-05-31 PE-ALD OF TaN DIFFUSION BARRIER REGION ON LOW-K MATERIALS

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JP2008502147A JP2008502147A (ja) 2008-01-24
JP2008502147A5 JP2008502147A5 (enExample) 2008-05-15
JP4791456B2 true JP4791456B2 (ja) 2011-10-12

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JP2007515460A Expired - Fee Related JP4791456B2 (ja) 2004-06-02 2005-05-31 低ｋ材料上にＴａＮ拡散バリア領域を堆積する方法（低ｋ材料上のＴａＮ拡散バリア領域のＰＥ−ＡＬＤ）

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Country Link
US (1) US7211507B2 (enExample)
EP (1) EP1756856B1 (enExample)
JP (1) JP4791456B2 (enExample)
CN (1) CN100447955C (enExample)
TW (1) TWI345273B (enExample)
WO (1) WO2005122253A2 (enExample)

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US20050183740A1 (en) * 2004-02-19 2005-08-25 Fulton John L. Process and apparatus for removing residues from semiconductor substrates
US7211507B2 (en) * 2004-06-02 2007-05-01 International Business Machines Corporation PE-ALD of TaN diffusion barrier region on low-k materials
KR100552820B1 (ko) * 2004-09-17 2006-02-21 동부아남반도체 주식회사 반도체 소자의 제조 방법
US7482289B2 (en) * 2006-08-25 2009-01-27 Battelle Memorial Institute Methods and apparatus for depositing tantalum metal films to surfaces and substrates
US7598170B2 (en) * 2007-01-26 2009-10-06 Asm America, Inc. Plasma-enhanced ALD of tantalum nitride films
US7595270B2 (en) * 2007-01-26 2009-09-29 Asm America, Inc. Passivated stoichiometric metal nitride films
JP5358893B2 (ja) * 2007-04-03 2013-12-04 三菱電機株式会社 トランジスタ
DE602007013386D1 (de) * 2007-07-17 2011-05-05 St Microelectronics Srl Verfahren zur Herstellung eines kupferkompatiblen Phasenwechselspeicherelements und entsprechendes Phasenwechselspeicherelement
JP5551681B2 (ja) * 2008-04-16 2014-07-16 エーエスエム アメリカ インコーポレイテッド アルミニウム炭化水素化合物を使用する金属炭化物膜の原子層堆積
US20100055442A1 (en) * 2008-09-03 2010-03-04 International Business Machines Corporation METHOD OF PE-ALD OF SiNxCy AND INTEGRATION OF LINER MATERIALS ON POROUS LOW K SUBSTRATES
CN101740369B (zh) * 2008-11-19 2011-12-07 中国科学院微电子研究所 一种制备金属性金属氮化物薄膜的方法
US9177826B2 (en) * 2012-02-02 2015-11-03 Globalfoundries Inc. Methods of forming metal nitride materials
US8736056B2 (en) * 2012-07-31 2014-05-27 Taiwan Semiconductor Manufacturing Company, Ltd. Device for reducing contact resistance of a metal
US8962473B2 (en) 2013-03-15 2015-02-24 Taiwan Semiconductor Manufacturing Co., Ltd. Method of forming hybrid diffusion barrier layer and semiconductor device thereof
CN104109844B (zh) * 2013-04-18 2016-07-06 中芯国际集成电路制造(上海)有限公司 一种基于原子层沉积技术的氮化钽薄膜的制作工艺
KR102216575B1 (ko) 2014-10-23 2021-02-18 에이에스엠 아이피 홀딩 비.브이. 티타늄 알루미늄 및 탄탈륨 알루미늄 박막들
CN106086809B (zh) * 2016-06-17 2018-08-17 艾因斯（北京）钽应用科技有限公司 一种制备耐腐耐磨钽复合涂层的方法
US10008558B1 (en) * 2017-01-05 2018-06-26 International Business Machines Corporation Advanced metal insulator metal capacitor
US10032855B1 (en) 2017-01-05 2018-07-24 International Business Machines Corporation Advanced metal insulator metal capacitor

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JP2002009078A (ja) * 2000-05-15 2002-01-11 Asm Microchemistry Oy 交互層蒸着前の保護層
JP2003536272A (ja) * 2000-06-08 2003-12-02 ジニテック インク． 薄膜形成方法
JP2004165634A (ja) * 2002-08-15 2004-06-10 Interuniv Micro Electronica Centrum Vzw Ａｌｄ表面処理のためのプラズマ処理
JP2004214335A (ja) * 2002-12-27 2004-07-29 Tokyo Electron Ltd 成膜方法
JP2004311545A (ja) * 2003-04-03 2004-11-04 Matsushita Electric Ind Co Ltd 半導体装置の製造方法及び高融点金属膜の堆積装置
JP2005191290A (ja) * 2003-12-25 2005-07-14 Semiconductor Leading Edge Technologies Inc 半導体装置の製造方法
JP2006520106A (ja) * 2003-03-07 2006-08-31 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド バリアで内側が覆われた半導体コンポーネントを製造する方法

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KR100386034B1 (ko) * 2000-12-06 2003-06-02 에이에스엠 마이크로케미스트리 리미티드 확산 방지막의 결정립계를 금속산화물로 충진한 구리 배선구조의 반도체 소자 제조 방법
US6428859B1 (en) * 2000-12-06 2002-08-06 Angstron Systems, Inc. Sequential method for depositing a film by modulated ion-induced atomic layer deposition (MII-ALD)
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US6916398B2 (en) * 2001-10-26 2005-07-12 Applied Materials, Inc. Gas delivery apparatus and method for atomic layer deposition
US6972267B2 (en) * 2002-03-04 2005-12-06 Applied Materials, Inc. Sequential deposition of tantalum nitride using a tantalum-containing precursor and a nitrogen-containing precursor
JP4579157B2 (ja) * 2003-03-25 2010-11-10 東京エレクトロン株式会社 処理装置及び切り替え機構
US7186446B2 (en) * 2003-10-31 2007-03-06 International Business Machines Corporation Plasma enhanced ALD of tantalum nitride and bilayer
US7211507B2 (en) * 2004-06-02 2007-05-01 International Business Machines Corporation PE-ALD of TaN diffusion barrier region on low-k materials
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JP2002009078A (ja) * 2000-05-15 2002-01-11 Asm Microchemistry Oy 交互層蒸着前の保護層
JP2003536272A (ja) * 2000-06-08 2003-12-02 ジニテック インク． 薄膜形成方法
JP2004165634A (ja) * 2002-08-15 2004-06-10 Interuniv Micro Electronica Centrum Vzw Ａｌｄ表面処理のためのプラズマ処理
JP2004214335A (ja) * 2002-12-27 2004-07-29 Tokyo Electron Ltd 成膜方法
JP2006520106A (ja) * 2003-03-07 2006-08-31 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド バリアで内側が覆われた半導体コンポーネントを製造する方法
JP2004311545A (ja) * 2003-04-03 2004-11-04 Matsushita Electric Ind Co Ltd 半導体装置の製造方法及び高融点金属膜の堆積装置
JP2005191290A (ja) * 2003-12-25 2005-07-14 Semiconductor Leading Edge Technologies Inc 半導体装置の製造方法

Also Published As

Publication number Publication date
EP1756856A4 (en) 2010-02-17
CN101036217A (zh) 2007-09-12
WO2005122253A3 (en) 2006-12-14
CN100447955C (zh) 2008-12-31
TWI345273B (en) 2011-07-11
EP1756856B1 (en) 2013-07-24
TW200540996A (en) 2005-12-16
WO2005122253A2 (en) 2005-12-22
EP1756856A2 (en) 2007-02-28
US7211507B2 (en) 2007-05-01
US20050269703A1 (en) 2005-12-08
JP2008502147A (ja) 2008-01-24

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