JP4772258B2 - Manufacturing method of SOI substrate - Google Patents

Description

【００５７】
で表される。ここで、Ｅは薄膜のヤング率、σは薄膜のポアッソン比、ｈは薄膜の厚さ、ｘは薄膜が密着している平面の横方向の軸、ζは薄膜の法線方向の剥ぎ取られようとしている膜の変位である。この接着力αは、ζという法線方向の変位のｘ軸に対する２階偏微分係数を求めることで得られる。
【００５８】
また、接着力強化のための熱処理を行う際は、ガラス基板の熱膨張率が単結晶シリコン片６のそれよりも大きいことが、安定した接着が行われる要因となる。シリコンの熱膨張率は、室温付近では２．６×１０^-6deg ^-1程度、５００℃程度の温度では４．１×１０^-6deg ^-1程度である。一方、本発明で用いる前記高歪点無アルカリガラス基板は、室温から７００℃程度の温度範囲で単結晶シリコンよりも熱膨張率が同等または大きい基板を得ることができるもので、たとえばアルカリ土類−アルミノ硼珪酸ガラス、バリウム−アルミノ硼珪酸ガラス、アルカリ土類−亜鉛−鉛−アルミノ硼珪酸ガラスまたはアルカリ土類−亜鉛−アルミノ硼珪酸ガラスから成り、５０〜３００℃の温度範囲に亘って、熱膨張率は、４．７×１０^-6deg ^-1程度である。したがって、前記５０〜３００℃の温度範囲では、高歪点無アルカリガラス基板２の方が熱膨張率が大きい。なお、本発明では、前記非晶質無アルカリガラス基板とは、アルカリ含有量が１％以下の微量の物を言い、具体的な製品では、たとえばコーニング社のコーニング＃１７３７ガラスなどが挙げられる。
【００５９】
前記熱処理のために、接着された高歪点無アルカリガラス基板２および単結晶シリコン片６が炉に入れられ、高温になっている際の反りの様子を、図４に模式的に示す。上述のような熱膨張率の関係で、熱処理を行うための高温下に晒した際、高歪点無アルカリガラス基板２は下に凸方向に反る。この時、前記van der Waals 力により接着している両者の内、単結晶シリコン片６の高歪点無アルカリガラス基板２付近の部分が横方向に引張られるけれども、前記のように高歪点無アルカリガラス基板２が下に凸方向に反ることによって、単結晶シリコン片６の端から剥がれる力が反る方向と一致し、これが単結晶シリコン片６が接着面から剥れる力を相殺して剥がれが起こらず、ボンドが形成される要因となる。
【００６０】
しかしながら、前記水素イオンの打込み面１０での水素脆化による分離は、６００℃程度以上の温度でないと生じないので、６００℃程度の温度とすることで、前記接着力を強化する熱処理と、この単結晶シリコン片６の分離のための熱処理とを、一括して効率的に行うことができる。一例として、６００℃、３０〜６０分の熱処理を行うと、前述のように接着した面の接着力が強化されるとともに、単結晶シリコン片６が前記水素イオンの打込み面１０で分離する。この分離した状態を示したのが、前記図１および図３（ｇ）である。
【００６１】
その熱処理の際に、ＴＤＳ(Temperature Desorption Spectroscopy）の評価を行うと、単結晶シリコン片６中あるいは二酸化珪素膜３，４の表面からは、３００℃を超える温度あたりから水素が抜けてゆく様が観測される。この水素が抜ける際に、単結晶シリコン片６の水素イオンの打込み面１０の所から水素が急激に消散し、該単結晶シリコン片６が単結晶シリコン薄膜５と単結晶シリコン片６ａとに分離し、高歪点無アルカリガラス基板２上に単結晶シリコン薄膜５が得られる。以上のような処理によって、前記膜厚４０〜２００ｎｍの単結晶シリコン薄膜５を有するＳＯＩ基板１が形成される。この膜厚範囲内で、素子形成したトランジスタのチャネル部が完全空乏化していることが重要である。
【００６２】
なお、上述の説明では、熱処理を１段階で説明したが、多段階で行うことで、接着力をより強化することができる。特に、接着力強化のための熱処理（３００〜５５０℃程度の温度）と、分離のための熱処理とを個別の段階に分けて行ってもよい。その場合、接着力の強化は、上記のように３００℃程度以上の温度でなされるので、３００〜５５０℃の単結晶シリコン片６が打込み面１０で分離しない温度で、１５分程度以下の短時間の処理で、該接着力強化のための第１段階目の熱処理を行い、その後に、６００〜７００℃の温度で、分離のための第２段階目の熱処理を行うことで、接合面から膜が剥がれ、単結晶シリコン片６そのものが熱処理後剥がれてしまう不良品の数を低減することができる。
【００６３】
また、上述の説明では、前記熱処理には、電気炉を用いる例を示しているが、レーザなどの光（ランプ）アニールによる概ね８５０℃以上のピーク温度を含む瞬間熱アニ−ルによって行ってもよい。前記電気炉による加熱では、熱容量が大きいので、高歪点無アルカリガラス基板２を急激に昇温、降温すると割れてしまうのに対して、この瞬間熱アニ−ルによる加熱は熱容量が小さいので、急激に昇温、降温しても前記割れを生じることはない。さらにまた、ＳＯＩ基板１を製造する上でのスループットを向上することができる。
【００６４】
以上のようにして作成されたＳＯＩ基板１は、たとえば前記高歪点無アルカリガラス基板２に可視光を透過する材料を用いた場合、前記単結晶シリコン薄膜５の層に薄膜トランジスタを形成して、ＴＦＴ液晶ディスプレイ（ＬＣＤ：Liquid Crystal Display）装置、ＴＦＴ有機エレクトロ・ルミネッセンス（ＯＬＥＤ：Organic Light Emitting Diode）表示装置などに加工される。このようなアクティブマトリクス駆動の表示パネルに、本発明によるＳＯＩ基板１を導入することで、トランジスタの特性の均一化、安定化、高性能化を図ることができ、前記アクティブマトリクスのドライバから、周辺ドライバ、タイミングコントローラ等のシステムを集積化することも可能になる。また、必要な部分に単結晶シリコン片６を貼付ければよく、大面積の基板にも対応することができる。
【００６５】
以上のように、本発明によるＳＯＩ基板１では、スマートカット法などで得られる単結晶シリコン薄膜５を基板に貼合わせて作成されるＳＯＩ基板において、貼合わせる際に３００℃程度でも充分な接合強度が得られることに着目し、その基板に、非晶質無アルカリガラス基板である高歪点無アルカリガラス基板２を用いる。
【００６６】
したがって、組成を調節した結晶化ガラスや高耐熱のガラスを用いる必要が無くなり、アクティブマトリクス駆動による液晶表示パネル等に一般的に使用される高歪点無アルカリガラスを用いて、低コストにＳＯＩ基板を製造することができる。また、前記熱処理の温度が低いために、８００〜１２００℃で熱処理を行う従来と比較して、半導体層へのアルカリ金属の拡散を何桁も小さくできる。これによって、前記拡散を防止するために形成される二酸化珪素膜３，４などの膜厚を従来よりも薄くすることができ、スループットを向上することができる。
【００６７】
また、室温から７００℃程度の温度範囲で単結晶シリコンの熱膨張率よりも熱膨張率が同等または大きい高歪点無アルカリガラス基板２を用いることで、最高温度が６００℃程度の単結晶シリコン片６から前記単結晶シリコン薄膜５への分離および単結晶シリコン片６の該高歪点無アルカリガラス基板２への接着力を高める熱処理の際に、基板割れや単結晶シリコン薄膜５の剥離を抑えることができる。
【００６８】
上述の説明では、単結晶シリコン片６は、最も入手し易い表面が（１００）面のものを元に説明したが、（１１０）面や（１００）面など、他の方位のものも、全く同様に、できた時から、表面研磨が必要ない程平坦なシリコン膜面を有するＳＯＩ基板を製造することができる。
【００６９】
そして、（１００）方位のものに比べて、（１１０）方位のものでは、最近接原子同士がこの（１１０）面に最も沢山並んでいるので、該単結晶シリコン片６を分離した際に、分離面が頗る平坦になり、本ＳＯＩ基板１に作成したシリコントランジスタの不良率を小さくすることができる。
【００７０】
また、（１１１）方位のものにすると、分離する面が単結晶シリコン塊のへき開面と一致し、かつ同平面内では、最近接原子同士がこの（１１１）面から小さいずれの角度に存在するので、該単結晶シリコン片６を分離した際に、分離面が頗る平坦になり、本ＳＯＩ基板１に作成したシリコントランジスタの不良率をさらに小さくすることができる。
【００７１】
本発明の実施の他の形態について、図５および図６に基づいて説明すれば、以下のとおりである。
【００７２】
図５は、本発明の実施の他の形態のＳＯＩ基板１１の作成手順を示す図である。このＳＯＩ基板１１は、前述のＳＯＩ基板１に類似し、対応する部分には同一の参照符号を付して、その説明を省略する。注目すべきは、このＳＯＩ基板１１では、図５（ｈ）で示すように、多結晶シリコン薄膜１２と前記単結晶シリコン薄膜５とを同一の高歪点無アルカリガラス基板２上に作成することである。
【００７３】
先ず、図５（ａ）から図５（ｂ）で示すように、高歪点無アルカリガラス基板２上に、アンダーコート膜となる絶縁膜１３が、プラズマ化学気相成長法（ＰＥＣＶＤ法）によって、厚さ３００ｎｍ程度形成される。このアンダーコート膜の最上層は、ぬれ性が良好な前記二酸化珪素膜とされる。次に、図５（ｃ）で示すように、前記ＰＥＣＶＤ法で、アモルファスシリコン膜１４が３０〜２００ｎｍ形成され、脱水素アニールを４００〜５００℃で行い、アモルファスシリコン膜１４中の水素を抜く。その後、図５（ｄ）から図５（ｅ）で示すように、アモルファスシリコン膜１４でＴＦＴを形成する領域１４ａをエキシマレーザで溶融・結晶化（レーザ結晶化）し、多結晶シリコン薄膜１２とする。この時の多結晶シリコン薄膜１２の膜厚は、後で形成する単結晶シリコン薄膜５の膜厚、たとえば前記４０〜２００ｎｍと合わせておくのが重要である。
【００７４】
レーザ結晶化後は、図５（ｅ）から図５（ｆ）で示すように、単結晶シリコン薄膜５が貼合わせられる領域１４ｂのシリコン膜をエッチングして除去しておく。この際、多結晶シリコン薄膜１２の表面がフォトレジストと密着して汚染が気になる場合には、フォトレジスト塗布前に多結晶シリコン薄膜１２の表面に二酸化珪素膜を厚さ３０〜１００ｎｍ程度形成しておけばよい。また、多結晶シリコン薄膜１２の膜厚から、必要であれば、前記絶縁膜１３の厚さ方向における一部も合わせて、単結晶シリコン薄膜５の膜厚が多結晶シリコン薄膜１２の膜厚と一致するように、エッチング除去される。
【００７５】
続いて、前記水素イオンを注入された単結晶シリコン片６が前記エッチング除去した領域１４ｂを覆う形状に切断され、前記図３（ｆ）から図３（ｇ）と同様に、図５（ｇ）から図５（ｈ）で示すように、単結晶シリコン片６を前記エッチング処理された領域１４ｂに貼合わせ、更に前記６００℃程度の熱工程を経ることによって、単結晶シリコン片６を水素イオン打込み面１０から分離させて、単結晶シリコン薄膜５を得る。
【００７６】
これらの薄膜５，１２が双方ある場合でも、また前述のＳＯＩ基板１のように単結晶シリコン薄膜５のみの場合でも、ＴＦＴの形成プロセスは以下の図６で示すとおりである。図６は、前記ＳＯＩ基板１１から作成した薄膜トランジスタ２１の一例の断面図である。この薄膜トランジスタ２１の作成手順を端的に説明すると、先ず前記薄膜５，１２を、形成するトランジスタサイズに合わせてパターニングする。次に、ゲート絶縁膜２２を形成する。このゲート絶縁膜２２には、二酸化珪素を主成分とした膜が最適で、たとえば厚さ３０〜２００ｎｍである。ゲート絶縁膜２２は、２００〜４００℃の温度で成膜すると緻密性が劣る膜になるため、成膜後、６００℃程度の温度で緻密化アニールをする。このアニールは、水素イオン注入した単結晶シリコン膜の結晶質を注入前の結晶質に戻すという処理も兼ねている。
【００７７】
この後、ゲート電極膜２３を３００ｎｍ程度成膜し、適切な形状にパターニングする。さらに、前記ゲート電極膜２３をマスクとして、前記薄膜５，１２にイオンが打込まれ、ｎ⁺ またはｐ⁺ 領域２４が形成される。このとき、本発明では、前述のように単結晶シリコン薄膜５の厚さを２００ｎｍ程度以下とすることで、チャネル領域２５を完全空乏化することができる。
【００７８】
続いて、層間絶縁膜２６を４００ｎｍ程度形成した後、ソース・ドレイン電極のコンタクトを取る箇所に穴をあける。その後、ソース・ドレインメタル膜２７を４００ｎｍ程度成膜し、パターニングする。場合によっては、ｎ型ＭＯＳＴＦＴでは、前記イオン打込み時に、ＬＤＤ構造として、高信頼性を得るようにする。
【００７９】
このようにして作成した薄膜トランジスタ２１は、貼合わせ・分離によって単結晶シリコン薄膜５を得た箇所は、チャネル部となるシリコン膜が単結晶であるため、多結晶シリコン薄膜１２で見られる粒界からの電気伝導がなく、高い特性を得ることができ、また同じ単結晶シリコン薄膜５上の全トランジスタに亘って特性が均一である。このため、たとえばＬＣＤディスプレイに用いる場合には、ソースドライバ部や周辺回路に用いられる。これに対して、前記薄膜トランジスタ２１を多結晶シリコン薄膜１２から作成した箇所は、比較的特性の劣る絵素部やゲートドライバ部に用いられる。
【００８０】
本件発明者の作成結果によると、単結晶シリコン薄膜トランジスタは、ＮＭＯＳＴＦＴでは、電界効果移動度が５００cm² /V・sec 、閾値電圧が１．０Ｖ、オフ電流が１×10^-12 Ａで、ＰＭＯＳＴＦＴでは、電界効果移動度が２５０cm² /V・sec 、閾値電圧が−１．０Ｖ、オフ電流が１×10^-12 Ａで、共に均一性に優れた薄膜トランジスタが得られた。
【００８１】
このように構成することによって、貼合わせられた単結晶シリコン薄膜５の領域１４ｂと多結晶シリコン薄膜１２の領域１４ａとが概ね同等の高さであるＳＯＩ基板１１を得ることができる。その結果、島エッチングを含め、前記領域１４ａ，１４ｂに対して、以降の殆どの工程を同時に処理することができる。また、段差の小さいトランジスタや回路が形成され、たとえば液晶パネルの場合、セル厚制御において優位となる。
【００８２】
【発明の効果】
本発明のＳＯＩ基板は、以上のように、いわゆるスマートカット法などで得られる単結晶シリコン薄膜を基板に貼合わせて作成されるＳＯＩ基板において、前記単結晶シリコン片を基板に貼合わせる際に、３００℃程度でも充分な接合強度が得られることに着目し、その基板に、非晶質無アルカリガラス基板を用い、最高温度が６００℃程度で、前記単結晶シリコン片の基板への貼合わせおよび薄膜への分離を行う。
【００８３】
それゆえ、組成を調節した結晶化ガラスや高耐熱のガラスを用いる必要が無くなり、アクティブマトリクス駆動による液晶表示パネル等に一般的に使用される高歪点無アルカリガラスを用いて、低コストにＳＯＩ基板を製造することができる。また、半導体層へのアルカリ金属の拡散を防止するために、たとえば単結晶シリコン片側に形成される酸化膜や、基板側に形成される二酸化珪素膜などの膜厚を、前記熱処理の温度が低いために従来よりも薄くすることができ、スループットを向上することができる。
【００８４】
また、本発明のＳＯＩ基板は、以上のように、前記非晶質無アルカリガラス基板を、前記単結晶シリコンよりも熱膨張率が同等または大きいものとする。
【００８５】
それゆえ、単結晶シリコン片内に打込んだ水素イオンを消散させて分離する工程および単結晶シリコン片の基板への接着力を高める工程での熱処理の際に、基板が下に凸方向に反り、単結晶シリコン片の端から剥がれる力が反る方向と一致して、剥がれが起こらないようになる。これによって、基板割れや単結晶シリコン片の剥離を抑えることができる。
【００８６】
さらにまた、本発明のＳＯＩ基板は、以上のように、前記非晶質無アルカリガラス基板を、アルカリ土類−アルミノ硼珪酸ガラス、バリウム−アルミノ硼珪酸ガラス、アルカリ土類−亜鉛−鉛−アルミノ硼珪酸ガラスまたはアルカリ土類−亜鉛−アルミノ硼珪酸ガラスとする。
【００８７】
それゆえ、上述の単結晶シリコンよりも熱膨張率が同等または大きい基板を得ることができる。
【００８８】
また、本発明のＳＯＩ基板は、以上のように、前記単結晶シリコン片の貼合わせられる表面を、（１１１）面、（１１０）面または（１００）面とする。
【００８９】
それゆえ、できた時から、表面研磨が必要ない程平坦なシリコン膜面を有するＳＯＩ基板を製造することができる。また、最も入手し易い表面が（１００）方位のものに比べて、（１１０）方位のものでは、最近接原子同士がこの（１１０）面に最も沢山並んでいるので、該単結晶シリコン片を分離した際に、分離面が頗る平坦になり、本ＳＯＩ基板に作成したシリコントランジスタの不良率を小さくすることができる。さらにまた、（１１１）方位のものにすると、分離する面が単結晶シリコン塊のへき開面と一致し、かつ同平面内では、最近接原子同士がこの（１１１）面から小さいずれの角度に存在するので、該単結晶シリコン片を分離した際に、分離面が頗る平坦になり、本ＳＯＩ基板に作成したシリコントランジスタの不良率をさらに小さくすることができる。
【００９０】
さらにまた、本発明の表示装置は、以上のように、前記非晶質無アルカリガラス基板を可視光を透過する非晶質ガラス材料とし、前記の何れかのＳＯＩ基板を用いる。
【００９１】
それゆえ、表示装置用の大面積の基板に、高性能なトランジスタを形成することができる。
【００９２】
また、本発明のＳＯＩ基板の製造方法は、以上のように、いわゆるスマートカット法などで得られる単結晶シリコン薄膜を基板に貼合わせて作成されるＳＯＩ基板の製造方法において、前記単結晶シリコン片を基板に貼合わせる際に、３００℃程度でも充分な接合強度が得られることに着目し、その基板に非晶質無アルカリガラス基板を用い、最高温度が６００℃程度で、前記単結晶シリコン片の基板への貼合わせおよび薄膜への分離を行う。
【００９３】
それゆえ、組成を調節した結晶化ガラスや高耐熱のガラスを用いる必要が無くなり、アクティブマトリクス駆動による液晶表示パネル等に一般的に使用される高歪点無アルカリガラスを用いて、低コストにＳＯＩ基板を製造することができる。また、半導体層へのアルカリ金属の拡散を防止するために、たとえば単結晶シリコン片側に形成される酸化膜や、基板側に形成される二酸化珪素膜などの膜厚を、前記熱処理の温度が低いために従来よりも薄くすることができ、スループットを向上することができる。
【００９４】
さらにまた、本発明のＳＯＩ基板の製造方法は、以上のように、前記熱処理を、３００℃以上７００℃以下の多段階の温度ステップで行う。
【００９５】
それゆえ、単結晶シリコン薄膜の剥がれをさらに減少することができる。
【００９６】
また、本発明のＳＯＩ基板の製造方法は、以上のように、スマートカット法などで得られる単結晶シリコン薄膜を基板に貼合わせて作成されるＳＯＩ基板の製造方法において、前記単結晶シリコン片を基板に貼合わせる際に、３００℃程度でも充分な接合強度が得られることに着目し、概ね８５０℃以上のピーク温度を含むランプアニールで熱処理を行う。
【００９７】
それゆえ、組成を調節した結晶化ガラスや高耐熱のガラスを用いる必要が無くなり、アクティブマトリクス駆動による液晶表示パネル等に一般的に使用される高歪点無アルカリガラスを用いて、低コストにＳＯＩ基板を製造することができる。また、半導体層へのアルカリ金属の拡散を防止するために、たとえば単結晶シリコン片側に形成される酸化膜や、基板側に形成される二酸化珪素膜などの膜厚を、前記熱処理の温度が低いために従来よりも薄くすることができ、スループットを向上することができる。
【００９８】
また、電気炉による加熱では、熱容量が大きいので、ガラス基板を急激に昇温、降温すると割れてしまうのに対して、瞬間熱アニ−ルによる加熱は熱容量が小さいので、急激に昇温、降温してもガラス基板に割れを生じることはない。さらにまた、ＳＯＩ基板を製造する上でのスループットを向上することができる。
【００９９】
さらにまた、本発明のＳＯＩ基板の製造方法は、以上のように、単結晶シリコン薄膜とともに、多結晶シリコン薄膜にも併せてトランジスタがが形成されるＳＯＩ基板を作成するにあたって、前記貼合わせの前に、その貼合わせられる領域を含む予め定める領域の多結晶シリコン層をエッチング除去するとともに、同じ領域の前記二酸化珪素膜の厚さ方向における一部をエッチング除去しておく。
【０１００】
それゆえ、貼合わせられた単結晶シリコン薄膜の領域と多結晶シリコン薄膜の領域とが概ね同等の高さであるＳＯＩ基板を得ることができ、以降の殆どの工程を、前記単結晶シリコン薄膜の領域と多結晶シリコン薄膜の領域とで同時に処理することができる。また、段差の小さいトランジスタや回路が形成され、たとえば液晶パネルの場合、セル厚制御において優位となる。
【０１０１】
また、本発明のＳＯＩ基板の製造方法は、以上のように、前記水素イオンの注入深さを４０〜２００ｎｍとする。
【０１０２】
それゆえ、完全空乏化したトランジスタが得られ、特性を飛躍的に向上することができるとともに、加工も容易になるとともに製造上の安全係数も高くすることができる。
【図面の簡単な説明】
【図１】本発明の実施の一形態のＳＯＩ基板の断面図である。
【図２】単結晶シリコン片を高歪点無アルカリガラス基板に貼合わせる前の状態を示す断面図である。
【図３】図１で示すＳＯＩ基板の作製手順を示す図である。
【図４】本発明による高歪点無アルカリガラス基板と接着された単結晶シリコン片との熱処理時の反りの様子を模式的に示す図である。
【図５】本発明の実施の他の形態のＳＯＩ基板の作製手順を示す図である。
【図６】図５で示すＳＯＩ基板から作製した薄膜トランジスタの一例の断面図である。
【符号の説明】
１，１１ ＳＯＩ基板
２ 高歪点無アルカリガラス基板（非晶質無アルカリガラス基板）
３，４ 二酸化珪素膜
５ 単結晶シリコン薄膜
６ 単結晶シリコン片
１０ 水素イオン打込み面
１２ 多結晶シリコン薄膜
１３ 絶縁膜
１４ アモルファスシリコン膜
２１ 薄膜トランジスタ
２２ ゲート絶縁膜
２３ ゲート電極膜
２４ ｎ⁺ またはｐ⁺ 領域
２５ チャネル領域
２６ 層間絶縁膜
２７ ソース・ドレインメタル膜[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an SOI substrate formed by bonding a single crystal silicon thin film obtained by implanting hydrogen ions and dividing the hydrogen ion implantation layer onto the substrate, and a display device using the SOI substrate and an SOI substrate. It relates to a manufacturing method.
[0002]
[Prior art]
Conventionally, integrated circuit element technology that processes a single crystal silicon substrate to form several hundred million transistors on the substrate, and a polycrystalline semiconductor thin film such as a silicon film on an amorphous material such as a glass substrate Thin film transistor (TFT) liquid crystal display technology, which is processed into transistors and manufactured into pixels and drivers for liquid crystal displays, and the spread of personal information terminals using computers and liquid crystal displays will increase. Has progressed.
[0003]
Among these, an integrated circuit element is formed by processing a single crystal silicon wafer having a diameter of less than 1 mm and a diameter of about 300 mm and forming a large number of transistors thereon. In TFT liquid crystal displays, an amorphous silicon film on an amorphous alkali-free glass substrate is melted and polycrystallized with heat from a laser or the like, and processed to create a MOS transistor as a switching element. Yes.
[0004]
In the field of the liquid crystal display and the organic EL display using the TFT, an amorphous silicon film or a polysilicon film TFT is formed on a transparent glass substrate to drive the pixel, so-called active matrix driving. Silicon devices have been formed. Further, from the active matrix driving, it has been studied to form a higher performance silicon device for system integration of peripheral drivers, timing controllers and the like. This is because in a polycrystalline silicon film, there is a localized level in the gap due to incompleteness of crystallinity, and a localized level in a defect gap near the grain boundary. This is because an increase in the subthreshold coefficient (S coefficient) causes a problem that the performance of the transistor is insufficient to form a high-performance silicon device.
[0005]
Therefore, SOI technology has attracted attention. The SOI is an abbreviation for Silicon on Insulator, which is a technique for forming a single crystal semiconductor thin film on an insulating substrate (not often used for forming a polycrystalline silicon film). This technology has been actively studied since around 1981. The purpose of the SOI substrate used in the field of integrated circuits is to make a good transistor and dramatically improve the function of the semiconductor element. Therefore, the substrate may be an insulating film and is transparent. It may be opaque, opaque, crystalline, or amorphous. In this field, when a transistor is formed using an SOI substrate, since elements are completely separated, there are few operational restrictions, and the transistor exhibits good characteristics.
[0006]
Currently, the representative of the SOI substrate is SIMOX ( S ilicon Im planted Ox ygen) substrates are commercially available. In this SOI substrate, oxygen is injected into a silicon wafer, and the single crystal silicon thin film is separated from the bulk of the substrate by the formed silicon oxide layer. Therefore, an element much heavier than hydrogen called oxygen is implanted to a predetermined depth, so that a large acceleration voltage is applied at the time of implantation, the crystal damage is large, the single crystal properties are not sufficient, or the silicon dioxide film There is a problem that the insulation is incomplete due to the deviation from the stoichiometry of the part.
[0007]
Therefore, a technique for laminating single crystal silicon on a substrate and making it thin is disclosed in JP-A-5-211128. This prior art is referred to as a smart cut method, in which hydrogen ions are implanted into a single crystal silicon piece by an ion plantation method, bonded to a stiffener, and then microbubbles are generated in the hydrogen ion implantation layer by heat treatment, In this technique, the single crystal silicon piece is divided by the implantation layer to form a single crystal silicon thin film. Then, by removing the stiffener from the obtained single crystal silicon thin film or by bonding the single crystal silicon thin film on the substrate as it is, a single crystal transistor with high device characteristics can be manufactured. It is an excellent technology.
[0008]
However, according to this prior art, it is only described that an oxide film is formed on a single crystal silicon substrate and a single crystal silicon thin film is formed thereon, and other substrates such as the glass substrate for the display are described. The suitability of has not been studied. Therefore, an example in which bonding with another substrate is examined is described in Japanese Patent Laid-Open No. 11-163363. In the prior art, in order to prevent destruction of the quartz substrate in the heating process for improving the bonding strength with the quartz substrate, crystallized glass is used, and its composition is changed to match the thermal expansion coefficient with the silicon piece. A method of joining is disclosed.
[0009]
[Problems to be solved by the invention]
However, in the above-described prior art, it is considered that sufficient bonding strength cannot be obtained unless the single crystal silicon piece is bonded to the substrate unless it is exposed to a high temperature, and the temperature at which the heat treatment is performed is 800 to 1200 ° C. Has also reached. Therefore, highly heat-resistant crystallized glass having a strain point of 750 ° C. or higher is suitable, and a high strain point non-alkali having a strain point of 700 ° C. or lower generally used for liquid crystal display panels driven by active matrix drive. There is a problem that it cannot be used for glass.
[0010]
An object of the present invention is to provide an SOI substrate capable of manufacturing an SOI substrate at low cost without using crystallized glass or high heat-resistant glass whose composition is adjusted, a display device using the SOI substrate, and a method for manufacturing the SOI substrate. It is to be.
[0011]
[Means for Solving the Problems]
In the SOI substrate of the present invention, a single crystal silicon piece into which hydrogen ions are implanted is bonded onto the substrate, and the single crystal silicon piece is divided by the hydrogen ion implantation layer to form a single crystal silicon thin film. In the SOI substrate, the substrate is an amorphous alkali-free glass substrate.
[0012]
According to the above configuration, hydrogen ions are implanted into the single crystal silicon piece by an ion plantation method, hydrogen embrittlement is caused in the hydrogen ion implantation layer by heat treatment, and the single crystal silicon piece is formed into the hydrogen ion implantation layer. In an SOI substrate that is formed by laminating a single crystal silicon thin film obtained by a so-called smart cut method or the like so as to form a single crystal silicon thin film by dividing the single crystal silicon thin film on the substrate, the present inventor When bonding the substrate to the substrate, it was noted that sufficient bonding strength can be obtained even at about 300 ° C. Therefore, the heat treatment temperature for increasing the bonding strength can be set lower than before, and the strain point is 700 ° C. The following amorphous non-alkali glass substrates can be used.
[0013]
As a result of repeated investigations by the present inventors, in order to divide a single crystal silicon piece into single crystal silicon thin films, when hydrogen ions whose mass is much lighter than oxygen ions are implanted, in the element manufacturing process, the heat treatment temperature is It has been found that about 600 ° C. is sufficient. By applying heat treatment at such a temperature, hydrogen can be dissipated from the implanted layer of hydrogen ions in the single crystal silicon piece and separated into a single crystal silicon thin film, and the crystal quality of the single crystal silicon thin film can be reduced to hydrogen ions. It is possible to perform a process of returning to the same level as before the implantation and suppressing the deterioration of the crystal quality. Therefore, by performing the heat treatment at a temperature of about 600 ° C., the separation and improvement of crystal quality can be achieved, and the adhesive force of the single crystal silicon piece to the substrate can be increased.
[0014]
Therefore, there is no need to use crystallized glass or high heat-resistant glass whose composition has been adjusted, and an SOI substrate can be manufactured at low cost by using a high strain point non-alkali glass generally used for liquid crystal display panels driven by an active matrix. Can be manufactured. In addition, since the heat treatment temperature is low, diffusion of alkali metal into the semiconductor layer can be prevented. As a result, in order to prevent the diffusion of the alkali metal, for example, the thickness of the oxide film formed on one side of the single crystal silicon or the silicon dioxide film formed on the substrate side can be reduced, thereby improving the throughput. can do.
[0015]
In the present invention, the SOI substrate may be a substrate including an SOI in which the single crystal silicon piece is attached to a part of a large-area glass substrate.
[0016]
In the SOI substrate of the present invention, the amorphous alkali-free glass substrate has a thermal expansion coefficient equal to or greater than that of the single crystal silicon.
[0017]
According to the above configuration, when the substrate is exposed to a high temperature in order to perform the heat treatment for separating the single crystal silicon thin film and increasing the adhesion to the substrate, the thermal expansion coefficient of the substrate is within the temperature range of the heat treatment. Expansion coefficient (2.6 × 10 ^-6 deg ^-1 ) Because of the above, the substrate warps downward in the convex direction. At this time, of the two bonded by van der Waals force, the portion near the substrate of the single crystal silicon piece is pulled in the lateral direction and warped downward in the convex direction, so that the single crystal silicon piece is bent from the end of the single crystal silicon piece. The peeling force coincides with the warping direction, which cancels out the force that the single crystal silicon piece peels off from the bonding surface, and does not peel off from the bonding surface, which causes a bond to be formed. Thus, peeling of the single crystal silicon thin film from the substrate and cracking of the substrate can be prevented.
[0018]
Furthermore, in the SOI substrate of the present invention, the amorphous alkali-free glass substrate is an alkaline earth-aluminoborosilicate glass, barium-aluminoborosilicate glass, alkaline earth-zinc-lead-aluminoborosilicate glass, or alkali. It is an earth-zinc-aluminoborosilicate glass.
[0019]
According to the above configuration, a substrate having a thermal expansion coefficient equal to or larger than that of the single crystal silicon can be obtained.
[0020]
In the SOI substrate of the present invention, the single crystal silicon piece has a (111) plane, a (110) plane, or a (100) plane to be bonded.
[0021]
According to the above configuration, by using a single crystal silicon piece having the above plane orientation, an SOI substrate having a silicon film surface that is flat enough that surface polishing is not necessary can be manufactured in exactly the same way. Can do.
[0022]
As the single crystal silicon piece, the most readily available surface is the one with the (110) orientation as compared to the one with the (100) orientation. When the single crystal silicon piece is separated, the separation surface becomes flat and the defect rate of the silicon transistor formed on the present SOI substrate can be reduced.
[0023]
Further, when the material has a (111) orientation, the plane to be separated coincides with the cleavage plane of the single crystal silicon block, and the nearest atoms exist at any small angle from the (111) plane in the same plane. Therefore, when the single crystal silicon piece is separated, the separation surface becomes flat and the defect rate of the silicon transistor formed on the present SOI substrate can be further reduced.
[0024]
Furthermore, in the display device of the present invention, the amorphous alkali-free glass substrate is an amorphous glass material that transmits visible light, and any one of the above SOI substrates is used.
[0025]
According to the above configuration, the amorphous non-alkali glass substrate is made of an amorphous glass material that transmits visible light, and a transistor is formed on the single crystal silicon thin film together with a separately formed polycrystalline silicon film. A substrate for a liquid crystal display device or an organic EL display device can be formed.
[0026]
Therefore, a high-performance transistor can be formed in a necessary portion of a large-area substrate for a display device.
[0027]
The method for manufacturing an SOI substrate according to the present invention also includes a step of bonding a single crystal silicon piece into which hydrogen ions are implanted on the substrate, and dividing the single crystal silicon piece by the hydrogen ion implantation layer by heat treatment. In an SOI substrate manufacturing method in which a thin film is formed, an amorphous non-alkali glass substrate is used as the substrate, and heat treatment is performed at a maximum temperature of about 600 ° C. in the single crystal silicon dividing step by the heat treatment. It is characterized by that.
[0028]
According to the above configuration, in a method for manufacturing an SOI substrate that is produced by laminating a single crystal silicon thin film obtained by the smart cut method or the like to a substrate, the present inventors affix the single crystal silicon piece to the substrate. At this time, paying attention to the fact that sufficient bonding strength can be obtained even at about 300 ° C., the maximum temperature of the heat treatment is set to a temperature around 600 ° C. at which the single crystal silicon piece is divided, for example, processing at 600 ° C. for 30 to 60 minutes. I do.
[0029]
Therefore, there is no need to use crystallized glass or high heat-resistant glass whose composition has been adjusted, and an SOI substrate can be manufactured at low cost by using a high strain point non-alkali glass generally used for liquid crystal display panels driven by an active matrix. Can be manufactured. In addition, since the heat treatment temperature is low, diffusion of alkali metal into the semiconductor layer can be prevented. As a result, in order to prevent the diffusion of the alkali metal, for example, the thickness of the oxide film formed on one side of the single crystal silicon or the silicon dioxide film formed on the substrate side can be reduced, thereby improving the throughput. can do.
[0030]
Furthermore, the method for manufacturing an SOI substrate according to the present invention is characterized in that the heat treatment is performed in a multi-step temperature step in a temperature range of 300 ° C. to 700 ° C.
[0031]
According to said structure, peeling of a single crystal silicon thin film can further be reduced by heat-processing in a multistep temperature step. In particular, the first stage heat treatment for strengthening the adhesive force is performed at a temperature at which the single crystal silicon piece does not separate at the hydrogen ion implantation surface, and then the second stage heat treatment for separation is performed. It is possible to reduce the number of defective products in which the film is peeled off from the bonding surface and the single crystal silicon piece itself is peeled off after the heat treatment.
[0032]
The method for manufacturing an SOI substrate according to the present invention also includes a step of bonding a single crystal silicon piece into which hydrogen ions are implanted on the substrate, and dividing the single crystal silicon piece by the hydrogen ion implantation layer by heat treatment. In a manufacturing method of an SOI substrate in which a thin film is formed, an amorphous non-alkali glass substrate is used as the substrate, and lamp annealing including a peak temperature of approximately 850 ° C. or higher in the single crystal silicon dividing step by the heat treatment It is characterized by heat-treating.
[0033]
According to the above configuration, in a method for manufacturing an SOI substrate that is produced by laminating a single crystal silicon thin film obtained by the smart cut method or the like to a substrate, the present inventors affix the single crystal silicon piece to the substrate. At this time, paying attention to the fact that sufficient bonding strength can be obtained even at a maximum temperature of about 600 ° C., heat treatment is performed by lamp annealing including a peak temperature of approximately 850 ° C. or higher.
[0034]
Therefore, there is no need to use crystallized glass or high heat-resistant glass whose composition has been adjusted, and an SOI substrate can be manufactured at low cost by using a high strain point non-alkali glass generally used for liquid crystal display panels driven by an active matrix. Can be manufactured. In addition, since the heat treatment temperature is low, diffusion of alkali metal into the semiconductor layer can be prevented. As a result, in order to prevent the diffusion of the alkali metal, for example, the thickness of the oxide film formed on one side of the single crystal silicon or the silicon dioxide film formed on the substrate side can be reduced, thereby improving the throughput. can do.
[0035]
In addition, since heating with an electric furnace has a large heat capacity, the glass substrate is broken when the temperature is rapidly raised or lowered, whereas it is a laser that is a rapid thermal anneal (hereinafter referred to as RTA). Since heating by light (lamp) annealing such as the above has a small heat capacity, the glass substrate is not cracked even if the temperature is rapidly raised or lowered. Furthermore, the throughput in manufacturing the SOI substrate can be improved.
[0036]
Note that the higher the lamp annealing peak temperature, the better the transistor characteristics, but the greater the warpage and expansion / contraction of the substrate. Therefore, an appropriate temperature and holding time may be selected according to the substrate size and the type of device to be formed. As an example, a substrate of 300 to 400 mm class is held at 700 ° C. for about 5 minutes.
[0037]
Furthermore, the SOI substrate manufacturing method of the present invention includes a step of sequentially depositing a silicon dioxide film and an amorphous silicon film on the surface of the amorphous alkali-free glass substrate, and heat crystallization of the amorphous silicon film. A step of growing a polycrystalline silicon layer to form the polycrystalline silicon thin film, etching away the polycrystalline silicon layer in a predetermined region, and removing the polycrystalline silicon layer in the same region in the thickness direction. A step of etching and removing the portion, a step of previously oxidizing or laminating a silicon dioxide film on the surface of the single crystal silicon piece, and implanting the hydrogen ions, and removing the single crystal silicon piece implanted with the hydrogen ions by etching A step of cutting into a shape covering the region, and removing the cut single crystal silicon piece by etching the surface on the hydrogen ion implantation side. In close contact with the region, a step of is laminated, subjected to the heat treatment, characterized in that by the hydrogen embrittlement and forming a monocrystalline silicon thin film by dividing the single crystal silicon pieces.
[0038]
According to the above configuration, when the SOI substrate on which the transistor is formed in addition to the single crystal silicon thin film bonded together as described above and the polycrystalline silicon thin film deposited by CVD or the like is formed, Before the bonding, the polycrystalline silicon layer in a predetermined region including the region to be bonded is removed by etching, and a part of the same region in the thickness direction of the silicon dioxide film is removed by etching.
[0039]
Therefore, an SOI substrate in which the bonded single crystal silicon thin film region and polycrystalline silicon thin film region have substantially the same height can be obtained. As a result, most of the subsequent processes including island etching can be simultaneously performed in the single crystal silicon thin film region and the polycrystalline silicon thin film region. Also, transistors and circuits with small steps are formed. For example, in the case of a liquid crystal panel, it is superior in cell thickness control.
[0040]
In addition, the SOI substrate manufacturing method of the present invention is characterized in that the hydrogen ion implantation depth is 40 to 200 nm.
[0041]
According to the above configuration, a fully depleted transistor can be obtained when the hydrogen ion implantation depth, as described above, and thus the thickness of the single crystal silicon thin film is as thin as about 200 nm. In addition, the processing can be facilitated. On the other hand, when it becomes thinner than 40 nm, it becomes easy to break, and the safety factor in production is lowered.
[0042]
DETAILED DESCRIPTION OF THE INVENTION
The following describes one embodiment of the present invention with reference to FIGS.
[0043]
FIG. 1 is a cross-sectional view of an SOI substrate 1 according to an embodiment of the present invention. This SOI substrate 1 is produced by the smart cut method, and a silicon dioxide film 3 is laminated on the surface of a high strain point alkali-free glass substrate 2 which is an amorphous alkali-free glass substrate. A single crystal silicon thin film 5 covered with a silicon dioxide film 4 is bonded.
[0044]
In FIG. 1, the single crystal silicon thin film 5 is drawn smaller than the high strain point alkali-free glass substrate 2, but this is a general case of a high strain point alkali-free glass substrate and a silicon wafer currently on the market. The single crystal silicon thin film 5 may be the same size as the high strain point non-alkali glass substrate 2 because of the size relationship. Moreover, since this FIG. 1 is a schematic diagram, the magnitude relationship of thickness is not realistic. In general, the high strain point non-alkali glass substrate 3 has a thickness of about 0.7 mm, and the silicon dioxide films 3 and 4 have a thickness of about 50 to 300 nm.
[0045]
The single crystal silicon thin film 5 has a thickness of 40 to 200 nm. If the thickness of the single crystal silicon thin film 5, that is, the implantation depth of hydrogen ions is as thin as about 200 nm, a fully depleted transistor can be obtained, and the characteristics can be remarkably improved. It becomes easy. On the other hand, if the thickness is less than 40 nm, the variation in film thickness increases, and the manufacturing safety factor decreases. Therefore, by selecting as described above, high element characteristics can be obtained while maintaining a safety factor.
[0046]
FIG. 2 shows a state before the single crystal silicon piece 6 is bonded to the high strain point non-alkali glass substrate 2. The silicon dioxide film 4 of a single crystal silicon piece is formed only on the surface of the single crystal silicon piece 6 as shown in FIG. 2 when this film is obtained by a chemical vapor deposition method (CVD method) or the like. Is done. When formed by the thermal oxidation method described below, it is formed on both the front surface and the back surface of the single crystal silicon piece 6. Then, when the single crystal silicon piece 6 is divided by the smart cut method, the silicon dioxide film on the surface side is also removed, and the single crystal silicon thin film 5 is obtained as shown in FIG.
[0047]
FIG. 3 is a diagram showing a procedure for producing the SOI substrate 1 as described above. Since the high strain point non-alkali glass substrate 2 has insufficient wettability (hydrophilicity) as it is, in order to increase the wettability, as shown in FIGS. 3 (a) to 3 (b), Silicon dioxide (SiO ₂ ) The film 3 is formed about 50 to 300 nm. The film formation can be performed, for example, by flowing a TEOS (Tetra Ortho Silicate) gas and an oxygen gas in a vacuum chamber by plasma enhanced chemical vapor deposition (plasma CVD method) and generating plasma discharge. The plasma CVD method is suitable for film formation on the high strain point non-alkali glass substrate 2 which cannot be raised to a high temperature of 600 ° C. or more because the material gas is activated by plasma discharge to form a film. The outline of a specific film forming method is as follows.
[0048]
A TEOS gas and an oxygen gas, which are material gases, are flowed into the vacuum chamber, and the degree of vacuum is adjusted to 133 to 1330 Pa. The substrate temperature is about 200 to 400 ° C. The mounting table on which the substrate is placed is also one electrode of a high-frequency power source, and a high frequency of 13.56 MHz, which is a RADIO FREQUENCY band (RF band), is applied between the other electrode and the mounting table. A plasma discharge is generated. The high frequency power density is 0.1 W / cm. ² Degree. By this plasma discharge, the silicon dioxide film 3 of about 50 to 300 nm can be formed in a time of about 1 minute.
[0049]
Here, the plasma frequency is not necessarily the RF band, but may be a microwave band (about 2.456 GHz). The reason why the high strain point non-alkali glass substrate 2 does not have sufficient wettability is its chemical composition. Silicon dioxide (SiO ₂ ) Is a material with good wettability, but this is the reason why the substrate contains only about 50%, and this shows insufficient wettability. As described above, sufficient wettability can be obtained by coating the silicon dioxide film 3 by the above thickness.
[0050]
On the other hand, the single crystal silicon piece 6 generally has a disk shape of 6, 8, or 12 inches. In general, impurities such as boron and phosphorus having a certain concentration are doped, and the specific resistance is as low as about 10 Ωcm. A crystal orientation having the (100) plane is most easily available. First, as shown in FIGS. 3C to 3D, a silicon dioxide film 4 is formed to a thickness of about 50 to 300 nm by a thermal oxidation method or the like so that impurities are not diffused from the surface. As the thermal oxidation method, dry O ₂ Although oxidation may be used, the oxidation rate is slow in this method. Therefore, it takes an enormous time to form the 300 nm oxide film. For this reason, a method having a high oxidation rate such as pyro-oxidation or steam oxidation may be used.
[0051]
Thereafter, as shown in FIG. 3E, hydrogen ions are implanted. As an example of the injection conditions, the acceleration voltage is 12 to 36 kV and the injection amount is 4 to 6 × 10. ¹⁶ cm ^-2 Degree. By this hydrogen ion implantation, as indicated by reference numeral 10, a hydrogen ion implantation surface is formed on the surface of the single crystal silicon piece 6 having a predetermined depth (40 to 200 nm).
[0052]
The high strain point non-alkali glass substrate 2 and the single crystal silicon piece 6 thus prepared are cleaned with a so-called SCI solution in which ammonia water and hydrogen peroxide water are diluted with pure water in order to remove particles on the surface. Is done. The SCI solution is prepared by mixing, for example, commercially available 28% ammonia water, 35% hydrogen peroxide water, and pure water having a specific resistance of 10 MΩcm or more in a ratio of 1: 2: 12, and the like. Created by heating to a temperature of ℃. The high strain point non-alkali glass substrate 2 and the single crystal silicon piece 6 are immersed in this SCI solution for about 10 minutes to remove particles on the surface. After this, remove the particles by washing with pure water under an ultrasonic wave or megasonic for about 5 minutes, then wash for about 10 minutes under running pure water, remove the chemical solution from each surface, and use a spin drier. dry.
[0053]
The high strain point non-alkali glass substrate 2 and the single crystal silicon piece 6 cleaned in this way are bonded by van der Waals force when the surfaces are brought close to each other. This is shown in FIG. At this time, the single crystal silicon piece 6 is turned upside down to bring the hydrogen ion implantation surface into close contact with the high strain point non-alkali glass substrate 2. The force at the time of close contact may be very small (for example, about several hundreds g) when the surface is sufficiently washed and the surface is sufficiently activated. The attractive force due to the van der Waals force changes in inverse proportion to the sixth power of the interatomic distance. Therefore, when the surface atoms come close to each other so that they can be compared with the solid interatomic distance, they become bonded. When the high strain point non-alkali glass substrate 2 is a transparent substrate, the bonded state can be confirmed by the disappearance of the interference color by visual observation from the back surface.
[0054]
The high strain point non-alkali glass substrate 2 to which the single crystal silicon pieces 6 are bonded in this way is chemically treated by applying heat treatment from the bonding (van der Waals bonding) caused by being close to each other as described above. It becomes a bonded bond. That is, the hydrogen on the surface is dissipated by heat, and the vacant hands of the atoms on the respective substrates are bonded to enhance the adhesive force. According to the inventor of the present invention, it has been confirmed that even if the temperature is not as high as 800 to 1200 ° C. as in JP-A-11-163363, the temperature is about 300 ° C. or higher. On the other hand, since the high strain point non-alkali glass which is a substrate has a strain point of 700 ° C. or lower, it is deformed when the temperature is raised to a temperature higher than this. When used, the maximum temperature of the heat treatment for strengthening the adhesive strength as described above is limited to about 650 ° C., and according to the present inventors, it has been confirmed that sufficient bonding strength can be obtained even when the maximum temperature is about 600 ° C. It was.
[0055]
The high strain point alkali-free glass substrate 2 and the single crystal silicon piece 6 bonded in this way are 1 × 10 at the interface. ^Five dyn / cm ² It has a degree of adhesive strength, which is a value that can be compared with the adhesive strength of a thin film formed by a CVD apparatus or the like. The evaluation of the adhesive force is performed by a test in which the single crystal silicon thin film 5 that is adhered is peeled off from the end portion. According to "Elastic theory" (Eri de Landau-Yem Rifschitz, translated by Sato Tsunezo, Tokyo Books), a thin layer (thickness h) from the object is against the surface traction force on the separation surface. When peeled off by the acting external force, the adhesive force α per unit length is
[0056]
[Expression 1]

[0057]
It is represented by Where E is the Young's modulus of the thin film, σ is the Poisson's ratio of the thin film, h is the thickness of the thin film, x is the horizontal axis of the plane where the thin film is in close contact, and ζ is peeled off in the normal direction of the thin film It is the displacement of the film that is going to be. This adhesive force α is obtained by obtaining a second-order partial differential coefficient with respect to the x-axis of the displacement in the normal direction called ζ.
[0058]
In addition, when heat treatment for strengthening the adhesive strength is performed, the fact that the coefficient of thermal expansion of the glass substrate is larger than that of the single crystal silicon piece 6 is a factor for stable adhesion. The thermal expansion coefficient of silicon is 2.6 × 10 near room temperature. ^-6 deg ^-1 About 4.1 × 10 at a temperature of about 500 ° C. ^-6 deg ^-1 Degree. On the other hand, the high strain point non-alkali glass substrate used in the present invention can obtain a substrate having a thermal expansion coefficient equal to or larger than that of single crystal silicon in a temperature range from room temperature to about 700 ° C., for example, alkaline earth -Aluminoborosilicate glass, barium-aluminoborosilicate glass, alkaline earth-zinc-lead-aluminoborosilicate glass or alkaline earth-zinc-aluminoborosilicate glass, over a temperature range of 50-300 ° C, The coefficient of thermal expansion is 4.7 × 10 ^-6 deg ^-1 Degree. Therefore, in the temperature range of 50 to 300 ° C., the high strain point non-alkali glass substrate 2 has a higher coefficient of thermal expansion. In the present invention, the amorphous non-alkali glass substrate refers to a trace amount having an alkali content of 1% or less, and specific products include, for example, Corning # 1737 glass manufactured by Corning.
[0059]
FIG. 4 schematically shows the state of warping when the bonded high strain point non-alkali glass substrate 2 and single crystal silicon piece 6 are placed in a furnace for the heat treatment and are at a high temperature. Due to the thermal expansion coefficient as described above, when exposed to a high temperature for heat treatment, the high strain point non-alkali glass substrate 2 warps downward in a convex direction. At this time, the portion of the single crystal silicon piece 6 in the vicinity of the high strain point non-alkali glass substrate 2 is pulled in the lateral direction among the two bonded by the van der Waals force. When the alkali glass substrate 2 warps downward in the convex direction, the force peeled off from the end of the single crystal silicon piece 6 coincides with the warping direction, and this cancels out the force that the single crystal silicon piece 6 peels off the bonding surface. Peeling does not occur, causing a bond to be formed.
[0060]
However, separation due to hydrogen embrittlement on the implantation surface 10 of the hydrogen ions does not occur unless the temperature is about 600 ° C. or higher. Therefore, by setting the temperature to about 600 ° C., a heat treatment that strengthens the adhesive force, The heat treatment for separating the single crystal silicon pieces 6 can be efficiently performed collectively. As an example, when heat treatment is performed at 600 ° C. for 30 to 60 minutes, the adhesive strength of the bonded surfaces is strengthened as described above, and the single crystal silicon piece 6 is separated at the hydrogen ion implantation surface 10. The separated state is shown in FIGS. 1 and 3 (g).
[0061]
When TDS (Temperature Desorption Spectroscopy) is evaluated during the heat treatment, hydrogen may escape from the temperature exceeding 300 ° C. in the single crystal silicon piece 6 or from the surfaces of the silicon dioxide films 3 and 4. Observed. When this hydrogen escapes, the hydrogen rapidly dissipates from the hydrogen ion implantation surface 10 of the single crystal silicon piece 6, and the single crystal silicon piece 6 is separated into the single crystal silicon thin film 5 and the single crystal silicon piece 6 a. Thus, the single crystal silicon thin film 5 is obtained on the high strain point alkali-free glass substrate 2. By the process as described above, the SOI substrate 1 having the single crystal silicon thin film 5 with a thickness of 40 to 200 nm is formed. It is important that the channel portion of the transistor in which the element is formed is completely depleted within this film thickness range.
[0062]
In the above description, the heat treatment has been described in one stage. However, the adhesion can be further strengthened by performing it in multiple stages. In particular, the heat treatment for strengthening the adhesive force (temperature of about 300 to 550 ° C.) and the heat treatment for separation may be performed in separate stages. In this case, the adhesive strength is strengthened at a temperature of about 300 ° C. or more as described above. The first stage heat treatment for strengthening the adhesive force is performed for a time treatment, and then the second stage heat treatment for separation is performed at a temperature of 600 to 700 ° C. The number of defective products in which the film is peeled off and the single crystal silicon piece 6 itself is peeled off after the heat treatment can be reduced.
[0063]
In the above description, an example in which an electric furnace is used for the heat treatment is shown. However, the heat treatment may be performed by instantaneous thermal annealing including a peak temperature of approximately 850 ° C. or more by light (lamp) annealing such as laser. Good. In the heating by the electric furnace, since the heat capacity is large, the high strain point non-alkali glass substrate 2 is cracked when the temperature is rapidly raised and lowered, whereas the heating by the instantaneous heat annealing has a small heat capacity. Even if the temperature is rapidly raised or lowered, the crack does not occur. Furthermore, the throughput in manufacturing the SOI substrate 1 can be improved.
[0064]
In the SOI substrate 1 produced as described above, for example, when a material that transmits visible light is used for the high strain point non-alkali glass substrate 2, a thin film transistor is formed in the layer of the single crystal silicon thin film 5, It is processed into a TFT liquid crystal display (LCD) device, an organic light emitting diode (OLED) display device, and the like. By introducing the SOI substrate 1 according to the present invention into such an active matrix driving display panel, the transistor characteristics can be made uniform, stable and high performance. It is also possible to integrate systems such as drivers and timing controllers. Moreover, the single crystal silicon piece 6 should just be affixed to a required part, and it can respond also to a board | substrate of a large area.
[0065]
As described above, in the SOI substrate 1 according to the present invention, sufficient bonding strength can be obtained even at about 300 ° C. in the SOI substrate formed by bonding the single crystal silicon thin film 5 obtained by the smart cut method or the like to the substrate. The high strain point non-alkali glass substrate 2 which is an amorphous non-alkali glass substrate is used as the substrate.
[0066]
Therefore, there is no need to use crystallized glass or high heat-resistant glass whose composition has been adjusted, and an SOI substrate can be manufactured at low cost by using a high strain point non-alkali glass generally used for liquid crystal display panels driven by an active matrix. Can be manufactured. Further, since the temperature of the heat treatment is low, the alkali metal diffusion into the semiconductor layer can be reduced by orders of magnitude compared to the conventional case where the heat treatment is performed at 800 to 1200 ° C. Thus, the thickness of the silicon dioxide films 3 and 4 formed to prevent the diffusion can be made thinner than before, and the throughput can be improved.
[0067]
Further, by using the high strain point non-alkali glass substrate 2 having a thermal expansion coefficient equal to or larger than that of single crystal silicon in a temperature range from room temperature to about 700 ° C., single crystal silicon having a maximum temperature of about 600 ° C. During separation from the piece 6 to the single crystal silicon thin film 5 and heat treatment for improving the adhesion of the single crystal silicon piece 6 to the high strain point non-alkali glass substrate 2, substrate cracking or peeling of the single crystal silicon thin film 5 is performed. Can be suppressed.
[0068]
In the above description, the single crystal silicon piece 6 has been described on the basis of the (100) plane having the most easily available surface, but other crystal orientations such as the (110) plane and the (100) plane are also possible. Similarly, an SOI substrate having a silicon film surface that is flat enough not to require surface polishing can be manufactured from the time when it is completed.
[0069]
And in the (110) orientation, the closest atoms are arranged in the (110) plane most in the (110) orientation, so when the single crystal silicon piece 6 is separated, The separation surface becomes flat and the defect rate of the silicon transistor formed on the SOI substrate 1 can be reduced.
[0070]
Further, when the material has a (111) orientation, the plane to be separated coincides with the cleavage plane of the single crystal silicon block, and the nearest atoms exist at any small angle from the (111) plane in the same plane. Therefore, when the single crystal silicon piece 6 is separated, the separation surface becomes flat and the defect rate of the silicon transistor formed on the SOI substrate 1 can be further reduced.
[0071]
The following will describe another embodiment of the present invention with reference to FIG. 5 and FIG.
[0072]
FIG. 5 is a diagram showing a procedure for creating the SOI substrate 11 according to another embodiment of the present invention. This SOI substrate 11 is similar to the above-described SOI substrate 1, and corresponding portions are denoted by the same reference numerals and description thereof is omitted. It should be noted that in this SOI substrate 11, as shown in FIG. 5 (h), the polycrystalline silicon thin film 12 and the single crystal silicon thin film 5 are formed on the same high strain point non-alkali glass substrate 2. It is.
[0073]
First, as shown in FIGS. 5A to 5B, an insulating film 13 serving as an undercoat film is formed on a high strain point non-alkali glass substrate 2 by plasma enhanced chemical vapor deposition (PECVD). A thickness of about 300 nm is formed. The uppermost layer of the undercoat film is the silicon dioxide film having good wettability. Next, as shown in FIG. 5C, the amorphous silicon film 14 is formed to have a thickness of 30 to 200 nm by the PECVD method, and dehydrogenation annealing is performed at 400 to 500 ° C. to remove hydrogen in the amorphous silicon film 14. Thereafter, as shown in FIGS. 5D to 5E, the region 14a where the TFT is formed by the amorphous silicon film 14 is melted and crystallized (laser crystallization) with an excimer laser, and the polycrystalline silicon thin film 12 and To do. It is important that the thickness of the polycrystalline silicon thin film 12 at this time is matched with the thickness of the single crystal silicon thin film 5 to be formed later, for example, 40 to 200 nm.
[0074]
After the laser crystallization, as shown in FIGS. 5E to 5F, the silicon film in the region 14b to which the single crystal silicon thin film 5 is bonded is etched and removed. At this time, if the surface of the polycrystalline silicon thin film 12 is in close contact with the photoresist and contamination is a concern, a silicon dioxide film is formed on the surface of the polycrystalline silicon thin film 12 to a thickness of about 30 to 100 nm before applying the photoresist. You just have to. Further, from the thickness of the polycrystalline silicon thin film 12, if necessary, the thickness of the single crystal silicon thin film 5 including the part of the insulating film 13 in the thickness direction is equal to the thickness of the polycrystalline silicon thin film 12. Etching is removed to match.
[0075]
Subsequently, the single-crystal silicon piece 6 into which the hydrogen ions have been implanted is cut into a shape that covers the region 14b that has been removed by etching, as in FIGS. 3 (f) to 3 (g). As shown in FIG. 5 (h), the single crystal silicon piece 6 is bonded to the etched region 14b, and the single crystal silicon piece 6 is implanted with hydrogen ions through a heating process of about 600 ° C. The single crystal silicon thin film 5 is obtained by separating from the surface 10.
[0076]
Even in the case where both of these thin films 5 and 12 are present or only the single crystal silicon thin film 5 is used as in the aforementioned SOI substrate 1, the TFT formation process is as shown in FIG. FIG. 6 is a cross-sectional view of an example of the thin film transistor 21 made from the SOI substrate 11. The procedure for producing the thin film transistor 21 will be briefly described. First, the thin films 5 and 12 are patterned in accordance with the size of the transistor to be formed. Next, the gate insulating film 22 is formed. The gate insulating film 22 is optimally a film mainly composed of silicon dioxide, and has a thickness of 30 to 200 nm, for example. When the gate insulating film 22 is formed at a temperature of 200 to 400 ° C., the gate insulating film 22 becomes a film having poor density. Therefore, after the film formation, densification annealing is performed at a temperature of about 600 ° C. This annealing also serves as a process of returning the crystallinity of the single crystal silicon film implanted with hydrogen ions to the crystallinity before implantation.
[0077]
Thereafter, a gate electrode film 23 is formed to a thickness of about 300 nm and patterned into an appropriate shape. Further, ions are implanted into the thin films 5 and 12 using the gate electrode film 23 as a mask, and n ⁺ Or p ⁺ Region 24 is formed. At this time, in the present invention, the channel region 25 can be completely depleted by setting the thickness of the single crystal silicon thin film 5 to about 200 nm or less as described above.
[0078]
Subsequently, after the interlayer insulating film 26 is formed to have a thickness of about 400 nm, a hole is formed at a location where the source / drain electrodes are contacted. Thereafter, a source / drain metal film 27 is formed to a thickness of about 400 nm and patterned. In some cases, in the n-type MOS TFT, a high reliability is obtained as an LDD structure at the time of ion implantation.
[0079]
In the thin film transistor 21 thus produced, the portion where the single crystal silicon thin film 5 is obtained by bonding and separation is from the grain boundary seen in the polycrystalline silicon thin film 12 because the silicon film serving as the channel portion is a single crystal. Therefore, high characteristics can be obtained, and the characteristics are uniform over all transistors on the same single crystal silicon thin film 5. For this reason, for example, when used for an LCD display, it is used for a source driver section and peripheral circuits. On the other hand, a portion where the thin film transistor 21 is formed from the polycrystalline silicon thin film 12 is used for a picture element portion or a gate driver portion having relatively poor characteristics.
[0080]
According to the results of the creation of the present inventors, the single-crystal silicon thin film transistor has a field effect mobility of 500 cm in the NMOS TFT. ² / V · sec, threshold voltage is 1.0V, off current is 1 × 10 ^-12 A, PMOS TFT has a field effect mobility of 250 cm. ² / V · sec, threshold voltage -1.0V, off current 1 × 10 ^-12 In A, a thin film transistor excellent in uniformity was obtained.
[0081]
By configuring in this way, it is possible to obtain the SOI substrate 11 in which the bonded region 14b of the single crystal silicon thin film 5 and the region 14a of the polycrystalline silicon thin film 12 have substantially the same height. As a result, most of the subsequent steps including the island etching can be simultaneously performed on the regions 14a and 14b. Also, transistors and circuits with small steps are formed. For example, in the case of a liquid crystal panel, it is superior in cell thickness control.
[0082]
【The invention's effect】
The SOI substrate of the present invention, as described above, in an SOI substrate created by bonding a single crystal silicon thin film obtained by a so-called smart cut method or the like to the substrate, when the single crystal silicon piece is bonded to the substrate, Focusing on the fact that sufficient bonding strength can be obtained even at about 300 ° C., an amorphous non-alkali glass substrate is used as the substrate, the maximum temperature is about 600 ° C., and the single crystal silicon piece is bonded to the substrate and Perform separation into thin films.
[0083]
Therefore, it is not necessary to use a crystallized glass or a high heat-resistant glass whose composition is adjusted, and a high strain point non-alkali glass generally used for liquid crystal display panels driven by an active matrix is used. A substrate can be manufactured. In order to prevent alkali metal from diffusing into the semiconductor layer, for example, an oxide film formed on one side of the single crystal silicon, a silicon dioxide film formed on the substrate side, or the like has a low heat treatment temperature. Therefore, it can be made thinner than before, and the throughput can be improved.
[0084]
In the SOI substrate of the present invention, as described above, the amorphous alkali-free glass substrate has a thermal expansion coefficient equal to or larger than that of the single crystal silicon.
[0085]
Therefore, the substrate warps downward in the convex direction during the heat treatment in the process of dissipating and separating the hydrogen ions implanted into the single crystal silicon piece and the process of increasing the adhesion of the single crystal silicon piece to the substrate. The peeling force does not occur in accordance with the direction in which the force peeled from the end of the single crystal silicon piece warps. Thereby, it is possible to suppress substrate cracking and peeling of the single crystal silicon piece.
[0086]
Furthermore, as described above, the SOI substrate of the present invention is obtained by replacing the amorphous alkali-free glass substrate with alkaline earth-aluminoborosilicate glass, barium-aluminoborosilicate glass, alkaline earth-zinc-lead-alumino. Borosilicate glass or alkaline earth-zinc-aluminoborosilicate glass.
[0087]
Therefore, a substrate having a thermal expansion coefficient equal to or larger than that of the above-described single crystal silicon can be obtained.
[0088]
In the SOI substrate of the present invention, the surface to which the single crystal silicon piece is bonded is the (111) plane, the (110) plane, or the (100) plane as described above.
[0089]
Therefore, it is possible to manufacture an SOI substrate having a silicon film surface that is flat enough that surface polishing is not necessary. Further, in the case where the surface that is most readily available is the one with the (110) orientation as compared with the one with the (100) orientation, the nearest neighbor atoms are arranged most in this (110) plane. When separated, the separation surface becomes flat and the defect rate of the silicon transistor formed on this SOI substrate can be reduced. Furthermore, when the material has the (111) orientation, the surface to be separated coincides with the cleavage plane of the single crystal silicon block, and within the same plane, the closest atoms exist at any angle from the (111) surface. Therefore, when the single crystal silicon piece is separated, the separation surface becomes flat and the defect rate of the silicon transistor formed on the SOI substrate can be further reduced.
[0090]
Furthermore, in the display device of the present invention, as described above, the amorphous non-alkali glass substrate is made of an amorphous glass material that transmits visible light, and any one of the above SOI substrates is used.
[0091]
Therefore, a high-performance transistor can be formed over a large substrate for a display device.
[0092]
In addition, the SOI substrate manufacturing method of the present invention is a method for manufacturing an SOI substrate in which a single crystal silicon thin film obtained by a so-called smart cut method or the like is bonded to a substrate as described above. Note that sufficient bonding strength can be obtained even at about 300 ° C. when the substrate is bonded to the substrate. An amorphous non-alkali glass substrate is used as the substrate, and the maximum temperature is about 600 ° C. Is bonded to a substrate and separated into a thin film.
[0093]
Therefore, it is not necessary to use a crystallized glass or a high heat-resistant glass whose composition is adjusted, and a high strain point non-alkali glass generally used for liquid crystal display panels driven by an active matrix is used. A substrate can be manufactured. In order to prevent alkali metal from diffusing into the semiconductor layer, for example, an oxide film formed on one side of the single crystal silicon, a silicon dioxide film formed on the substrate side, or the like has a low heat treatment temperature. Therefore, it can be made thinner than before, and the throughput can be improved.
[0094]
Furthermore, in the method for manufacturing an SOI substrate of the present invention, as described above, the heat treatment is performed in a multi-step temperature step of 300 ° C. or more and 700 ° C. or less.
[0095]
Therefore, peeling of the single crystal silicon thin film can be further reduced.
[0096]
In addition, the SOI substrate manufacturing method of the present invention is a method for manufacturing an SOI substrate in which a single crystal silicon thin film obtained by a smart cut method or the like is bonded to a substrate as described above. Focusing on the fact that sufficient bonding strength can be obtained even at about 300 ° C. when bonding to the substrate, heat treatment is performed by lamp annealing including a peak temperature of approximately 850 ° C. or higher.
[0097]
Therefore, it is not necessary to use a crystallized glass or a high heat-resistant glass whose composition is adjusted, and a high strain point non-alkali glass generally used for liquid crystal display panels driven by an active matrix is used. A substrate can be manufactured. In order to prevent alkali metal from diffusing into the semiconductor layer, for example, an oxide film formed on one side of the single crystal silicon, a silicon dioxide film formed on the substrate side, or the like has a low heat treatment temperature. Therefore, it can be made thinner than before, and the throughput can be improved.
[0098]
In addition, heating with an electric furnace has a large heat capacity, so if the glass substrate is heated up and down rapidly, it will crack, whereas heating with an instantaneous heat anneal has a small heat capacity, so it will rapidly rise and fall. Even if it does not cause a crack in the glass substrate. Furthermore, the throughput in manufacturing the SOI substrate can be improved.
[0099]
Furthermore, as described above, the method for manufacturing an SOI substrate according to the present invention can be used to produce an SOI substrate in which a transistor is formed on a polycrystalline silicon thin film as well as a single crystal silicon thin film. Further, the polycrystalline silicon layer in a predetermined region including the region to be bonded is removed by etching, and a part of the same region in the thickness direction of the silicon dioxide film is removed by etching.
[0100]
Therefore, an SOI substrate in which the bonded single crystal silicon thin film region and the polycrystalline silicon thin film region have approximately the same height can be obtained. The region and the polycrystalline silicon thin film region can be processed simultaneously. Also, transistors and circuits with small steps are formed. For example, in the case of a liquid crystal panel, it is superior in cell thickness control.
[0101]
Moreover, the manufacturing method of the SOI substrate of this invention makes the implantation depth of the said hydrogen ion 40-200 nm as mentioned above.
[0102]
Therefore, a fully depleted transistor can be obtained, the characteristics can be dramatically improved, the processing can be facilitated, and the manufacturing safety factor can be increased.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of an SOI substrate according to an embodiment of the present invention.
FIG. 2 is a cross-sectional view showing a state before a single crystal silicon piece is bonded to a high strain point non-alkali glass substrate.
3 is a diagram showing a manufacturing procedure of the SOI substrate shown in FIG. 1; FIG.
FIG. 4 is a diagram schematically showing the state of warping during heat treatment of a single crystal silicon piece bonded to a high strain point non-alkali glass substrate according to the present invention.
FIG. 5 is a diagram showing a procedure for manufacturing an SOI substrate according to another embodiment of the present invention.
6 is a cross-sectional view of an example of a thin film transistor manufactured from the SOI substrate illustrated in FIG.
[Explanation of symbols]
1,11 SOI substrate
2 High strain point alkali-free glass substrate (amorphous alkali-free glass substrate)
3,4 Silicon dioxide film
5 Single crystal silicon thin film
6 Single crystal silicon pieces
10 Hydrogen ion implantation surface
12 Polycrystalline silicon thin film
13 Insulating film
14 Amorphous silicon film
21 Thin film transistor
22 Gate insulation film
23 Gate electrode film
24 n ⁺ Or p ⁺ region
25 channel region
26 Interlayer insulation film
27 Source / drain metal film

Claims (5)

On a substrate, laminating the single crystal silicon pieces into which the hydrogen ions are implanted before Symbol method for producing S OI substrate that form a single-crystal silicon thin film single crystal silicon pieces is divided by implantation layer of the hydrogen ion,
While using an amorphous non-alkali glass substrate having a strain point of 700 ° C. or lower for the substrate,
Sequentially depositing a silicon dioxide film and an amorphous silicon film on the surface of the amorphous alkali-free glass substrate;
Forming a polycrystalline silicon thin film by thermally crystallizing the amorphous silicon film to grow a polycrystalline silicon layer; and
Etching away the polycrystalline silicon layer in a predetermined region and etching away a part of the same region in the thickness direction of the silicon dioxide film;
Oxidizing the surface of the single crystal silicon piece in advance or laminating a silicon dioxide film on the surface of the single crystal silicon piece in advance and implanting the hydrogen ions;
Cutting the single crystal silicon piece implanted with the hydrogen ions into a shape covering the etched area;
Bonding the cut single crystal silicon piece in close contact with the region where the hydrogen ion implantation side has been removed by etching; and
The substrate on which the single crystal silicon piece is bonded is heat-treated at a maximum temperature of 600 ° C. to 700 ° C., whereby the single crystal silicon piece is divided by the hydrogen ion implantation layer by hydrogen embrittlement. And a dividing step of forming a single crystal silicon thin film thereon . Prior to the dividing step, the substrate on which the single crystal silicon piece is bonded is heat-treated at a temperature of 300 ° C. or higher and 550 ° C. or lower to enhance the adhesive force between the substrate and the crystalline silicon piece. The method for manufacturing an SOI substrate according to claim 1 , wherein: On a substrate, laminating the single crystal silicon pieces into which the hydrogen ions are implanted before Symbol method for producing S OI substrate that form a single-crystal silicon thin film single crystal silicon pieces is divided by implantation layer of the hydrogen ion,
While using an amorphous non-alkali glass substrate having a strain point of 700 ° C. or lower for the substrate,
Sequentially depositing a silicon dioxide film and an amorphous silicon film on the surface of the amorphous alkali-free glass substrate;
Forming a polycrystalline silicon thin film by thermally crystallizing the amorphous silicon film to grow a polycrystalline silicon layer; and
Etching away the polycrystalline silicon layer in a predetermined region and etching away a part of the same region in the thickness direction of the silicon dioxide film;
Oxidizing the surface of the single crystal silicon piece in advance or laminating a silicon dioxide film on the surface of the single crystal silicon piece in advance and implanting the hydrogen ions;
Cutting the single crystal silicon piece implanted with the hydrogen ions into a shape covering the etched area;
Bonding the cut single crystal silicon piece in close contact with the region where the hydrogen ion implantation side has been removed by etching; and
The substrate on which the single crystal silicon piece is bonded is heat-treated by lamp annealing including a peak temperature of 850 ° C. or more, whereby the single crystal silicon piece is divided by the hydrogen ion implantation layer by hydrogen embrittlement. And a dividing step of forming a single crystal silicon thin film thereon . The method for manufacturing an SOI substrate according to any one of claims 1 to 3, wherein the implantation depth of the hydrogen ion is 40 to 200 nm. After forming the single crystal silicon pieces be bonded side on only the silicon dioxide film in the substrate, any claim 1, characterized in that bonding the single crystal silicon pieces on the silicon dioxide film 4 A method for manufacturing an SOI substrate according to claim 1.

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