JP4712686B2 - 半導体デバイス製造方法 - Google Patents

半導体デバイス製造方法 Download PDF

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Publication number
JP4712686B2
JP4712686B2 JP2006502973A JP2006502973A JP4712686B2 JP 4712686 B2 JP4712686 B2 JP 4712686B2 JP 2006502973 A JP2006502973 A JP 2006502973A JP 2006502973 A JP2006502973 A JP 2006502973A JP 4712686 B2 JP4712686 B2 JP 4712686B2
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JP
Japan
Prior art keywords
layer
silicon
nitrogen
semiconductor device
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2006502973A
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English (en)
Japanese (ja)
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JP2006516823A (ja
JP2006516823A5 (enExample
Inventor
オー． アデトゥトゥ、オルブンミ
オー． アルグ、ドナルド
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NXP USA Inc
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NXP USA Inc
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Publication date
Application filed by NXP USA Inc filed Critical NXP USA Inc
Publication of JP2006516823A publication Critical patent/JP2006516823A/ja
Publication of JP2006516823A5 publication Critical patent/JP2006516823A5/ja
Application granted granted Critical
Publication of JP4712686B2 publication Critical patent/JP4712686B2/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes
    • H01L21/0276—Photolithographic processes using an anti-reflective coating
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004—Photosensitive materials
    • G03F7/09—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
    • G03F7/091—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers characterised by antireflection means or light filtering or absorbing means, e.g. anti-halation, contrast enhancement

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Structural Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Architecture (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP2006502973A 2003-01-29 2004-01-23 半導体デバイス製造方法 Expired - Fee Related JP4712686B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/353,886 2003-01-29
US10/353,886 US6908852B2 (en) 2003-01-29 2003-01-29 Method of forming an arc layer for a semiconductor device
PCT/US2004/001924 WO2004070471A2 (en) 2003-01-29 2004-01-23 Arc layer for semiconductor device

Publications (3)

Publication Number Publication Date
JP2006516823A JP2006516823A (ja) 2006-07-06
JP2006516823A5 JP2006516823A5 (enExample) 2007-03-08
JP4712686B2 true JP4712686B2 (ja) 2011-06-29

Family

ID=32736279

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006502973A Expired - Fee Related JP4712686B2 (ja) 2003-01-29 2004-01-23 半導体デバイス製造方法

Country Status (6)

Country Link
US (1) US6908852B2 (enExample)
JP (1) JP4712686B2 (enExample)
KR (1) KR101085279B1 (enExample)
CN (1) CN100481418C (enExample)
TW (1) TW200508805A (enExample)
WO (1) WO2004070471A2 (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4186725B2 (ja) * 2003-06-24 2008-11-26 トヨタ自動車株式会社 光電変換素子
US7271464B2 (en) * 2004-08-24 2007-09-18 Micron Technology, Inc. Liner for shallow trench isolation
US7202164B2 (en) 2004-11-19 2007-04-10 Chartered Semiconductor Manufacturing Ltd. Method of forming ultra thin silicon oxynitride for gate dielectric applications
US7629256B2 (en) * 2007-05-14 2009-12-08 Asm International N.V. In situ silicon and titanium nitride deposition
US20080299775A1 (en) * 2007-06-04 2008-12-04 Applied Materials, Inc. Gapfill extension of hdp-cvd integrated process modulation sio2 process
US7867921B2 (en) * 2007-09-07 2011-01-11 Applied Materials, Inc. Reduction of etch-rate drift in HDP processes
US7745350B2 (en) * 2007-09-07 2010-06-29 Applied Materials, Inc. Impurity control in HDP-CVD DEP/ETCH/DEP processes
US7972968B2 (en) * 2008-08-18 2011-07-05 Applied Materials, Inc. High density plasma gapfill deposition-etch-deposition process etchant
JP5155070B2 (ja) * 2008-09-02 2013-02-27 株式会社日立国際電気 半導体装置の製造方法、基板処理方法及び基板処理装置
US20110151222A1 (en) * 2009-12-22 2011-06-23 Agc Flat Glass North America, Inc. Anti-reflective coatings and methods of making the same
CN102810504A (zh) * 2011-05-31 2012-12-05 无锡华润上华半导体有限公司 厚铝生长工艺方法
US8497211B2 (en) 2011-06-24 2013-07-30 Applied Materials, Inc. Integrated process modulation for PSG gapfill
US9018108B2 (en) 2013-01-25 2015-04-28 Applied Materials, Inc. Low shrinkage dielectric films

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5378659A (en) * 1993-07-06 1995-01-03 Motorola Inc. Method and structure for forming an integrated circuit pattern on a semiconductor substrate
JP3326663B2 (ja) * 1994-04-05 2002-09-24 ソニー株式会社 半導体装置の製造方法
US5918147A (en) * 1995-03-29 1999-06-29 Motorola, Inc. Process for forming a semiconductor device with an antireflective layer
US6004850A (en) * 1998-02-23 1999-12-21 Motorola Inc. Tantalum oxide anti-reflective coating (ARC) integrated with a metallic transistor gate electrode and method of formation
US6100559A (en) * 1998-08-14 2000-08-08 Advanced Micro Devices, Inc. Multipurpose graded silicon oxynitride cap layer
US6316349B1 (en) * 1998-11-12 2001-11-13 Hyundai Electronics Industries Co., Ltd. Method for forming contacts of semiconductor devices

Also Published As

Publication number Publication date
US20040145029A1 (en) 2004-07-29
JP2006516823A (ja) 2006-07-06
CN1765019A (zh) 2006-04-26
WO2004070471A2 (en) 2004-08-19
WO2004070471A3 (en) 2005-11-03
CN100481418C (zh) 2009-04-22
KR101085279B1 (ko) 2011-11-22
US6908852B2 (en) 2005-06-21
KR20050096957A (ko) 2005-10-06
TW200508805A (en) 2005-03-01

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