JP4708865B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP4708865B2 JP4708865B2 JP2005161085A JP2005161085A JP4708865B2 JP 4708865 B2 JP4708865 B2 JP 4708865B2 JP 2005161085 A JP2005161085 A JP 2005161085A JP 2005161085 A JP2005161085 A JP 2005161085A JP 4708865 B2 JP4708865 B2 JP 4708865B2
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- 239000004065 semiconductor Substances 0.000 title claims description 64
- 239000011295 pitch Substances 0.000 description 9
- 238000000034 method Methods 0.000 description 4
- 230000002093 peripheral effect Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
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- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
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- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/494—Connecting portions
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
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- Wire Bonding (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Description
前記外部接続パッドの全てもしくは一部が複数のパッド列に配置され、
前記IO領域に形成されたIOセル同士の間には、該IOセル同士を分離するIOセル隣接境界領域が設けられ、
前記IO領域に形成された少なくとも3つのIOセルが、その間に前記IOセル隣接境界領域を設けることなくまとめられて、1つの電源用もしくはグランド用のIOセルとして配置され、これに対応する1つの電源用もしくはグランド用の外部接続パッドが、前記半導体チップの最も外側のパッド列の領域もしくは該最も外側のパッド列の領域を含む領域に配置され、前記1つの電源用もしくはグランド用のIOセルと前記1つの電源用もしくはグランド用の外部接続パッドとが1本の引き込み線を介して接続されていることを特徴とする半導体装置を提供するものである。
前記電源用もしくはグランド用の外部接続パッドが、その両側の、前記外側のパッド列の領域に配置された他の外部接続パッドの間もしくは前記内側のパッド列の領域に配置された他の外部接続パッド間に配置されていることが好ましい。
以上、本発明の半導体装置について詳細に説明したが、本発明は上記実施形態に限定されず、本発明の主旨を逸脱しない範囲において、種々の改良や変更をしてもよいのはもちろんである。
12 半導体チップ
14 コア内部領域
16 IO領域
18 パッド領域
20 IOセル
22 外部接続パッド
24 電源リング
26 グランドリング
28、30 引き込み線
32 IOセル隣接境界領域
Claims (3)
- 内部回路が形成されるコア内部領域が半導体チップの中央部に配置され、IOセルが形成されるIO領域が前記コア内部領域の各辺に沿って配置され、各々の前記IOセルに対応する外部接続パッドが形成されるパッド領域が前記IO領域の上層又は外側に配置された半導体装置であって、
前記外部接続パッドの全てもしくは一部が複数のパッド列に配置され、
前記IO領域に形成されたIOセル同士の間には、該IOセル同士を分離するIOセル隣接境界領域が設けられ、
前記IO領域に形成された少なくとも3つのIOセルが、その間に前記IOセル隣接境界領域を設けることなくまとめられて、1つの電源用もしくはグランド用のIOセルとして配置され、これに対応する1つの電源用もしくはグランド用の外部接続パッドが、前記半導体チップの最も外側のパッド列の領域もしくは該最も外側のパッド列の領域を含む領域に配置され、前記1つの電源用もしくはグランド用のIOセルと前記1つの電源用もしくはグランド用の外部接続パッドとが1本の引き込み線を介して接続されていることを特徴とする半導体装置。 - 前記電源用もしくはグランド用の外部接続パッドから、これに対応する前記電源用もしくはグランド用のIOセルもしくは電源リングまでの引き込み線の幅は、他の外部接続パッドから、これに対応するIOセルまでの引き込み線の幅よりも太いことを特徴とする請求項1に記載の半導体装置。
- 前記外部接続パッドが、外側のパッド列および内側のパッド列からなる千鳥状に配置され、
前記電源用もしくはグランド用の外部接続パッドが、その両側の、前記外側のパッド列の領域に配置された他の外部接続パッドの間もしくは前記内側のパッド列の領域に配置された他の外部接続パッド間に配置されていることを特徴とする請求項1または2に記載の半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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JP2005161085A JP4708865B2 (ja) | 2005-06-01 | 2005-06-01 | 半導体装置 |
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JP2005161085A JP4708865B2 (ja) | 2005-06-01 | 2005-06-01 | 半導体装置 |
Publications (3)
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JP2006339335A JP2006339335A (ja) | 2006-12-14 |
JP2006339335A5 JP2006339335A5 (ja) | 2008-05-01 |
JP4708865B2 true JP4708865B2 (ja) | 2011-06-22 |
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Families Citing this family (2)
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KR101224426B1 (ko) | 2007-12-28 | 2013-01-22 | 후지쯔 세미컨덕터 가부시키가이샤 | 반도체 장치 및 그 제조 방법 |
JP2009164195A (ja) | 2007-12-28 | 2009-07-23 | Panasonic Corp | 半導体チップ |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11121505A (ja) * | 1997-10-20 | 1999-04-30 | Rohm Co Ltd | 半導体集積回路装置 |
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Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH11121505A (ja) * | 1997-10-20 | 1999-04-30 | Rohm Co Ltd | 半導体集積回路装置 |
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