JP4684719B2 - 半導体記憶装置 - Google Patents

半導体記憶装置 Download PDF

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Publication number
JP4684719B2
JP4684719B2 JP2005111350A JP2005111350A JP4684719B2 JP 4684719 B2 JP4684719 B2 JP 4684719B2 JP 2005111350 A JP2005111350 A JP 2005111350A JP 2005111350 A JP2005111350 A JP 2005111350A JP 4684719 B2 JP4684719 B2 JP 4684719B2
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JP
Japan
Prior art keywords
memory device
semiconductor memory
charge
bit line
memory cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2005111350A
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English (en)
Japanese (ja)
Other versions
JP2006294102A (ja
JP2006294102A5 (enExample
Inventor
敏夫 椋木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP2005111350A priority Critical patent/JP4684719B2/ja
Priority to US11/398,771 priority patent/US7333368B2/en
Priority to CN2006100741837A priority patent/CN1845254B/zh
Publication of JP2006294102A publication Critical patent/JP2006294102A/ja
Priority to US12/007,298 priority patent/US7532519B2/en
Publication of JP2006294102A5 publication Critical patent/JP2006294102A5/ja
Application granted granted Critical
Publication of JP4684719B2 publication Critical patent/JP4684719B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0441—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
JP2005111350A 2005-04-07 2005-04-07 半導体記憶装置 Expired - Fee Related JP4684719B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2005111350A JP4684719B2 (ja) 2005-04-07 2005-04-07 半導体記憶装置
US11/398,771 US7333368B2 (en) 2005-04-07 2006-04-06 Semiconductor memory device
CN2006100741837A CN1845254B (zh) 2005-04-07 2006-04-07 半导体存储器件
US12/007,298 US7532519B2 (en) 2005-04-07 2008-01-09 Semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005111350A JP4684719B2 (ja) 2005-04-07 2005-04-07 半導体記憶装置

Publications (3)

Publication Number Publication Date
JP2006294102A JP2006294102A (ja) 2006-10-26
JP2006294102A5 JP2006294102A5 (enExample) 2008-04-03
JP4684719B2 true JP4684719B2 (ja) 2011-05-18

Family

ID=37064179

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005111350A Expired - Fee Related JP4684719B2 (ja) 2005-04-07 2005-04-07 半導体記憶装置

Country Status (3)

Country Link
US (2) US7333368B2 (enExample)
JP (1) JP4684719B2 (enExample)
CN (1) CN1845254B (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4523531B2 (ja) * 2005-09-29 2010-08-11 シャープ株式会社 半導体記憶装置及びその読出方法、並びに電子機器
JP2009266339A (ja) * 2008-04-28 2009-11-12 Panasonic Corp 半導体記憶装置とその半導体記憶装置を用いた電子機器
US7916537B2 (en) * 2009-06-11 2011-03-29 Seagate Technology Llc Multilevel cell memory devices having reference point cells
JP2011216136A (ja) * 2010-03-31 2011-10-27 Fujitsu Semiconductor Ltd 半導体集積回路装置

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69524572T2 (de) * 1995-04-28 2002-08-22 Stmicroelectronics S.R.L., Agrate Brianza Leseverstärkerschaltung für Halbleiterspeicheranordnungen
JP3726337B2 (ja) * 1995-05-02 2005-12-14 ヤマハ株式会社 半導体記憶装置
WO1998006101A1 (de) * 1996-08-01 1998-02-12 Siemens Aktiengesellschaft Verfahren zum betrieb einer speicherzellenanordnung
US5803299A (en) * 1996-08-05 1998-09-08 Sealy, Jr.; Scott P. Container for multiple trash bags
IL125604A (en) * 1997-07-30 2004-03-28 Saifun Semiconductors Ltd Non-volatile electrically erasable and programmble semiconductor memory cell utilizing asymmetrical charge
JP2001057096A (ja) * 1999-06-11 2001-02-27 Hitachi Ltd 多重化メモリ及びそれを用いたセンサ並びに制御システム
US6269023B1 (en) * 2000-05-19 2001-07-31 Advanced Micro Devices, Inc. Method of programming a non-volatile memory cell using a current limiter
US6456536B1 (en) * 2000-06-23 2002-09-24 Advanced Micro Devices, Inc. Method of programming a non-volatile memory cell using a substrate bias
JP2002237191A (ja) 2001-02-13 2002-08-23 Seiko Instruments Inc 相補型不揮発性記憶回路
JP3623756B2 (ja) * 2001-06-13 2005-02-23 松下電器産業株式会社 不揮発性半導体記憶装置
JP2004247436A (ja) * 2003-02-12 2004-09-02 Sharp Corp 半導体記憶装置、表示装置及び携帯電子機器
US7184298B2 (en) * 2003-09-24 2007-02-27 Innovative Silicon S.A. Low power programming technique for a floating body memory transistor, memory cell, and memory array
DE102004010840B4 (de) * 2004-03-05 2006-01-05 Infineon Technologies Ag Verfahren zum Betreiben einer elektrischen beschreib- und löschbaren nicht flüchtigen Speicherzelle und eine Speichereinrichtung zum elektrischen nicht flüchtigen Speichern
US7206224B1 (en) * 2004-04-16 2007-04-17 Spansion Llc Methods and systems for high write performance in multi-bit flash memory devices

Also Published As

Publication number Publication date
JP2006294102A (ja) 2006-10-26
US20060250841A1 (en) 2006-11-09
CN1845254B (zh) 2010-11-03
US20080137434A1 (en) 2008-06-12
US7333368B2 (en) 2008-02-19
US7532519B2 (en) 2009-05-12
CN1845254A (zh) 2006-10-11

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