JP4566266B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
- Publication number
- JP4566266B2 JP4566266B2 JP2009096178A JP2009096178A JP4566266B2 JP 4566266 B2 JP4566266 B2 JP 4566266B2 JP 2009096178 A JP2009096178 A JP 2009096178A JP 2009096178 A JP2009096178 A JP 2009096178A JP 4566266 B2 JP4566266 B2 JP 4566266B2
- Authority
- JP
- Japan
- Prior art keywords
- sealing body
- lead
- semiconductor device
- manufacturing
- back surface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/551—Materials of bond wires
- H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
- H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009096178A JP4566266B2 (ja) | 2009-04-10 | 2009-04-10 | 半導体装置の製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009096178A JP4566266B2 (ja) | 2009-04-10 | 2009-04-10 | 半導体装置の製造方法 |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2003396996A Division JP2005159103A (ja) | 2003-11-27 | 2003-11-27 | 半導体装置およびその製造方法 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009226011A Division JP4535513B2 (ja) | 2009-09-30 | 2009-09-30 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2009158978A JP2009158978A (ja) | 2009-07-16 |
| JP2009158978A5 JP2009158978A5 (https=) | 2009-11-19 |
| JP4566266B2 true JP4566266B2 (ja) | 2010-10-20 |
Family
ID=40962578
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009096178A Expired - Lifetime JP4566266B2 (ja) | 2009-04-10 | 2009-04-10 | 半導体装置の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP4566266B2 (https=) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5947107B2 (ja) * | 2012-05-23 | 2016-07-06 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| JP6986539B2 (ja) * | 2019-11-25 | 2021-12-22 | Towa株式会社 | 樹脂成形済リードフレームの製造方法、樹脂成形品の製造方法、及びリードフレーム |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61220361A (ja) * | 1985-03-26 | 1986-09-30 | Matsushita Electric Ind Co Ltd | 電子部品の捺印及びフレ−ム切断機 |
| JPH06232195A (ja) * | 1993-01-28 | 1994-08-19 | Rohm Co Ltd | 半導体装置の製造方法およびリードフレーム |
| JP3547704B2 (ja) * | 2000-06-22 | 2004-07-28 | 株式会社三井ハイテック | リードフレーム及び半導体装置 |
| JP3660861B2 (ja) * | 2000-08-18 | 2005-06-15 | 株式会社ルネサステクノロジ | 半導体装置の製造方法 |
| JP2003031753A (ja) * | 2001-07-19 | 2003-01-31 | Sony Corp | 半導体装置及びその製造方法 |
| JP2003158234A (ja) * | 2001-11-21 | 2003-05-30 | Hitachi Ltd | 半導体装置及びその製造方法 |
| JP3638136B2 (ja) * | 2001-12-27 | 2005-04-13 | 株式会社三井ハイテック | リードフレームおよびこれを用いた半導体装置 |
-
2009
- 2009-04-10 JP JP2009096178A patent/JP4566266B2/ja not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JP2009158978A (ja) | 2009-07-16 |
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