JP4410685B2 - フィン型fetを形成する方法 - Google Patents
フィン型fetを形成する方法 Download PDFInfo
- Publication number
- JP4410685B2 JP4410685B2 JP2004563141A JP2004563141A JP4410685B2 JP 4410685 B2 JP4410685 B2 JP 4410685B2 JP 2004563141 A JP2004563141 A JP 2004563141A JP 2004563141 A JP2004563141 A JP 2004563141A JP 4410685 B2 JP4410685 B2 JP 4410685B2
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- JP
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- Prior art keywords
- fin
- spacer
- gate
- forming
- type fet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- 238000000034 method Methods 0.000 title claims description 43
- 239000000463 material Substances 0.000 claims description 68
- 125000006850 spacer group Chemical group 0.000 claims description 57
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 10
- 229920005591 polysilicon Polymers 0.000 claims description 8
- 238000005530 etching Methods 0.000 claims description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 4
- 238000000151 deposition Methods 0.000 claims description 4
- 229910021332 silicide Inorganic materials 0.000 claims description 4
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- 239000005380 borophosphosilicate glass Substances 0.000 claims description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 3
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 2
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 2
- 229910052721 tungsten Inorganic materials 0.000 claims description 2
- 239000010937 tungsten Substances 0.000 claims description 2
- 230000003647 oxidation Effects 0.000 description 8
- 238000007254 oxidation reaction Methods 0.000 description 8
- 230000015572 biosynthetic process Effects 0.000 description 6
- 238000005755 formation reaction Methods 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 230000001627 detrimental effect Effects 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 238000002513 implantation Methods 0.000 description 4
- 239000002019 doping agent Substances 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 239000005360 phosphosilicate glass Substances 0.000 description 2
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 229910052792 caesium Inorganic materials 0.000 description 1
- TVFDJXOCXUVLDH-UHFFFAOYSA-N caesium atom Chemical compound [Cs] TVFDJXOCXUVLDH-UHFFFAOYSA-N 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 230000002939 deleterious effect Effects 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000007730 finishing process Methods 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 239000002243 precursor Substances 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/785—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26586—Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823437—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66787—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
- H01L29/66795—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
Description
Claims (6)
- ゲート(124)、および、フィン(14)の一部を保護するためのスペーサ(44)を形成する方法であって、
前記フィン(14)を覆うように第1の材料(20)を堆積するステップと、
前記第1の材料(20)を覆うように、前記第1の材料(20)と異なる熱リフロー特性を有する第2の材料を形成するステップと、
前記第1および第2の材料をエッチングして前記ゲートを形成するステップと、
前記ゲートを形成した後に、異なる前記熱リフロー特性を利用して、熱プロセスにより前記第2の材料をリフローさせることによって、前記第1の材料の上に前記第2の材料の張り出し(140)を形成するステップと、
前記張り出しの下にスペーサ(44)を形成するステップと、
を有する、方法。 - 前記フィン(14)が単結晶シリコンから成り、前記第1の材料(20)が多結晶シリコンから成る、請求項1に記載の方法。
- 前記第1の材料(20)は、ポリシリコン、コバルト−シリサイド、もしくはタングステンであり、前記第2の材料(122)が、BPSGおよびPSGのうち1つである、請求項1に記載の方法。
- 前記スペーサ(44)を形成する前記ステップが、
スペーサ材料(42)を堆積するステップと、
前記張り出し(140)の下部を除いて前記スペーサ材料をエッチングにより指向性を持って除去するステップと、
を含む、請求項1に記載の方法。 - 前記スペーサ材料(42)が、窒化シリコンおよび酸化シリコンのうち少なくとも1つである、請求項4に記載の方法。
- 前記スペーサは、前記張り出し(140)の下に形成され、前記フィン(14)は、フィン型FET(100)のフィンである、請求項1に記載の方法。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/US2002/040869 WO2004059727A1 (en) | 2002-12-19 | 2002-12-19 | Methods of forming structure and spacer and related finfet |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006511092A JP2006511092A (ja) | 2006-03-30 |
JP4410685B2 true JP4410685B2 (ja) | 2010-02-03 |
Family
ID=32679934
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004563141A Expired - Fee Related JP4410685B2 (ja) | 2002-12-19 | 2002-12-19 | フィン型fetを形成する方法 |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP1573804A4 (ja) |
JP (1) | JP4410685B2 (ja) |
CN (1) | CN1320641C (ja) |
AU (1) | AU2002364088A1 (ja) |
WO (1) | WO2004059727A1 (ja) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6951783B2 (en) * | 2003-10-28 | 2005-10-04 | Freescale Semiconductor, Inc. | Confined spacers for double gate transistor semiconductor fabrication process |
US7473593B2 (en) | 2006-01-11 | 2009-01-06 | International Business Machines Corporation | Semiconductor transistors with expanded top portions of gates |
US7341902B2 (en) * | 2006-04-21 | 2008-03-11 | International Business Machines Corporation | Finfet/trigate stress-memorization method |
KR100838378B1 (ko) * | 2006-09-29 | 2008-06-13 | 주식회사 하이닉스반도체 | 핀트랜지스터의 제조 방법 |
KR100801315B1 (ko) | 2006-09-29 | 2008-02-05 | 주식회사 하이닉스반도체 | 돌기형트랜지스터가 구비된 반도체소자의 제조 방법 |
US8889495B2 (en) * | 2012-10-04 | 2014-11-18 | International Business Machines Corporation | Semiconductor alloy fin field effect transistor |
KR102030329B1 (ko) * | 2013-05-30 | 2019-11-08 | 삼성전자 주식회사 | 반도체 장치 및 그 제조 방법 |
US9773869B2 (en) * | 2014-03-12 | 2017-09-26 | Samsung Electronics Co., Ltd. | Semiconductor device and method of fabricating the same |
KR102331913B1 (ko) | 2014-09-26 | 2021-12-01 | 인텔 코포레이션 | 반도체 디바이스들에 대한 선택적 게이트 스페이서들 |
US9564370B1 (en) | 2015-10-20 | 2017-02-07 | International Business Machines Corporation | Effective device formation for advanced technology nodes with aggressive fin-pitch scaling |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3393286B2 (ja) * | 1995-09-08 | 2003-04-07 | ソニー株式会社 | パターンの形成方法 |
US5567639A (en) * | 1996-01-04 | 1996-10-22 | Utron Technology Inc. | Method of forming a stack capacitor of fin structure for DRAM cell |
DE19717363C2 (de) * | 1997-04-24 | 2001-09-06 | Siemens Ag | Herstellverfahren für eine Platinmetall-Struktur mittels eines Lift-off-Prozesses und Verwendung des Herstellverfahrens |
JP3519589B2 (ja) * | 1997-12-24 | 2004-04-19 | 株式会社ルネサステクノロジ | 半導体集積回路の製造方法 |
US5994192A (en) * | 1998-05-29 | 1999-11-30 | Vanguard International Semiconductor Corporation | Compensation of the channel region critical dimension, after polycide gate, lightly doped source and drain oxidation procedure |
DE10012112C2 (de) * | 2000-03-13 | 2002-01-10 | Infineon Technologies Ag | Steg-Feldeffekttransistor und Verfahren zum Herstellen eines Steg-Feldeffekttransistors |
US6562665B1 (en) * | 2000-10-16 | 2003-05-13 | Advanced Micro Devices, Inc. | Fabrication of a field effect transistor with a recess in a semiconductor pillar in SOI technology |
US6475890B1 (en) * | 2001-02-12 | 2002-11-05 | Advanced Micro Devices, Inc. | Fabrication of a field effect transistor with an upside down T-shaped semiconductor pillar in SOI technology |
US6475869B1 (en) * | 2001-02-26 | 2002-11-05 | Advanced Micro Devices, Inc. | Method of forming a double gate transistor having an epitaxial silicon/germanium channel region |
US6492212B1 (en) * | 2001-10-05 | 2002-12-10 | International Business Machines Corporation | Variable threshold voltage double gated transistors and method of fabrication |
-
2002
- 2002-12-19 EP EP02798557A patent/EP1573804A4/en not_active Withdrawn
- 2002-12-19 JP JP2004563141A patent/JP4410685B2/ja not_active Expired - Fee Related
- 2002-12-19 WO PCT/US2002/040869 patent/WO2004059727A1/en active Search and Examination
- 2002-12-19 CN CNB028300432A patent/CN1320641C/zh not_active Expired - Fee Related
- 2002-12-19 AU AU2002364088A patent/AU2002364088A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
WO2004059727A1 (en) | 2004-07-15 |
CN1320641C (zh) | 2007-06-06 |
EP1573804A4 (en) | 2006-03-08 |
EP1573804A1 (en) | 2005-09-14 |
CN1714441A (zh) | 2005-12-28 |
JP2006511092A (ja) | 2006-03-30 |
AU2002364088A1 (en) | 2004-07-22 |
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