JP4401023B2 - 遠紫外線フォトレジストを用いたディープサブミクロンメタライゼーション - Google Patents

遠紫外線フォトレジストを用いたディープサブミクロンメタライゼーション Download PDF

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Publication number
JP4401023B2
JP4401023B2 JP2000545191A JP2000545191A JP4401023B2 JP 4401023 B2 JP4401023 B2 JP 4401023B2 JP 2000545191 A JP2000545191 A JP 2000545191A JP 2000545191 A JP2000545191 A JP 2000545191A JP 4401023 B2 JP4401023 B2 JP 4401023B2
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JP
Japan
Prior art keywords
layer
silicon oxynitride
deep
metallization layer
dielectric layer
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Expired - Fee Related
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JP2000545191A
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English (en)
Japanese (ja)
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JP2002512449A (ja
JP2002512449A5 (https=
Inventor
リオンズ,クリストファー・エフ
スィン,バーンウォー
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Advanced Micro Devices Inc
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Advanced Micro Devices Inc
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Publication date
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/081Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/662Laminate layers, e.g. stacks of alternating high-k metal oxides
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/20Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
    • H10P76/204Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials of organic photoresist masks
    • H10P76/2041Photolithographic processes
    • H10P76/2043Photolithographic processes using an anti-reflective coating
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/092Manufacture or treatment of dielectric parts thereof by smoothing the dielectric parts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44Conductive materials thereof
    • H10W20/4403Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • H10W20/4405Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44Conductive materials thereof
    • H10W20/4403Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • H10W20/4421Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being copper
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/942Masking
    • Y10S438/948Radiation resist
    • Y10S438/952Utilizing antireflective layer
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/97Specified etch stop material

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)
JP2000545191A 1998-04-23 1999-04-01 遠紫外線フォトレジストを用いたディープサブミクロンメタライゼーション Expired - Fee Related JP4401023B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/065,352 1998-04-23
US09/065,352 US6287959B1 (en) 1998-04-23 1998-04-23 Deep submicron metallization using deep UV photoresist
PCT/US1999/007361 WO1999054930A1 (en) 1998-04-23 1999-04-01 Deep submicron metallization using deep uv photoresist

Publications (3)

Publication Number Publication Date
JP2002512449A JP2002512449A (ja) 2002-04-23
JP2002512449A5 JP2002512449A5 (https=) 2006-04-27
JP4401023B2 true JP4401023B2 (ja) 2010-01-20

Family

ID=22062123

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000545191A Expired - Fee Related JP4401023B2 (ja) 1998-04-23 1999-04-01 遠紫外線フォトレジストを用いたディープサブミクロンメタライゼーション

Country Status (5)

Country Link
US (1) US6287959B1 (https=)
EP (1) EP1080494A1 (https=)
JP (1) JP4401023B2 (https=)
KR (1) KR100562540B1 (https=)
WO (1) WO1999054930A1 (https=)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6331379B1 (en) * 1999-09-01 2001-12-18 Micron Technology, Inc. Photo-lithography process using multiple anti-reflective coatings
DE10000004A1 (de) * 2000-01-03 2001-05-17 Infineon Technologies Ag Verfahren zur Herstellung von Leitbahnen
US20020197835A1 (en) * 2001-06-06 2002-12-26 Sey-Ping Sun Anti-reflective coating and methods of making the same
JP2003124189A (ja) * 2001-10-10 2003-04-25 Fujitsu Ltd 半導体装置の製造方法
US6613665B1 (en) * 2001-10-26 2003-09-02 Lsi Logic Corporation Process for forming integrated circuit structure comprising layer of low k dielectric material having antireflective properties in an upper surface
JP2003209046A (ja) * 2002-01-16 2003-07-25 Mitsubishi Electric Corp レジストパターン形成方法および半導体装置の製造方法
KR100506943B1 (ko) * 2003-09-09 2005-08-05 삼성전자주식회사 식각정지막으로 연결홀의 저측면에 경사를 갖는 반도체소자의 제조 방법들
US7611758B2 (en) * 2003-11-06 2009-11-03 Tokyo Electron Limited Method of improving post-develop photoresist profile on a deposited dielectric film
US7101787B1 (en) * 2004-04-09 2006-09-05 National Semiconductor Corporation System and method for minimizing increases in via resistance by applying a nitrogen plasma after a titanium liner deposition
US10236398B2 (en) 2015-07-06 2019-03-19 Electronics And Telecommunications Research Institute Method for manufacturing transparent electrode
US20170064821A1 (en) * 2015-08-31 2017-03-02 Kristof Darmawikarta Electronic package and method forming an electrical package
US10964653B2 (en) * 2017-09-28 2021-03-30 Taiwan Semiconductor Manufacturing Co., Ltd. Method of forming a semiconductor device comprising top conductive pads

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6010644A (ja) 1983-06-30 1985-01-19 Toshiba Corp 半導体装置の製造方法
JPH05190796A (ja) 1991-07-30 1993-07-30 Internatl Business Mach Corp <Ibm> ダイナミック・ランダム・アクセス・メモリ・セル用誘電体皮膜およびその形成方法
KR960005761A (ko) 1994-07-27 1996-02-23 이데이 노부유끼 반도체장치
US6577007B1 (en) 1996-02-01 2003-06-10 Advanced Micro Devices, Inc. Manufacturing process for borderless vias with respect to underlying metal
US5858870A (en) 1996-12-16 1999-01-12 Chartered Semiconductor Manufacturing, Ltd. Methods for gap fill and planarization of intermetal dielectrics

Also Published As

Publication number Publication date
WO1999054930A1 (en) 1999-10-28
EP1080494A1 (en) 2001-03-07
JP2002512449A (ja) 2002-04-23
KR100562540B1 (ko) 2006-03-22
KR20010042954A (ko) 2001-05-25
US6287959B1 (en) 2001-09-11

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