JP4397942B2 - 半導体集積回路装置の製造方法 - Google Patents

半導体集積回路装置の製造方法 Download PDF

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Publication number
JP4397942B2
JP4397942B2 JP2007196840A JP2007196840A JP4397942B2 JP 4397942 B2 JP4397942 B2 JP 4397942B2 JP 2007196840 A JP2007196840 A JP 2007196840A JP 2007196840 A JP2007196840 A JP 2007196840A JP 4397942 B2 JP4397942 B2 JP 4397942B2
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JP
Japan
Prior art keywords
mold
film
cavity
resin
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2007196840A
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English (en)
Japanese (ja)
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JP2007329493A (ja
JP2007329493A5 (https=
Inventor
文司 倉冨
洋一 河田
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Renesas Technology Corp
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Renesas Technology Corp
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Publication date
Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Priority to JP2007196840A priority Critical patent/JP4397942B2/ja
Publication of JP2007329493A publication Critical patent/JP2007329493A/ja
Publication of JP2007329493A5 publication Critical patent/JP2007329493A5/ja
Application granted granted Critical
Publication of JP4397942B2 publication Critical patent/JP4397942B2/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/014—Manufacture or treatment using batch processing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/016—Manufacture or treatment using moulds
    • H10W74/017—Auxiliary layers for moulds, e.g. release layers or layers preventing residue
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Moulds For Moulding Plastics Or The Like (AREA)
  • Injection Moulding Of Plastics Or The Like (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP2007196840A 2007-07-30 2007-07-30 半導体集積回路装置の製造方法 Expired - Fee Related JP4397942B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007196840A JP4397942B2 (ja) 2007-07-30 2007-07-30 半導体集積回路装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007196840A JP4397942B2 (ja) 2007-07-30 2007-07-30 半導体集積回路装置の製造方法

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2005116766A Division JP4012210B2 (ja) 2005-04-14 2005-04-14 半導体集積回路装置の製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2009199137A Division JP5119221B2 (ja) 2009-08-31 2009-08-31 半導体集積回路装置の製造方法

Publications (3)

Publication Number Publication Date
JP2007329493A JP2007329493A (ja) 2007-12-20
JP2007329493A5 JP2007329493A5 (https=) 2009-03-19
JP4397942B2 true JP4397942B2 (ja) 2010-01-13

Family

ID=38929709

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007196840A Expired - Fee Related JP4397942B2 (ja) 2007-07-30 2007-07-30 半導体集積回路装置の製造方法

Country Status (1)

Country Link
JP (1) JP4397942B2 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009283981A (ja) * 2009-08-31 2009-12-03 Renesas Technology Corp 半導体集積回路装置の製造方法

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5235506B2 (ja) * 2008-06-02 2013-07-10 キヤノン株式会社 パターン転写装置及びデバイス製造方法
JP5148376B2 (ja) * 2008-06-11 2013-02-20 日本写真印刷株式会社 射出成形用金型及びこれを用いた樹脂成形品の製造方法
JP6603678B2 (ja) * 2016-02-26 2019-11-06 キヤノン株式会社 インプリント装置およびその動作方法ならびに物品製造方法
WO2017145924A1 (ja) * 2016-02-26 2017-08-31 キヤノン株式会社 インプリント装置およびその動作方法ならびに物品製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009283981A (ja) * 2009-08-31 2009-12-03 Renesas Technology Corp 半導体集積回路装置の製造方法

Also Published As

Publication number Publication date
JP2007329493A (ja) 2007-12-20

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