JP4397337B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP4397337B2 JP4397337B2 JP2005074657A JP2005074657A JP4397337B2 JP 4397337 B2 JP4397337 B2 JP 4397337B2 JP 2005074657 A JP2005074657 A JP 2005074657A JP 2005074657 A JP2005074657 A JP 2005074657A JP 4397337 B2 JP4397337 B2 JP 4397337B2
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- 239000004065 semiconductor Substances 0.000 title claims description 24
- 238000004519 manufacturing process Methods 0.000 title claims description 20
- 238000005530 etching Methods 0.000 claims description 62
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 31
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 31
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 29
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 29
- 238000000034 method Methods 0.000 claims description 26
- 239000000758 substrate Substances 0.000 claims description 26
- 229910052760 oxygen Inorganic materials 0.000 claims description 14
- 238000000206 photolithography Methods 0.000 claims description 14
- 238000005259 measurement Methods 0.000 claims description 9
- 238000012545 processing Methods 0.000 claims description 5
- 239000005380 borophosphosilicate glass Substances 0.000 claims 8
- 239000010408 film Substances 0.000 description 154
- 239000007789 gas Substances 0.000 description 65
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 13
- 229910052710 silicon Inorganic materials 0.000 description 13
- 239000010703 silicon Substances 0.000 description 13
- 239000010410 layer Substances 0.000 description 12
- 230000000694 effects Effects 0.000 description 11
- 238000001312 dry etching Methods 0.000 description 8
- 230000001965 increasing effect Effects 0.000 description 8
- 230000015572 biosynthetic process Effects 0.000 description 7
- 239000000203 mixture Substances 0.000 description 7
- 150000004767 nitrides Chemical class 0.000 description 6
- 238000001020 plasma etching Methods 0.000 description 6
- 238000001459 lithography Methods 0.000 description 5
- 239000011248 coating agent Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 230000001681 protective effect Effects 0.000 description 3
- 238000007790 scraping Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 230000001939 inductive effect Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 1
- BPQQTUXANYXVAA-UHFFFAOYSA-N Orthosilicate Chemical compound [O-][Si]([O-])([O-])[O-] BPQQTUXANYXVAA-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- IUHFWCGCSVTMPG-UHFFFAOYSA-N [C].[C] Chemical compound [C].[C] IUHFWCGCSVTMPG-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 239000007795 chemical reaction product Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 229910001882 dioxygen Inorganic materials 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- NBVXSUQYWXRMNV-UHFFFAOYSA-N fluoromethane Chemical compound FC NBVXSUQYWXRMNV-UHFFFAOYSA-N 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 125000004435 hydrogen atom Chemical class [H]* 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000007788 roughening Methods 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- TXEYQDLBPFQVAA-UHFFFAOYSA-N tetrafluoromethane Chemical compound FC(F)(F)F TXEYQDLBPFQVAA-UHFFFAOYSA-N 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76816—Aspects relating to the layout of the pattern or to the size of vias or trenches
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/02129—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/31604—Deposition from a gas or vapour
- H01L21/31608—Deposition of SiO2
- H01L21/31612—Deposition of SiO2 on a silicon body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/31604—Deposition from a gas or vapour
- H01L21/31625—Deposition of boron or phosphorus doped silicon oxide, e.g. BSG, PSG, BPSG
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- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Inorganic Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Description
図1はこの発明の第1の実施例を示す断面図であって、シリコン基板1上にNSG膜(シリコン酸化膜)2を100nm以上生成する。そのシリコン基板1上に高さh1=250nmの位置にゲート電極8をゲート電極間隔(d3)0.28μmで生成しリソグラフィーにてゲート電極配線を形成し、その後、BPSG膜3をNSG膜(シリコン酸化膜)2上に450nm生成する。その上にNSG膜(シリコン酸化膜)4を100nm生成する。なお、ゲート電極8はNSG膜(シリコン酸化膜)2より上であれば直上でも、BPSG膜3中下部でも構わない。
図4はこの発明の第2の実施例を示す断面図であって、シリコン基板1上にNSG膜(シリコン酸化膜)2を100nm生成する。その上にシリコン窒化膜7を15nm生成する。その上にBPSG膜31を(h1)250nm程度作成する。その上に間隔(d3)0.14μmのリソグラフィーにてゲート電極8を形成する。さらに、その上にBPSG膜32を200nm程度、前記BPSG膜31との合計膜厚450nm程度生成し、その上にNSG膜(シリコン酸化膜)4を100nm生成する。
以下、第3の実施例で説明する。
2、4……NSG膜(シリコン酸化膜)
3、31、32……BPSG膜
5……有機膜(BARC膜)
6……レジストマスク層
7……SiN膜
8……ゲート電極
Claims (3)
- 上部にシリコン酸化膜、その下にBPSG膜を有し、前記BPSG膜中には複数のゲート電極を有し、前記複数のゲート電極間にコンタクトを形成する半導体装置の製造方法において、
前記ゲート電極の上面および側面並びに前記ゲート電極の上部にはシリコン窒化膜を生成していない構造の半導体装置の製造方法であって、
コンタクト加工用にレジストマスク層を用いて、前記シリコン酸化膜をCF4/O2/Ar混合ガスで基板温度40℃以上にてエッチングし、さらにそのオーバーエッチングで前記BPSG膜の断面形状を楔形(W形)に加工する工程と、
それに引き続き前記BPSG膜をC4F8/CH2F2/Ar混合ガス(但しCOおよびO2を含有しない。)で前記ゲート電極間に90度未満の順テーパーエッチングする工程とをこの順に行うことによりコンタクトを形成する、
ことを特徴とする半導体装置の製造方法。 - 請求項1に記載される半導体装置の製造方法において、
前記BPSG膜と前記レジストマスク層との間には有機膜からなる反射防止膜を配し、これにレジストマスク層を用いてレジストマスク径が0.20μm以下のレジストマスクパターンを形成し、さらに前記BPSG膜の下部にはシリコン窒化膜を有する構造の半導体装置の製造方法であって、
前記有機膜および前記シリコン酸化膜を前記CF4/O2/Ar混合ガスで基板温度40℃以上にてエッチングし、さらにそのオーバーエッチングで前記BPSG膜の断面形状を楔形(W形)に加工する工程と、
それに引き続き前記BPSG膜を前記C4F8/CH2F2/Ar混合ガス(但しCOおよびO2を含有しない。)で前記ゲート電極間に85度の順テーパーエッチングする工程と、
さらにそのオーバーエッチングで前記シリコン窒化膜をエッチングする工程とをこの順に行うことによりコンタクトを形成する、
ことを特徴とする半導体装置の製造方法。 - 請求項2に記載される半導体装置の製造方法において、
前記シリコン窒化膜は、開口コンタクト径においてエッチングされ、コンタクト接続する構造のレジストマスク径は0.20μm以下であって、
前記コンタクトとその上部に配置する層とのホトリソグラフィ合わせおよび合わせ測定に用いるパターンは、コンタクト開口時点で前記シリコン窒化膜上でエッチングが止まり、基板にコンタクトしない構造であり、そのレジストマスク径は0.25μm以上であり、
そのときのエッチングガスである前記C4F8/CH2F2/Ar混合ガス(但しCOおよびO 2 を含有しない。)における、C4F8/CH2F2のガス比を1より小さくすることによりコンタクトを形成する、
ことを特徴とする半導体装置の製造方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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JP2005074657A JP4397337B2 (ja) | 2005-03-16 | 2005-03-16 | 半導体装置の製造方法 |
US11/370,892 US7351643B2 (en) | 2005-03-16 | 2006-03-09 | Method of manufacturing a semiconductor device |
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JP2005074657A JP4397337B2 (ja) | 2005-03-16 | 2005-03-16 | 半導体装置の製造方法 |
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JP2006261281A JP2006261281A (ja) | 2006-09-28 |
JP4397337B2 true JP4397337B2 (ja) | 2010-01-13 |
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JP2005074657A Expired - Fee Related JP4397337B2 (ja) | 2005-03-16 | 2005-03-16 | 半導体装置の製造方法 |
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JP (1) | JP4397337B2 (ja) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
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JP4912907B2 (ja) * | 2007-02-06 | 2012-04-11 | 東京エレクトロン株式会社 | プラズマエッチング方法及びプラズマエッチング装置 |
US8138093B2 (en) * | 2009-08-12 | 2012-03-20 | International Business Machines Corporation | Method for forming trenches having different widths and the same depth |
CN109218945A (zh) * | 2018-08-07 | 2019-01-15 | 瑞声科技(新加坡)有限公司 | Mems结构的制造方法、mems结构及硅麦克风 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2913936B2 (ja) | 1991-10-08 | 1999-06-28 | 日本電気株式会社 | 半導体装置の製造方法 |
JP2872522B2 (ja) | 1993-03-26 | 1999-03-17 | シャープ株式会社 | 半導体装置のドライエッチング方法 |
US6159862A (en) * | 1997-12-27 | 2000-12-12 | Tokyo Electron Ltd. | Semiconductor processing method and system using C5 F8 |
JP2001127039A (ja) | 1999-10-25 | 2001-05-11 | Nec Corp | 半導体装置の製造方法 |
US6878612B2 (en) * | 2002-09-16 | 2005-04-12 | Oki Electric Industry Co., Ltd. | Self-aligned contact process for semiconductor device |
JP3946724B2 (ja) * | 2004-01-29 | 2007-07-18 | シャープ株式会社 | 半導体装置の製造方法 |
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2005
- 2005-03-16 JP JP2005074657A patent/JP4397337B2/ja not_active Expired - Fee Related
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- 2006-03-09 US US11/370,892 patent/US7351643B2/en not_active Expired - Fee Related
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Publication number | Publication date |
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US7351643B2 (en) | 2008-04-01 |
JP2006261281A (ja) | 2006-09-28 |
US20060211214A1 (en) | 2006-09-21 |
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