JP4388889B2 - プレチャージ回路を有するメモリおよびそのプレチャージ方法 - Google Patents

プレチャージ回路を有するメモリおよびそのプレチャージ方法 Download PDF

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Publication number
JP4388889B2
JP4388889B2 JP2004517531A JP2004517531A JP4388889B2 JP 4388889 B2 JP4388889 B2 JP 4388889B2 JP 2004517531 A JP2004517531 A JP 2004517531A JP 2004517531 A JP2004517531 A JP 2004517531A JP 4388889 B2 JP4388889 B2 JP 4388889B2
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JP
Japan
Prior art keywords
write
current
memory
bit
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
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JP2004517531A
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English (en)
Japanese (ja)
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JP2006503387A5 (enExample
JP2006503387A (ja
Inventor
ダブリュ. アンドレ、トーマス
ジェイ. ナハス、ジョセフ
ケイ. スブラマニアン、チトラ
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Everspin Technologies Inc
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Everspin Technologies Inc
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Publication date
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Publication of JP2006503387A publication Critical patent/JP2006503387A/ja
Publication of JP2006503387A5 publication Critical patent/JP2006503387A5/ja
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Publication of JP4388889B2 publication Critical patent/JP4388889B2/ja
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1653Address circuits or decoders
    • G11C11/1655Bit-line or column circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1653Address circuits or decoders
    • G11C11/1657Word-line or row circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1675Writing or programming circuits or methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22Control and timing of internal memory operations
    • G11C2207/2263Write conditionally, e.g. only if new data and old data differ

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Mram Or Spin Memory Techniques (AREA)
  • Semiconductor Memories (AREA)
  • Hall/Mr Elements (AREA)
JP2004517531A 2002-06-28 2003-05-01 プレチャージ回路を有するメモリおよびそのプレチャージ方法 Expired - Lifetime JP4388889B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/185,488 US6711052B2 (en) 2002-06-28 2002-06-28 Memory having a precharge circuit and method therefor
PCT/US2003/013750 WO2004003923A2 (en) 2002-06-28 2003-05-01 Memory having a precharge circuit and method therefor

Publications (3)

Publication Number Publication Date
JP2006503387A JP2006503387A (ja) 2006-01-26
JP2006503387A5 JP2006503387A5 (enExample) 2006-06-22
JP4388889B2 true JP4388889B2 (ja) 2009-12-24

Family

ID=29779641

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004517531A Expired - Lifetime JP4388889B2 (ja) 2002-06-28 2003-05-01 プレチャージ回路を有するメモリおよびそのプレチャージ方法

Country Status (6)

Country Link
US (1) US6711052B2 (enExample)
EP (1) EP1581951A2 (enExample)
JP (1) JP4388889B2 (enExample)
AU (1) AU2003232038A1 (enExample)
TW (1) TWI287233B (enExample)
WO (1) WO2004003923A2 (enExample)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002230965A (ja) * 2001-01-24 2002-08-16 Internatl Business Mach Corp <Ibm> 不揮発性メモリ装置
CA2455766C (en) * 2001-07-31 2011-02-08 Tyco Healthcare Group Lp Bioabsorbable adhesive compounds and compositions
US7020008B2 (en) * 2001-12-26 2006-03-28 Renesas Technology Corp. Thin film magnetic memory device writing data with bidirectional current
US6873542B2 (en) * 2002-10-03 2005-03-29 International Business Machines Corporation Antiferromagnetically coupled bi-layer sensor for magnetic random access memory
JP4283011B2 (ja) * 2003-03-13 2009-06-24 Tdk株式会社 磁気メモリデバイスおよびその読出方法
US7286378B2 (en) * 2003-11-04 2007-10-23 Micron Technology, Inc. Serial transistor-cell array architecture
US7502248B2 (en) * 2004-05-21 2009-03-10 Samsung Electronics Co., Ltd. Multi-bit magnetic random access memory device
US7102916B2 (en) * 2004-06-30 2006-09-05 International Business Machines Corporation Method and structure for selecting anisotropy axis angle of MRAM device for reduced power consumption
DE102005001667B4 (de) * 2005-01-13 2011-04-21 Qimonda Ag Nichtflüchtige Speicherzelle zum Speichern eines Datums in einer integrierten Schaltung
US7269050B2 (en) * 2005-06-07 2007-09-11 Spansion Llc Method of programming a memory device
US7206223B1 (en) 2005-12-07 2007-04-17 Freescale Semiconductor, Inc. MRAM memory with residual write field reset
US7280388B2 (en) * 2005-12-07 2007-10-09 Nahas Joseph J MRAM with a write driver and method therefor
EP1863034B1 (en) * 2006-05-04 2011-01-05 Hitachi, Ltd. Magnetic memory device
KR100855965B1 (ko) * 2007-01-04 2008-09-02 삼성전자주식회사 서브 셀 어레이를 구비하는 양방향성 rram 및 이를이용하는 데이터 기입 방법
US7880209B2 (en) * 2008-10-09 2011-02-01 Seagate Technology Llc MRAM cells including coupled free ferromagnetic layers for stabilization
US8102720B2 (en) * 2009-02-02 2012-01-24 Qualcomm Incorporated System and method of pulse generation
US8279659B2 (en) * 2009-11-12 2012-10-02 Qualcomm Incorporated System and method of operating a memory device
US9183910B2 (en) 2012-05-31 2015-11-10 Samsung Electronics Co., Ltd. Semiconductor memory devices for alternately selecting bit lines
WO2014058994A2 (en) * 2012-10-11 2014-04-17 Everspin Technologies, Inc. Memory device with timing overlap mode
CN114974340A (zh) * 2021-02-27 2022-08-30 华为技术有限公司 一种存储装置
US12249365B2 (en) * 2023-03-06 2025-03-11 Windbond Electronics Corp. Memory device capable of performing in-memory computing

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS568435B2 (enExample) * 1972-09-19 1981-02-24
US4713797A (en) * 1985-11-25 1987-12-15 Motorola Inc. Current mirror sense amplifier for a non-volatile memory
US5777923A (en) * 1996-06-17 1998-07-07 Aplus Integrated Circuits, Inc. Flash memory read/write controller
US6256224B1 (en) * 2000-05-03 2001-07-03 Hewlett-Packard Co Write circuit for large MRAM arrays
US6236611B1 (en) * 1999-12-20 2001-05-22 Motorola, Inc. Peak program current reduction apparatus and method
JP4726290B2 (ja) * 2000-10-17 2011-07-20 ルネサスエレクトロニクス株式会社 半導体集積回路
JP4667594B2 (ja) * 2000-12-25 2011-04-13 ルネサスエレクトロニクス株式会社 薄膜磁性体記憶装置

Also Published As

Publication number Publication date
US6711052B2 (en) 2004-03-23
TWI287233B (en) 2007-09-21
EP1581951A2 (en) 2005-10-05
US20040001351A1 (en) 2004-01-01
TW200414216A (en) 2004-08-01
JP2006503387A (ja) 2006-01-26
WO2004003923A3 (en) 2005-08-11
WO2004003923A2 (en) 2004-01-08
AU2003232038A1 (en) 2004-01-19

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