JP4365515B2 - Manufacturing method of semiconductor module - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor module.
[0002]
[Prior art]
In recent years, in order to cope with high-density mounting of IC chips, a technique for manufacturing a semiconductor module in which IC chips are stacked has been developed. For example, JP-A-9-219490, JP-A-10-135267, and JP-A-10-163414 disclose such a stacked package.
[0003]
In such a conventional technique, IC packages such as TSOP (Thin Small Outline Package), TCP (Tape Carrier Package), and BGA (Ball Grid Array) are assembled for each layer, and then a plurality of IC packages are stacked. At this time, the respective layers are connected via external connection terminals provided in advance in each package. Thus, in the conventional construction method, since many manufacturing steps have to be performed, the processing cost has increased.
[0004]
6 and 7 show a stacked package manufactured by the conventional method as described above. The one shown in FIG. 6 is a laminate of packages molded with resin. 7 is a side view and a plan view of a module substrate on which the package of FIG. 6 is mounted. The IC packages 100A and 100B include an IC mounting portion 106, an IC chip 102 mounted on the upper surface thereof, a lead 101 connecting the IC chip 102 and an external component, and the IC chip 102 and the lead 101 inside the resin. And a bonding wire 103 to be connected with each other. A predetermined region including the IC chip 102 is covered with a resin body 104.
[0005]
Another IC package 100B is stacked on the upper side of the IC package 100A having such a structure and mounted on the substrate 105.
[0006]
[Problems to be solved by the invention]
If the IC packages 100A and 100B are stacked in the thickness direction and mounted on the substrate 105, the total module thickness increases due to the thickness of the resin body 104. Further, when the IC packages 100A and 100B are mounted on the substrate 105 in the horizontal direction, there is a problem that the total module becomes large. Furthermore, since the upper and lower packages 100A and 100B are connected to the substrate 105 by the respective leads 101, there is a possibility that the leads 101 are short-circuited if a positional shift occurs when the packages 100A and 100B are stacked. .
[0007]
In the future, for example, with the miniaturization of electronic devices such as IC cards and mobile phones, it is considered that further increases in density and thickness will be achieved for IC packages, but depending on the conventional construction method, It is difficult to achieve such high density and thinning.
[0008]
In order to solve this problem, a configuration in which the IC chip 102 is molded with the resin body 104 is changed, and for example, a configuration in which the IC chip is mounted between the layers while a printed board is laminated via an interlayer member is conceivable. At this time, as the interlayer member, a printed board including a via hole filled with a conductive material for connection between wiring circuits arranged on the upper and lower surfaces thereof can be used. In order to manufacture such a printed circuit board, for example, a via hole that penetrates the insulating layer of a single-sided copper-clad laminate and reaches the conductor layer is formed, and the via hole is filled with a conductive paste, or by electrolytic plating. A method such as filling with plating metal is conceivable.
[0009]
However, in the method of filling the conductive paste, one opening of the via hole is closed by the conductor layer, and it is necessary to increase the thickness of the interlayer member in order to secure a space necessary for housing the semiconductor chip. Therefore, it may be difficult to fill the via hole with the conductive paste without a gap. On the other hand, the electrolytic plating method requires a great amount of time and labor, and there is a risk that the productivity is lowered. Moreover, when laminating these printed boards and interlayer members, it is necessary to provide an adhesive layer between each printed board and the interlayer members, which may increase the cost.
[0010]
The present invention has been made in view of the above-described circumstances, and an object of the present invention is to provide a method by which a laminated semiconductor module can be manufactured simply and inexpensively.
[0011]
[Means for Solving the Problems]
According to a first aspect of the present invention, there is provided a method for manufacturing a semiconductor module, comprising: a printed circuit board having a predetermined wiring circuit formed thereon and a semiconductor chip mounted on one side; A method of manufacturing a semiconductor module, which is laminated via an interlayer member having a conductive bump and an opening capable of accommodating the semiconductor chip, on the one surface side of the printed circuit board on which the predetermined wiring circuit is formed in advance A step of mounting the semiconductor chip, a step of attaching a protective film to both surfaces of the insulating base material to be the interlayer member, a step of forming a through hole at a predetermined position of the insulating base material, and the through hole Filling the conductive paste into a conductive bump, forming a conductive bump, peeling the protective film, and accommodating the semiconductor chip in the insulating substrate Forming a Do the opening, characterized in that going through a step of adhering by laminating said insulating substrate and the printed circuit board alternately.
[0012]
A second aspect of the present invention is the method of manufacturing a semiconductor module according to the first aspect, wherein the insulating base material is a prepreg.
[0013]
Here, the prepreg is a material in which a base material is impregnated with a thermosetting resin to be in a semi-cured state by heating, and examples of the base material include paper, glass cloth, glass nonwoven fabric, synthetic fiber cloth, etc. As the functional resin, for example, an epoxy resin, a phenol resin, or the like can be used.
[0014]
Operation of the invention and effect of the invention
According to the first aspect of the present invention, the through-hole is formed at a predetermined position of the insulating base material having the protective film pasted on both surfaces, and the protective film is peeled off after filling the through-hole with the conductive paste. Thereby, the conductive bump which protruded on both surfaces of the insulating base material can be formed. In this method, since the conductive paste is filled in the through hole in which both openings are opened, a gap is generated in the hole during filling as compared with the case of the via hole in which one opening is closed. Can be avoided, and connection reliability can be improved. Moreover, since it is not necessary to perform electrolytic plating which requires time and labor, a semiconductor module can be manufactured easily and inexpensively.
[0015]
According to invention of Claim 2, a prepreg is used as an insulating base material. Since the prepreg is in a semi-cured state, it is alternately laminated with the printed circuit board and heated and pressed by a press to adhere and cure to the printed circuit board disposed above and below. For this reason, it is not necessary to form an adhesive layer between the printed board and the interlayer member, and a semiconductor module can be manufactured easily and inexpensively.
[0016]
DETAILED DESCRIPTION OF THE INVENTION
DESCRIPTION OF EMBODIMENTS Hereinafter, an embodiment embodying the present invention will be described in detail with reference to FIGS. The semiconductor module 1 of this embodiment is integrated by alternately superimposing the printed circuit board 2 on which the semiconductor chip 3 is mounted and the interlayer member 20 and then superimposing the I / O wiring substrate 30 on the lowermost layer and performing heat pressing. It has a structure (see FIG. 1).
[0017]
First, a method for manufacturing the printed circuit board 2 on which the semiconductor chip 3 is mounted will be described.
[0018]
The starting material for the printed circuit board 2 is a single-sided copper-clad laminate 4. This single-sided copper-clad laminate 4 is made of, for example, a copper foil 6 having a thickness of 12 μm on one surface (upper surface in FIG. 2) of an insulating substrate 5 having a thickness of 75 μm formed of a plate-like glass cloth epoxy resin. Is a well-known structure to which is attached. In this single-sided copper-clad laminate 4, the surface opposite to the copper foil 6 is protected with a protective film 7 made of polyethylene terephthalate (PET) (FIG. 2A).
[0019]
From the surface side on which the protective film 7 is applied (the lower surface side in FIG. 2), laser irradiation is performed at a predetermined position by, for example, a pulse oscillation type carbon dioxide laser processing apparatus, thereby penetrating the insulating substrate 5 and copper foil. A via hole 8 reaching 6 is formed (FIG. 2B). The processing conditions are preferably such that the pulse energy is 2.0 to 10.0 mJ, the pulse width is 1 to 100 μs, the pulse interval is 0.5 ms or more, and the number of shots is 3 to 50. Next, a desmear process for removing the resin remaining inside the via hole 8 is performed. Then, the copper foil 6 surface is protected with the protective film 7, and the plated conductor 9 is formed in the via hole 8 by the electrolytic plating method using the copper foil 6 as one electrode (FIG. 2C). The filling depth of the plated conductor 9 is preferably such that the upper surface thereof is flush with the surface of the protective film 7.
[0020]
Next, after peeling off the protective film 7 on the copper foil 6 side, a photosensitive dry film 10 is attached. The dry film 10 is exposed and developed in a predetermined pattern to form the hole 11 (FIG. 2D). By applying electrolytic plating in the hole 11, a plating layer to be a mounting bump 12 for mounting the semiconductor chip 3 is formed (FIG. 2E).
[0021]
Thereafter, the dry film 10 is peeled off, and the mounting bumps 12 are projected. At the same time, by peeling off the protective film 7 on the lower surface side, the tip end portion of the plating conductor 9 protrudes from the surface of the insulating substrate 5 to form the connection bump 13 (FIG. 3F).
[0022]
Next, a photoresist layer 14 is formed on the entire upper surface side and the connection bumps 13 on the lower surface side by electrodeposition (FIG. 3G). Next, the photoresist layer 14 on the upper surface side is subjected to exposure / development processing in accordance with a predetermined pattern of the wiring circuit 15. Thereafter, the wiring circuit 15 is formed by etching the copper foil 6 portion not protected by the photoresist layer 14 (FIG. 3H). A part of the wiring circuit 15 serves as a connection land 15A for connection to a conductive bump 25 of an interlayer member 20 described later. Finally, by removing the photoresist layer 14, the production of the printed circuit board 2 is completed (FIG. 3I).
[0023]
A semiconductor chip 3 is mounted on the central portion on the upper surface side of the printed board 2 (FIG. 3J). The semiconductor chip 3 is fixed to the center of the printed circuit board 2 by the adhesive layer 16, and terminal portions (not shown) formed on the lower surface side of the semiconductor chip 3 are embedded in the mounting bumps 12, whereby the printed circuit board 2. It is electrically connected to the wiring circuit 15.
[0024]
Next, a method for manufacturing the interlayer member 20 will be described.
[0025]
The starting material of the interlayer member 20 is, for example, a prepreg 21 formed in a plate shape in a semi-heated state by impregnating a glass cloth base material with an epoxy resin (FIG. 4A). The thickness of the prepreg 21 is larger than the height from the upper surface of the printed circuit board 2 to the upper surface of the semiconductor chip 3 because the semiconductor chip 3 needs to be accommodated in a cavity 26 (corresponding to the opening of the present invention) described later. Slightly thick, for example, 130 μm. Further, the area of the upper surface and the lower surface of the prepreg 21 is substantially equal to the area of the opposing printed circuit board 2.
[0026]
Both surfaces of the prepreg 21 are protected with a protective film 22 made of PET (FIG. 4B), and a pulse oscillation type carbon dioxide laser processing, for example, is performed at a position corresponding to the connection land 15A and the connection bump 13 of the opposing printed board 2. By performing laser irradiation with the apparatus, a through hole 23 penetrating in the thickness direction of the prepreg 21 is formed (FIG. 4C). Next, a desmear process for removing the resin remaining in the through hole 23 is performed.
[0027]
The through-hole 23 is filled with a conductive paste 24 (FIG. 4D). The filling can be performed by printing the conductive paste 24 on the protective film 22 using, for example, a screen printer. When the protective film 22 is peeled off, the conductive paste 24 is projected from the surface of the prepreg 21 by the thickness of the protective film 22 to form conductive bumps 25 (FIG. 4E).
[0028]
Then, for example, laser irradiation is performed on the central portion of the prepreg 21 so as to penetrate the cavity 26, thereby completing the manufacture of the interlayer member 20 (FIG. 4F). The size of the cavity 26 is slightly larger than the outer dimensions of the semiconductor chip 3 so that the semiconductor chip 3 can be accommodated therein.
[0029]
The printed circuit board 2 and the interlayer member 20 manufactured as described above are alternately overlapped (FIG. 5A). At this time, the printed circuit board 2 is disposed on the uppermost layer so that the surface on which the semiconductor chip 3 is mounted is on the lower surface side, and the interlayer member 20 is disposed below the printed circuit board 2. The interlayer member 20 accommodates the semiconductor chip 3 of the printed board 2 in the cavity 26 and is overlaid so that the conductive bumps 25 can be connected to the connection lands 15 </ b> A and the connection bumps 13 of the printed board 2. . Below that, the printed board 2 and the interlayer member 20 are similarly overlapped, and the I / O wiring board 30 is stacked in the lowermost layer. The I / O wiring board 30 is formed by forming a via hole 34 at a predetermined position of the insulating substrate 33 and forming a predetermined wiring circuit (not shown) and a land 31 above and below the via hole 34.
[0030]
Next, when pressure heating is performed by a press, the prepreg 21 once melts and flows, cures with time, and adheres to the upper and lower printed circuit boards 2 and the I / O wiring board 30 to form the semiconductor module 1. Is done. At this time, the connection land 15A of each printed circuit board 2, the connection pump 13, and the land 31 of the I / O wiring board 30 are connected to the conductive bumps 25 of the adjacent interlayer member 20, thereby The printed circuit board 2 and the wiring circuit of the I / O wiring board 30 are electrically connected. A solder ball 32 for connection to an external board is formed on the land 31 on the lower surface side of the I / O wiring board 30.
[0031]
As described above, according to the present embodiment, the prepreg 21 is used as the interlayer member 20. When the conductive bumps 25 are formed on the prepreg 21, the conductive paste 24 is filled into the through holes 23 formed at predetermined positions. Since both the openings of the through hole 23 are opened, it is possible to avoid a gap from being generated in the hole when the conductive paste 24 is filled, and to improve connection reliability. Moreover, since it is not necessary to perform electrolytic plating which requires time and labor, the semiconductor module 1 can be manufactured easily and inexpensively.
[0032]
Further, since the prepreg 21 is in a semi-cured state, it is melted and flowed once by alternately laminating with the printed circuit board 2 and heating and pressing, and is cured with the passage of time and bonded to the printed circuit board 2 disposed above and below. For this reason, it becomes unnecessary to provide an adhesive layer between the printed circuit board 2 and the interlayer member 20, and the semiconductor module 1 can be manufactured simply and inexpensively.
[0033]
The technical scope of the present invention is not limited by the above-described embodiment, and for example, the following are also included in the technical scope of the present invention. In addition, the technical scope of the present invention extends to an equivalent range.
(1) In this embodiment, the semiconductor module 1 is composed of five layers of two printed boards 2, an interlayer member 20, and an I / O wiring board 30, respectively. The present embodiment is not limited to this embodiment. For example, the printed circuit board may be composed of three layers of one printed board, an interlayer member, and an I / O wiring board. Alternatively, it may be composed of seven layers each of three printed boards, an interlayer member, and an I / O wiring board, and may be further multilayered.
(2) In the present embodiment, the plated conductor 9 is formed by the electrolytic plating method. However, according to the present invention, the method for forming the plated conductor is not limited to the present embodiment. For example, the plated conductor 9 may be formed by electroless plating. Good.
[Brief description of the drawings]
FIG. 1 is a perspective view showing a state before a semiconductor module is manufactured by laminating a printed board and an interlayer member in the embodiment. FIG. 2 is a cross-sectional view showing a printed board manufacturing method.
FIG. 3 is a cross-sectional view showing a method for manufacturing a printed circuit board-2.
4 is a cross-sectional view showing a manufacturing method of an interlayer member. FIG. 5 is a cross-sectional view in which a printed circuit board and an interlayer member are laminated. FIG. 6 is a side cross-sectional view of a conventional IC package. Side view of substrate mounted with IC package (b) Plan view of substrate mounted with conventional IC package 【Explanation of symbols】
DESCRIPTION OF SYMBOLS 1 ... Semiconductor module 2 ... Printed circuit board 3 ... Semiconductor chip 5 ... Insulating base material 15 ... Wiring circuit 20 ... Interlayer member 21 ... Prepreg 22 ... Protective film 23 ... Through hole 24 ... Conductive paste 25 ... Conductive bump 26 ... Cavity (Aperture)

Claims (2)

A printed circuit board in which a predetermined wiring circuit is formed and a semiconductor chip is mounted on one side is laminated via an interlayer member provided with conductive bumps connectable to the wiring circuit and openings capable of accommodating the semiconductor chip. A method for manufacturing a semiconductor module comprising:
A step of mounting the semiconductor chip on the one surface side of the printed board on which the predetermined wiring circuit is formed in advance, a step of attaching a protective film to both surfaces of an insulating base material to be the interlayer member, and the insulating property A step of forming a through hole at a predetermined position of the base material, a step of filling the through hole with a conductive paste to form a conductive bump, a step of peeling the protective film, and the insulating base material. A method of manufacturing a semiconductor module, comprising: a step of forming the opening capable of accommodating the semiconductor chip; and a step of alternately laminating and bonding the insulating base material and the printed board.   The method for manufacturing a semiconductor module according to claim 1, wherein the insulating base material is a prepreg.

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