JP2002064179A - Method of manufacturing semiconductor module - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of simply and easily manufacturing a laminate type semiconductor module at a low cost. SOLUTION: An interlayer member 20 uses a prepreg 21. For forming conductive bumps 25 on the prepreg 21, through-holes 23 formed at specified positions are filled with a conductive paste 24. The through-hole 23 being open at both openings can prevent voids from being formed with filling the conductive paste 24, thereby improving the connection reliability. Compared with electroplating, a semiconductor module 1 can be manufactured simply and easily at a low cost. The prepregs 21 being half hardened and printed boards 2 are alternately laminated, heated and pressed to once melt and fluidize the prepregs 21 and they harden with time lapsed to adhere the printed boards 2 laid on the upside and downside. This eliminates the need of provision of adhesive layers and the semiconductor module 1 can be easily and simply manufactured at a low cost.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a method for manufacturing a semiconductor module.

[0002]

2. Description of the Related Art In recent years, in order to cope with high-density mounting of IC chips, a technique for manufacturing a semiconductor module in which IC chips are stacked has been developed. For example, JP-A-9-219490, JP-A-10-135267
Japanese Patent Application Laid-Open No. Hei 10-163414 discloses such a stacked package.

In such a conventional technique, TSOP (Th
in Small Outline Package), TCP (Tape Carrier P)
After assembling IC packages such as a package and a BGA (Ball Grid Array) for each layer, a plurality of IC packages are stacked. At this time, the respective layers are connected via external connection terminals provided in advance in the respective packages. As described above, in the conventional method, many manufacturing steps have to be performed, so that the processing cost has increased.

FIGS. 6 and 7 show a laminated package manufactured by the conventional method as described above. FIG. 6 shows a laminate of packages molded with resin. FIG. 7 is a side view and a plan view of a module substrate on which the package of FIG. 6 is mounted. The IC packages 100A and 100B have I
C mounting portion 106 and IC chip 1 mounted on the upper surface
02, a lead 101 for connecting the IC chip 102 to an external component, and a bonding wire 103 for connecting the IC chip 102 and the lead 101 inside the resin. Further, a predetermined area including the IC chip 102 is:
It is covered with a resin body 104.

[0005] The IC package 100A having such a structure.
On the upper side, another IC package 100B is stacked and mounted on the substrate 105.

[0006]

The above-mentioned IC packages 100A and 100B are stacked in the thickness direction to form a substrate 10
5, there is a problem that the total module thickness is increased due to the thickness of the resin body 104.
Further, when the IC packages 100A and 100B are mounted on the substrate 105 in the horizontal direction, there is a problem that the total module becomes large. Further, the upper and lower packages 100
A and 100B are connected to the substrate 105 by respective leads 101, so that the packages 100A and 100B
If the misalignment occurs during the stacking of 00B, there is a possibility that the leads 101 will be short-circuited.

[0007] In the future, with the miniaturization of electronic devices such as IC cards and mobile phones, for IC packages,
It is considered that further densification and thinning can be achieved, but it is difficult to achieve such high density and thinning by a conventional method.

In order to solve this problem, the configuration in which the IC chip 102 is molded with the resin body 104 is changed. For example, a configuration is adopted in which the printed circuit boards are stacked via interlayer members and the IC chips are mounted between the layers. Conceivable.
At this time, as the interlayer member, a printed circuit board having a via hole filled with a conductive material for establishing a connection between wiring circuits arranged on the upper and lower surfaces thereof can be used. In order to manufacture such a printed circuit board, for example, a via hole that reaches the conductor layer through the insulating layer of the single-sided copper-clad laminate is formed, and a conductive paste is filled in the via hole, or by electrolytic plating. A method such as filling with a plating metal is conceivable.

However, in the method of filling the conductive paste, one opening of the via hole is closed by the conductive layer, and the thickness of the interlayer member needs to be increased in order to secure a space necessary for accommodating the semiconductor chip. Because there is
In some cases, it is difficult to fill the via holes with the conductive paste without gaps. On the other hand, the electrolytic plating method requires a great deal of time and labor, and may reduce productivity. Further, when laminating these printed boards and interlayer members, it is necessary to provide an adhesive layer between each printed board and the interlayer members, which may increase the cost.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a method for easily and inexpensively manufacturing a laminated semiconductor module.

[0011]

According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor module, comprising the steps of: forming a predetermined wiring circuit on a printed circuit board having a semiconductor chip mounted on one surface side; A method of manufacturing a semiconductor module, comprising laminating via an interlayer member having a conductive bump connectable to the wiring circuit and an opening capable of accommodating the semiconductor chip, the insulating base material being the interlayer member Bonding a protective film on both sides of the insulating substrate, forming a through hole at a predetermined position of the insulating base material, filling the through hole with a conductive paste to form a conductive bump, Removing the protective film,
A step of forming the opening capable of accommodating the semiconductor chip in the insulating base; and a step of alternately stacking and bonding the insulating base and the printed board.

According to a second aspect of the present invention, there is provided the method of manufacturing a semiconductor module according to the first aspect, wherein the insulating base material is a prepreg.

Here, the prepreg is a material in which a base material is impregnated with a thermosetting resin to be in a semi-cured state by heating. Examples of the base material include paper, glass cloth, glass nonwoven fabric, and the like.
For example, an epoxy resin, a phenol resin or the like can be used as the thermosetting resin.

[0014]

According to the first aspect of the present invention, a through-hole is formed at a predetermined position of an insulating base material having a protective film attached to both surfaces thereof, and a conductive paste is applied to the through-hole. By peeling the protective film after filling, conductive bumps protruding on both surfaces of the insulating base material can be formed. In this method, since the conductive paste is filled into the through hole having both openings opened, a gap is generated in the hole at the time of filling as compared with the case of a via hole in which one opening is closed. Can be avoided, and the connection reliability can be improved. In addition, since it is not necessary to perform electrolytic plating that requires time and effort, a semiconductor module can be manufactured simply and inexpensively.

According to the second aspect of the present invention, a prepreg is used as the insulating base material. Since the prepreg is in a semi-cured state, the prepreg is alternately laminated with the printed circuit board, and is heated and pressed by a press to adhere to and harden the printed circuit board arranged vertically. Therefore, it is not necessary to form an adhesive layer between the printed board and the interlayer member, and the semiconductor module can be manufactured simply and at low cost.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below in detail with reference to FIGS. The semiconductor module 1 according to the present embodiment is integrated by alternately stacking the printed circuit board 2 on which the semiconductor chip 3 is mounted and the interlayer member 20, stacking the I / O wiring board 30 on the lowermost layer, and hot pressing. It has a structure (see FIG. 1).

First, a method of manufacturing the printed circuit board 2 on which the semiconductor chip 3 is mounted will be described.

The starting material of the printed circuit board 2 is a single-sided copper-clad laminate 4. The single-sided copper-clad laminate 4 is provided on one surface (upper surface in FIG. 2) of an insulating substrate 5 having a thickness of 75 μm and formed of, for example, a plate-like glass cloth epoxy resin. Is a well-known structure attached. In this single-sided copper-clad laminate 4, the surface opposite to the copper foil 6 is protected with a protective film 7 made of polyethylene terephthalate (PET) (FIG. 2A).

By irradiating a laser beam to a predetermined position from the surface on which the protective film 7 is applied (the lower surface side in FIG. 2) using, for example, a pulse oscillation type carbon dioxide gas laser processing apparatus, the insulating substrate 5 is penetrated. Then, a via hole 8 reaching the copper foil 6 is formed (FIG. 2B). The processing conditions were such that the pulse energy was 2.0 to 10.0 mJ and the pulse width was 1
Preferably, the pulse interval is 0.5 ms or more, and the number of shots is 3 to 50. Then
A desmear process for removing the resin remaining inside the via hole 8 is performed. Thereafter, the surface of the copper foil 6 is protected by a protective film 7, and a plated conductor 9 is formed in the via hole 8 by electrolytic plating using the copper foil 6 as one electrode (FIG. 2C). The filling depth of the plated conductor 9 is preferably such that the upper surface thereof is flush with the surface of the protective film 7.

Next, after the protective film 7 on the copper foil 6 side is peeled off, a photosensitive dry film 10 is attached. The hole 11 is formed by exposing and developing the dry film 10 in a predetermined pattern.
D). By applying electrolytic plating to the inside of the hole 11,
A plating layer serving as a mounting bump 12 for mounting the semiconductor chip 3 is formed (FIG. 2E).

Thereafter, the dry film 10 is peeled off, and the mounting bumps 12 are projected. At the same time, by peeling off the protective film 7 on the lower surface side, the tip end of the plated conductor 9 is projected from the surface of the insulating substrate 5 to be a connection bump 13 (FIG. 3F).

Next, a photoresist layer 14 is formed on the entire upper surface side and the lower surface side of the connection bump 13 by an electrodeposition method (FIG. 3G). Next, the photoresist layer 1 on the upper surface side
4 is exposed and developed according to a predetermined pattern of the wiring circuit 15. Thereafter, the wiring circuit 15 is formed by etching the copper foil 6 that is not protected by the photoresist layer 14 (FIG. 3H). Wiring circuit 1
5 are electrically conductive bumps 25 of the interlayer member 20 described later.
And a connection land 15A for connection to the terminal. Finally, by removing the photoresist layer 14, the manufacture of the printed circuit board 2 is completed (FIG. 3I).

A semiconductor chip 3 is mounted on a central portion on the upper surface side of the printed board 2 (FIG. 3J). The semiconductor chip 3 is fixed to the center of the printed board 2 by an adhesive layer 16, and a terminal portion (not shown) formed on the lower surface side of the semiconductor chip 3 is embedded in the mounting bump 12, so that the printed circuit board 2 It is electrically connected to the wiring circuit 15.

Next, a method of manufacturing the interlayer member 20 will be described.

The starting material of the interlayer member 20 is, for example, a prepreg 21 formed by impregnating a glass cloth base material with an epoxy resin and forming a semi-cured state in a plate shape (FIG. 4A). The thickness of the prepreg 21 is larger than the height from the upper surface of the printed circuit board 2 to the upper surface of the semiconductor chip 3 due to the necessity of accommodating the semiconductor chip 3 in a cavity 26 (corresponding to an opening of the present invention) described later. Somewhat thick, for example 130 μm
It has been. The area of the upper surface and the lower surface of the prepreg 21 is substantially equal to the area of the opposing printed circuit board 2.

Both sides of the prepreg 21 are protected by a protective film 22 made of PET (FIG. 4B), and a pulse oscillation type is provided at a position corresponding to the connection land 15A and the connection bump 13 of the printed board 2 facing each other. By performing laser irradiation with a carbon dioxide laser processing apparatus, a through hole 23 penetrating in the thickness direction of the prepreg 21 is formed (FIG. 4C). Next, this through hole 23
A desmear process is performed to remove the resin remaining inside.

The conductive paste 24 is filled in the through holes 23 (FIG. 4D). The filling can be performed, for example, by printing the conductive paste 24 on the protective film 22 using a screen printing machine. When the protective film 22 is peeled off, the conductive paste 2
4 protrudes from the surface of the prepreg 21 by the thickness of the protective film 22 to form conductive bumps 25 (FIG. 4).
E).

Then, the center portion of the prepreg 21 is irradiated with a laser beam, for example, to penetrate the cavity 26 to complete the manufacture of the interlayer member 20 (FIG. 4F).
The size of the cavity 26 is slightly larger than the outer dimensions of the semiconductor chip 3 so that the semiconductor chip 3 can be accommodated therein.

The printed board 2 manufactured as described above and the interlayer member 20 are alternately overlapped (FIG. 5A). At this time, the printed board 2 is arranged on the uppermost layer such that the surface on which the semiconductor chip 3 is mounted is on the lower surface side, and the interlayer member 20 is arranged below the printed circuit board 2. The interlayer member 20 accommodates the semiconductor chip 3 of the printed circuit board 2 in its cavity 26 and is overlapped so that the conductive bump 25 can be connected to the connection land 15A and the connection bump 13 of the printed circuit board 2. . Then, the printed circuit board 2 and the interlayer member 20 are further overlapped under the same, and the I / O wiring board 30 is stacked on the lowermost layer. The I / O wiring board 30 has a via hole 34 formed at a predetermined position of an insulating substrate 33, and a predetermined wiring circuit (not shown) and a land 31 formed above and below it.

Next, when pressure and heating are performed by a press,
The prepreg 21 melts and flows once, hardens with the passage of time, and the upper and lower printed circuit boards 2 and the I / O
The semiconductor module 1 is formed by bonding to the O wiring board 30. At this time, the connection lands 1 of each printed circuit board 2
5A, connection pump 13 and land 31 of I / O wiring board 30 and conductive bump 2 of adjacent interlayer member 20
5 is electrically connected to the upper and lower printed circuit boards 2 and the wiring circuits of the I / O wiring board 30. Further, a solder ball 32 for connection to an external substrate is formed on a land 31 on the lower surface side of the I / O wiring board 30.

As described above, according to the present embodiment, the prepreg 21 is used as the interlayer member 20. Prepreg 2
When the conductive bumps 25 are formed on the substrate 1, the conductive paste 24 is filled in the through holes 23 formed at predetermined positions. Since both openings of the through hole 23 are open, it is possible to avoid a gap in the hole when the conductive paste 24 is filled, and it is possible to improve connection reliability. In addition, since it is not necessary to perform time-consuming and time-consuming electrolytic plating, the semiconductor module 1 can be manufactured simply and inexpensively.

Further, since the prepreg 21 is in a semi-cured state, the prepreg 21 is alternately laminated with the printed circuit board 2 and once melted and flowed by heating and pressurizing, is cured over time, and is hardened with the printed circuit board 2 arranged vertically. Glue. Therefore, it is not necessary to provide an adhesive layer between the printed board 2 and the interlayer member 20, and the semiconductor module 1 can be manufactured simply and inexpensively.

The technical scope of the present invention is not limited by the above-described embodiments, and for example, the following ones are also included in the technical scope of the present invention.
In addition, the technical scope of the present invention extends to an equivalent range. (1) In the present embodiment, the semiconductor module 1 is composed of two layers each of the two printed boards 2, the interlayer member 20, and the I / O wiring board 30. The present invention is not limited to this embodiment, and may be configured by, for example, three layers of one printed board, an interlayer member, and an I / O wiring board. Alternatively, each of them may be constituted by seven layers of three printed boards, an interlayer member, and an I / O wiring board, or may be further multilayered. (2) In the present embodiment, the plated conductor 9 is formed by the electrolytic plating method. However, according to the present invention, the method of forming the plated conductor is not limited to the present embodiment. For example, the plated conductor 9 may be formed by electroless plating. Good.

[Brief description of the drawings]

FIG. 1 is a perspective view showing a state before a semiconductor module is manufactured by stacking a printed circuit board and an interlayer member according to an embodiment.

FIG. 2 is a sectional view showing a method for manufacturing a printed circuit board-1.

FIG. 3 is a cross-sectional view illustrating a method of manufacturing a printed circuit board.

FIG. 4 is a cross-sectional view illustrating a method for manufacturing an interlayer member.

FIG. 5 is a cross-sectional view in which a printed board and an interlayer member are laminated.

FIG. 6 is a side sectional view of a conventional IC package.

7A is a side view of a substrate on which a conventional IC package is mounted. FIG. 7B is a plan view of a substrate on which a conventional IC package is mounted.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Semiconductor module 2 ... Printed circuit board 3 ... Semiconductor chip 5 ... Insulating base material 15 ... Wiring circuit 20 ... Interlayer member 21 ... Prepreg 22 ... Protective film 23 ... Through hole 24 ... Conductive paste 25 ... Conductive bump 26 ... Cavity (Aperture)

Claims (2)

[Claims] 1. A printed circuit board on which a predetermined wiring circuit is formed and a semiconductor chip is mounted on one surface side of a printed circuit board is formed by an interlayer having conductive bumps connectable to the wiring circuit and an opening capable of accommodating the semiconductor chip. A method of manufacturing a semiconductor module to be laminated via a member, wherein a step of attaching protective films to both surfaces of an insulating base material serving as the interlayer member and forming a through hole at a predetermined position of the insulating base material Forming a conductive bump in the through-hole by filling the through-hole with a conductive paste, removing the protective film, and forming the opening capable of accommodating the semiconductor chip in the insulating base material. And a step of alternately laminating and bonding the insulating base material and the printed circuit board. 2. The method according to claim 1, wherein the insulating substrate is a prepreg.