JP4317564B2 - メッキ促進層を有する半導体構造物を作る方法 - Google Patents

メッキ促進層を有する半導体構造物を作る方法 Download PDF

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Publication number
JP4317564B2
JP4317564B2 JP2006348855A JP2006348855A JP4317564B2 JP 4317564 B2 JP4317564 B2 JP 4317564B2 JP 2006348855 A JP2006348855 A JP 2006348855A JP 2006348855 A JP2006348855 A JP 2006348855A JP 4317564 B2 JP4317564 B2 JP 4317564B2
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Japan
Prior art keywords
pel
ild
layer
copper
oxide
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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JP2006348855A
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English (en)
Japanese (ja)
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JP2007194621A5 (https=
JP2007194621A (ja
Inventor
ショム・ポノス
スティーヴン・シン・ソン・チェン
ジョン・アンソニー・フィッツシモンズ
テリー・エイ・スプーナー
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International Business Machines Corp
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International Business Machines Corp
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Publication of JP2007194621A publication Critical patent/JP2007194621A/ja
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Publication of JP4317564B2 publication Critical patent/JP4317564B2/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/042—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers
    • H10W20/043—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers for electroplating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H10W20/058—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches by depositing on sacrificial masks, e.g. using lift-off
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/042—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers
    • H10W20/0425—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers comprising multiple stacked seed or nucleation layers

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Chemically Coating (AREA)
  • Electroplating Methods And Accessories (AREA)
JP2006348855A 2006-01-17 2006-12-26 メッキ促進層を有する半導体構造物を作る方法 Expired - Fee Related JP4317564B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/306,930 US7341948B2 (en) 2006-01-17 2006-01-17 Method of making a semiconductor structure with a plating enhancement layer

Publications (3)

Publication Number Publication Date
JP2007194621A JP2007194621A (ja) 2007-08-02
JP2007194621A5 JP2007194621A5 (https=) 2008-12-18
JP4317564B2 true JP4317564B2 (ja) 2009-08-19

Family

ID=38263770

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006348855A Expired - Fee Related JP4317564B2 (ja) 2006-01-17 2006-12-26 メッキ促進層を有する半導体構造物を作る方法

Country Status (4)

Country Link
US (1) US7341948B2 (https=)
JP (1) JP4317564B2 (https=)
CN (1) CN100479130C (https=)
TW (1) TW200739737A (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20080113518A (ko) * 2007-06-25 2008-12-31 주식회사 동부하이텍 반도체 소자의 제조 방법
US8828878B2 (en) * 2011-06-01 2014-09-09 United Microelectronics Corp. Manufacturing method for dual damascene structure
US9312140B2 (en) 2014-05-19 2016-04-12 International Business Machines Corporation Semiconductor structures having low resistance paths throughout a wafer

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4675468A (en) 1985-12-20 1987-06-23 The Standard Oil Company Stable contact between current collector grid and transparent conductive layer
US4977013A (en) * 1988-06-03 1990-12-11 Andus Corporation Tranparent conductive coatings
US5280381A (en) 1992-07-27 1994-01-18 Ford Motor Company Process for preparing a solid polymeric fast ion conducting layer for an electrochromic device
US5969422A (en) * 1997-05-15 1999-10-19 Advanced Micro Devices, Inc. Plated copper interconnect structure
JP3085247B2 (ja) * 1997-07-07 2000-09-04 日本電気株式会社 金属薄膜の形成方法
US6077780A (en) * 1997-12-03 2000-06-20 Advanced Micro Devices, Inc. Method for filling high aspect ratio openings of an integrated circuit to minimize electromigration failure
US6197688B1 (en) * 1998-02-12 2001-03-06 Motorola Inc. Interconnect structure in a semiconductor device and method of formation
US6162365A (en) 1998-03-04 2000-12-19 International Business Machines Corporation Pd etch mask for copper circuitization
US6197181B1 (en) 1998-03-20 2001-03-06 Semitool, Inc. Apparatus and method for electrolytically depositing a metal on a microelectronic workpiece
KR100336621B1 (ko) 2000-02-15 2002-05-16 박호군 고분자 기판 위의 인듐산화물 또는 인듐주석산화물 박막증착 방법
GB0029315D0 (en) 2000-12-01 2001-01-17 Koninkl Philips Electronics Nv Method of increasing the conductivity of a transparent conductive layer

Also Published As

Publication number Publication date
CN100479130C (zh) 2009-04-15
US20070166996A1 (en) 2007-07-19
CN101005043A (zh) 2007-07-25
US7341948B2 (en) 2008-03-11
TW200739737A (en) 2007-10-16
JP2007194621A (ja) 2007-08-02

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