JP4313537B2 - 低振幅電荷再利用型低電力ｃｍｏｓ回路装置、加算器回路及び加算器モジュール - Google Patents

低振幅電荷再利用型低電力ｃｍｏｓ回路装置、加算器回路及び加算器モジュール Download PDF

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Publication number
JP4313537B2
JP4313537B2 JP2002022435A JP2002022435A JP4313537B2 JP 4313537 B2 JP4313537 B2 JP 4313537B2 JP 2002022435 A JP2002022435 A JP 2002022435A JP 2002022435 A JP2002022435 A JP 2002022435A JP 4313537 B2 JP4313537 B2 JP 4313537B2
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complementary
circuit
signal
amplitude
driver
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JP2002305437A (ja
JP2002305437A5 (enExample
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淳樹 井上
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Fujitsu Ltd
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Fujitsu Ltd
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0019—Arrangements for reducing power consumption by energy recovery or adiabatic operation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096—Synchronous circuits, i.e. using clock signals
    • H03K19/0963—Synchronous circuits, i.e. using clock signals using transistors of complementary type

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
JP2002022435A 2001-02-02 2002-01-30 低振幅電荷再利用型低電力ｃｍｏｓ回路装置、加算器回路及び加算器モジュール Expired - Fee Related JP4313537B2 (ja)

Applications Claiming Priority (2)

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US26598901P 2001-02-02 2001-02-02
US60/265989 2001-02-02

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JP2002305437A JP2002305437A (ja) 2002-10-18
JP2002305437A5 JP2002305437A5 (enExample) 2005-08-04
JP4313537B2 true JP4313537B2 (ja) 2009-08-12

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JP2002022435A Expired - Fee Related JP4313537B2 (ja) 2001-02-02 2002-01-30 低振幅電荷再利用型低電力ｃｍｏｓ回路装置、加算器回路及び加算器モジュール

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US (1) US6803793B2 (enExample)
JP (1) JP4313537B2 (enExample)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2868181B1 (fr) * 2004-03-29 2006-05-26 Soisic Sa Procede de simulation d'un circuit a l'etat stationnaire
DE102005001484A1 (de) * 2005-01-12 2006-03-23 Infineon Technologies Ag Schaltungsanordnung zur Verarbeitung eines Dual-Rail-Signals
FR2880217A1 (fr) * 2004-11-03 2006-06-30 Infineon Technologies Ag Montage a mode de securite et a mode d'economie d'energie.
JP2006157321A (ja) * 2004-11-29 2006-06-15 Fujitsu Ltd 差動クロック伝送装置、差動クロック送信装置、差動クロック受信装置、差動クロック伝送方法
DE102005008367B3 (de) * 2005-02-23 2006-10-19 Infineon Technologies Ag XOR-Schaltung
US20070008004A1 (en) * 2005-07-11 2007-01-11 Vikram Santurkar Apparatus and methods for low-power routing circuitry in programmable logic devices
KR100744640B1 (ko) 2005-11-02 2007-08-01 주식회사 하이닉스반도체 클럭 드라이버
JP4984759B2 (ja) * 2006-09-05 2012-07-25 富士通セミコンダクター株式会社 半導体記憶装置
US7580304B2 (en) * 2007-06-15 2009-08-25 United Memories, Inc. Multiple bus charge sharing
US7649406B2 (en) * 2007-09-13 2010-01-19 United Memories, Inc. Short-circuit charge-sharing technique for integrated circuit devices
US8022729B2 (en) 2008-04-11 2011-09-20 Micron Technology, Inc. Signal driver circuit having adjustable output voltage for a high logic level output signal
US7714617B2 (en) * 2008-09-11 2010-05-11 Micron Technology, Inc. Signal driver circuit having an adjustable output voltage
US8482314B2 (en) * 2011-11-08 2013-07-09 Taiwan Semiconductor Manufacturing Co., Ltd. Method and apparatus for improved multiplexing using tri-state inverter
KR101844848B1 (ko) * 2016-08-31 2018-04-03 (주)멜파스 터치 검출 방법 및 이를 이용하는 터치 검출 장치
US11068237B1 (en) 2018-07-11 2021-07-20 Rambus Inc. Dual-domain combinational logic circuitry
JP2021068930A (ja) 2019-10-17 2021-04-30 キオクシア株式会社 半導体集積回路およびコントローラ

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2573392B2 (ja) * 1990-03-30 1997-01-22 株式会社東芝 半導体記憶装置
US5206544A (en) 1991-04-08 1993-04-27 International Business Machines Corporation CMOS off-chip driver with reduced signal swing and reduced power supply disturbance
US5254883A (en) 1992-04-22 1993-10-19 Rambus, Inc. Electrical current source circuitry for a bus
KR0137105B1 (ko) * 1993-06-17 1998-04-29 모리시다 요이치 데이터 전송회로, 데이터선 구동회로, 증폭회로, 반도체 집적회로 및 반도체 기억장치
US5903169A (en) 1996-07-24 1999-05-11 Lg Semicon Co., Ltd. Charge recycling differential logic (CRDL) circuit and storage elements and devices using the same
US5859548A (en) 1996-07-24 1999-01-12 Lg Semicon Co., Ltd. Charge recycling differential logic (CRDL) circuit and devices using the same
US5907251A (en) 1996-11-22 1999-05-25 International Business Machines Corp. Low voltage swing capacitive bus driver device
US6097220A (en) 1997-06-11 2000-08-01 Intel Corporation Method and circuit for recycling charge
JP2001118388A (ja) * 1999-10-18 2001-04-27 Nec Ic Microcomput Syst Ltd バッファ回路

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Publication number Publication date
JP2002305437A (ja) 2002-10-18
US20020109530A1 (en) 2002-08-15
US6803793B2 (en) 2004-10-12

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