JP4203538B2 - 配線基板の製造方法、及び配線基板 - Google Patents
配線基板の製造方法、及び配線基板 Download PDFInfo
- Publication number
- JP4203538B2 JP4203538B2 JP2008126095A JP2008126095A JP4203538B2 JP 4203538 B2 JP4203538 B2 JP 4203538B2 JP 2008126095 A JP2008126095 A JP 2008126095A JP 2008126095 A JP2008126095 A JP 2008126095A JP 4203538 B2 JP4203538 B2 JP 4203538B2
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- JP
- Japan
- Prior art keywords
- metal foil
- wiring board
- conductor
- manufacturing
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15182—Fan-in arrangement of the internal vias
- H01L2924/15184—Fan-in arrangement of the internal vias in different layers of the multilayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Description
5 金属箔密着体
10 積層シート体
11 第一誘電体シート
20 支持基板
21 下地誘電体シート
100 配線積層部
Claims (6)
- 誘電体層と導体層とが交互に積層された配線基板の製造方法であって、
支持基板を用意する工程と、
前記支持基板の上部に配置されると共に、互いに密着し、かつ、分離可能な複数の金属箔を含む金属箔密着体と、前記金属箔密着体上に配置された第一導体層と、前記金属箔密着体および前記第一導体層上に配置された第一誘電体シートと、前記第一誘電体シートを貫通すると共に前記第一導体層に接続する第一ビア導体と、前記第一誘電体シート上に配置されると共に前記第一ビア導体を介して前記金属箔密着体と接続する第二導体層と、を含む積層シート体を形成する工程と、
を備え、
前記金属箔密着体は、金属メッキを介して互いに密着させた2つの銅箔により構成され、
前記積層シート体は、1つの前記配線基板に対応する個体を複数含む、配線基板の製造方法。 - 誘電体層と導体層とが交互に積層された配線基板の製造方法であって、
支持基板を用意する工程と、
互いに密着し、かつ、分離可能な複数の金属箔を含む金属箔密着体を用意する工程と、
前記支持基板の上部に配置された前記金属箔密着体と、前記金属箔密着体上に配置された第一導体層と、前記金属箔密着体および前記第一導体層上に配置された第一誘電体シートと、前記第一誘電体シートを貫通すると共に前記第一導体層に接続する第一ビア導体と、前記第一誘電体シート上に配置されると共に前記第一ビア導体を介して前記金属箔密着体と接続する第二導体層と、を含む積層シート体を形成する工程と、
を備え、
前記積層シート体は、1つの前記配線基板に対応する個体を複数含む、配線基板の製造方法。 - 請求項2に記載の配線基板の製造方法であって、
前記金属箔密着体は、金属メッキを介して互いに密着させた2つの銅箔により構成される、配線基板の製造方法。 - 請求項1ないし請求項3のいずれかに記載の配線基板の製造方法であって、さらに、
前記積層シート体の周囲部を除去して前記金属箔密着体の端部を露出させる工程を備える、配線基板の製造方法。 - 請求項4に記載の配線基板の製造方法であって、
除去されるべき前記積層シート体の前記周囲部は、前記金属箔密着体の外縁端付近を含む、配線基板の製造方法。 - 請求項4または請求項5に記載の配線基板の製造方法であって、さらに、
前記金属箔密着体に含まれる互いに密着する2つの金属箔を界面にて剥離して、前記積層シート体における前記金属箔密着体上の領域である配線積層部を前記金属箔が付着した状態で前記支持基板から分離する工程を備える、配線基板の製造方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008126095A JP4203538B2 (ja) | 2003-08-08 | 2008-05-13 | 配線基板の製造方法、及び配線基板 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003206800 | 2003-08-08 | ||
JP2008126095A JP4203538B2 (ja) | 2003-08-08 | 2008-05-13 | 配線基板の製造方法、及び配線基板 |
Related Parent Applications (1)
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---|---|---|---|
JP2004055503A Division JP4549695B2 (ja) | 2003-08-08 | 2004-02-27 | 配線基板の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2008193130A JP2008193130A (ja) | 2008-08-21 |
JP4203538B2 true JP4203538B2 (ja) | 2009-01-07 |
Family
ID=39752849
Family Applications (5)
Application Number | Title | Priority Date | Filing Date |
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JP2008126094A Expired - Fee Related JP4203537B2 (ja) | 2003-08-08 | 2008-05-13 | 配線基板の製造方法、及び配線基板 |
JP2008126083A Expired - Fee Related JP4203536B2 (ja) | 2003-08-08 | 2008-05-13 | 配線基板の製造方法、及び配線基板 |
JP2008125999A Expired - Fee Related JP4203535B2 (ja) | 2003-08-08 | 2008-05-13 | 配線基板の製造方法、及び配線基板 |
JP2008126095A Expired - Fee Related JP4203538B2 (ja) | 2003-08-08 | 2008-05-13 | 配線基板の製造方法、及び配線基板 |
JP2008286947A Pending JP2009076928A (ja) | 2003-08-08 | 2008-11-07 | 配線基板の製造方法 |
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JP2008126094A Expired - Fee Related JP4203537B2 (ja) | 2003-08-08 | 2008-05-13 | 配線基板の製造方法、及び配線基板 |
JP2008126083A Expired - Fee Related JP4203536B2 (ja) | 2003-08-08 | 2008-05-13 | 配線基板の製造方法、及び配線基板 |
JP2008125999A Expired - Fee Related JP4203535B2 (ja) | 2003-08-08 | 2008-05-13 | 配線基板の製造方法、及び配線基板 |
Family Applications After (1)
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JP2008286947A Pending JP2009076928A (ja) | 2003-08-08 | 2008-11-07 | 配線基板の製造方法 |
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JP (5) | JP4203537B2 (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5527586B2 (ja) * | 2009-12-17 | 2014-06-18 | 日立化成株式会社 | 多層配線基板 |
TWI400025B (zh) * | 2009-12-29 | 2013-06-21 | Subtron Technology Co Ltd | 線路基板及其製作方法 |
CN103781292B (zh) * | 2012-10-17 | 2017-09-19 | 碁鼎科技秦皇岛有限公司 | 电路板及其制作方法 |
JP6169894B2 (ja) * | 2013-05-28 | 2017-07-26 | 日東電工株式会社 | 配線回路基板 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3811680B2 (ja) * | 2003-01-29 | 2006-08-23 | 富士通株式会社 | 配線基板の製造方法 |
JP4549695B2 (ja) * | 2003-08-08 | 2010-09-22 | 日本特殊陶業株式会社 | 配線基板の製造方法 |
-
2008
- 2008-05-13 JP JP2008126094A patent/JP4203537B2/ja not_active Expired - Fee Related
- 2008-05-13 JP JP2008126083A patent/JP4203536B2/ja not_active Expired - Fee Related
- 2008-05-13 JP JP2008125999A patent/JP4203535B2/ja not_active Expired - Fee Related
- 2008-05-13 JP JP2008126095A patent/JP4203538B2/ja not_active Expired - Fee Related
- 2008-11-07 JP JP2008286947A patent/JP2009076928A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
JP2008227537A (ja) | 2008-09-25 |
JP4203537B2 (ja) | 2009-01-07 |
JP2008193130A (ja) | 2008-08-21 |
JP2009076928A (ja) | 2009-04-09 |
JP2008244491A (ja) | 2008-10-09 |
JP2008227538A (ja) | 2008-09-25 |
JP4203535B2 (ja) | 2009-01-07 |
JP4203536B2 (ja) | 2009-01-07 |
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