JP4164241B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP4164241B2 JP4164241B2 JP2001038237A JP2001038237A JP4164241B2 JP 4164241 B2 JP4164241 B2 JP 4164241B2 JP 2001038237 A JP2001038237 A JP 2001038237A JP 2001038237 A JP2001038237 A JP 2001038237A JP 4164241 B2 JP4164241 B2 JP 4164241B2
- Authority
- JP
- Japan
- Prior art keywords
- read
- dummy
- data line
- transistor
- memory cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4099—Dummy cell treatment; Reference voltage generators
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/14—Dummy cell management; Sense reference voltage generators
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Semiconductor Memories (AREA)
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001038237A JP4164241B2 (ja) | 2001-02-15 | 2001-02-15 | 半導体装置 |
| TW090120907A TW538414B (en) | 2001-02-15 | 2001-08-24 | Semiconductor device |
| KR1020010051579A KR100823673B1 (ko) | 2001-02-15 | 2001-08-25 | 반도체장치 |
| US09/942,558 US6512714B2 (en) | 2001-02-15 | 2001-08-31 | Semiconductor memory device equipped with dummy cells |
| US10/315,938 US6683813B2 (en) | 2001-02-15 | 2002-12-11 | Semiconductor memory device equipped with dummy cells |
| US10/660,657 US6751142B2 (en) | 2001-02-15 | 2003-09-12 | Semiconductor memory device equipped with dummy cells |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001038237A JP4164241B2 (ja) | 2001-02-15 | 2001-02-15 | 半導体装置 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007226094A Division JP4373464B2 (ja) | 2007-08-31 | 2007-08-31 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2002245775A JP2002245775A (ja) | 2002-08-30 |
| JP2002245775A5 JP2002245775A5 (enExample) | 2006-11-02 |
| JP4164241B2 true JP4164241B2 (ja) | 2008-10-15 |
Family
ID=18901252
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001038237A Expired - Fee Related JP4164241B2 (ja) | 2001-02-15 | 2001-02-15 | 半導体装置 |
Country Status (4)
| Country | Link |
|---|---|
| US (3) | US6512714B2 (enExample) |
| JP (1) | JP4164241B2 (enExample) |
| KR (1) | KR100823673B1 (enExample) |
| TW (1) | TW538414B (enExample) |
Families Citing this family (51)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6563743B2 (en) * | 2000-11-27 | 2003-05-13 | Hitachi, Ltd. | Semiconductor device having dummy cells and semiconductor device having dummy cells for redundancy |
| JP4164241B2 (ja) * | 2001-02-15 | 2008-10-15 | 株式会社ルネサステクノロジ | 半導体装置 |
| US20040183932A1 (en) * | 2003-01-30 | 2004-09-23 | Matsushita Electric Industrial Co., Ltd. | Solid state imaging device |
| US6853591B2 (en) * | 2003-03-31 | 2005-02-08 | Micron Technology, Inc. | Circuit and method for decreasing the required refresh rate of DRAM devices |
| JP4010995B2 (ja) * | 2003-07-31 | 2007-11-21 | Necエレクトロニクス株式会社 | 半導体メモリ及びそのリファレンス電位発生方法 |
| US6831866B1 (en) | 2003-08-26 | 2004-12-14 | International Business Machines Corporation | Method and apparatus for read bitline clamping for gain cell DRAM devices |
| US7046544B1 (en) * | 2003-10-06 | 2006-05-16 | Xilinx, Inc. | SRAM cell with read-disturb immunity |
| US6982897B2 (en) * | 2003-10-07 | 2006-01-03 | International Business Machines Corporation | Nondestructive read, two-switch, single-charge-storage device RAM devices |
| US7963448B2 (en) * | 2004-12-22 | 2011-06-21 | Cognex Technology And Investment Corporation | Hand held machine vision method and apparatus |
| US9552506B1 (en) | 2004-12-23 | 2017-01-24 | Cognex Technology And Investment Llc | Method and apparatus for industrial identification mark verification |
| JP2006190732A (ja) * | 2005-01-04 | 2006-07-20 | Toshiba Corp | 自動設計方法及び半導体集積回路 |
| JP2006261638A (ja) * | 2005-02-21 | 2006-09-28 | Sony Corp | 固体撮像装置および固体撮像装置の駆動方法 |
| US7501676B2 (en) * | 2005-03-25 | 2009-03-10 | Micron Technology, Inc. | High density semiconductor memory |
| JP4849817B2 (ja) * | 2005-04-08 | 2012-01-11 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
| US7180769B2 (en) * | 2005-04-12 | 2007-02-20 | Headway Technologies, Inc. | World line segment select transistor on word line current source side |
| EP1793367A3 (en) * | 2005-12-02 | 2009-08-26 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| US7276155B1 (en) * | 2006-05-04 | 2007-10-02 | Wastewater Technology, Inc. | Waste treatment apparatus with integral membrane apparatus |
| US8108176B2 (en) | 2006-06-29 | 2012-01-31 | Cognex Corporation | Method and apparatus for verifying two dimensional mark quality |
| US7984854B2 (en) * | 2006-07-17 | 2011-07-26 | Cognex Corporation | Method and apparatus for multiplexed symbol decoding |
| US8169478B2 (en) * | 2006-12-14 | 2012-05-01 | Cognex Corporation | Method and apparatus for calibrating a mark verifier |
| US9734376B2 (en) | 2007-11-13 | 2017-08-15 | Cognex Corporation | System and method for reading patterns using multiple image frames |
| US8780629B2 (en) * | 2010-01-15 | 2014-07-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and driving method thereof |
| TWI511236B (zh) * | 2010-05-14 | 2015-12-01 | Semiconductor Energy Lab | 半導體裝置 |
| US8792284B2 (en) * | 2010-08-06 | 2014-07-29 | Semiconductor Energy Laboratory Co., Ltd. | Oxide semiconductor memory device |
| TWI501226B (zh) * | 2011-05-20 | 2015-09-21 | Semiconductor Energy Lab | 記憶體裝置及驅動記憶體裝置的方法 |
| US8773920B2 (en) | 2012-02-21 | 2014-07-08 | International Business Machines Corporation | Reference generator with programmable M and B parameters and methods of use |
| JP6100559B2 (ja) * | 2012-03-05 | 2017-03-22 | 株式会社半導体エネルギー研究所 | 半導体記憶装置 |
| US8921175B2 (en) * | 2012-07-20 | 2014-12-30 | Semiconductor Components Industries, Llc | Process of forming an electronic device including a nonvolatile memory cell |
| KR102055375B1 (ko) | 2013-01-14 | 2020-01-22 | 삼성전자 주식회사 | 저항체를 이용한 비휘발성 메모리 장치 및 이를 포함하는 메모리 시스템 |
| WO2014157019A1 (en) * | 2013-03-25 | 2014-10-02 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| JP6560508B2 (ja) | 2014-03-13 | 2019-08-14 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| KR20150138026A (ko) | 2014-05-29 | 2015-12-09 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 |
| DE102014115204B4 (de) * | 2014-10-20 | 2020-08-20 | Infineon Technologies Ag | Testen von Vorrichtungen |
| CN109643572A (zh) | 2016-09-12 | 2019-04-16 | 株式会社半导体能源研究所 | 存储装置及其工作方法、半导体装置、电子构件以及电子设备 |
| WO2018073708A1 (en) * | 2016-10-20 | 2018-04-26 | Semiconductor Energy Laboratory Co., Ltd. | Storage device, driving method thereof, semiconductor device, electronic component, and electronic device |
| US10860320B1 (en) | 2016-12-06 | 2020-12-08 | Gsi Technology, Inc. | Orthogonal data transposition system and method during data transfers to/from a processing array |
| US10998040B2 (en) | 2016-12-06 | 2021-05-04 | Gsi Technology, Inc. | Computational memory cell and processing array device using the memory cells for XOR and XNOR computations |
| US10847213B1 (en) | 2016-12-06 | 2020-11-24 | Gsi Technology, Inc. | Write data processing circuits and methods associated with computational memory cells |
| US10847212B1 (en) | 2016-12-06 | 2020-11-24 | Gsi Technology, Inc. | Read and write data processing circuits and methods associated with computational memory cells using two read multiplexers |
| US10854284B1 (en) | 2016-12-06 | 2020-12-01 | Gsi Technology, Inc. | Computational memory cell and processing array device with ratioless write port |
| US11227653B1 (en) | 2016-12-06 | 2022-01-18 | Gsi Technology, Inc. | Storage array circuits and methods for computational memory cells |
| US10725777B2 (en) | 2016-12-06 | 2020-07-28 | Gsi Technology, Inc. | Computational memory cell and processing array device using memory cells |
| US10891076B1 (en) | 2016-12-06 | 2021-01-12 | Gsi Technology, Inc. | Results processing circuits and methods associated with computational memory cells |
| US10943648B1 (en) | 2016-12-06 | 2021-03-09 | Gsi Technology, Inc. | Ultra low VDD memory cell with ratioless write port |
| US10777262B1 (en) | 2016-12-06 | 2020-09-15 | Gsi Technology, Inc. | Read data processing circuits and methods associated memory cells |
| US10847651B2 (en) * | 2018-07-18 | 2020-11-24 | Micron Technology, Inc. | Semiconductor devices including electrically conductive contacts and related systems and methods |
| US10985162B2 (en) | 2018-12-14 | 2021-04-20 | John Bennett | System for accurate multiple level gain cells |
| US10958272B2 (en) | 2019-06-18 | 2021-03-23 | Gsi Technology, Inc. | Computational memory cell and processing array device using complementary exclusive or memory cells |
| US10877731B1 (en) | 2019-06-18 | 2020-12-29 | Gsi Technology, Inc. | Processing array device that performs one cycle full adder operation and bit line read/write logic features |
| US10930341B1 (en) * | 2019-06-18 | 2021-02-23 | Gsi Technology, Inc. | Processing array device that performs one cycle full adder operation and bit line read/write logic features |
| US12432906B2 (en) | 2021-11-25 | 2025-09-30 | Samsung Electronics Co., Ltd. | Memory device including dummy capacitor shielding structure and manufacturing method thereof |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56163585A (en) * | 1980-05-17 | 1981-12-16 | Semiconductor Res Found | Semiconductor memory |
| JPS6271091A (ja) * | 1985-09-24 | 1987-04-01 | Nec Corp | 半導体メモリ |
| JPH09213812A (ja) | 1996-01-31 | 1997-08-15 | Fujitsu Ltd | Dramセル及びdram |
| DE19842852B4 (de) * | 1998-09-18 | 2005-05-19 | Infineon Technologies Ag | Integrierter Speicher |
| JP2001006355A (ja) * | 1999-06-16 | 2001-01-12 | Sony Corp | メモリセル及びそれを用いた半導体記憶装置 |
| JP2001093988A (ja) * | 1999-07-22 | 2001-04-06 | Sony Corp | 半導体記憶装置 |
| US6181626B1 (en) * | 2000-04-03 | 2001-01-30 | Lsi Logic Corporation | Self-timing circuit for semiconductor memory devices |
| JP4164241B2 (ja) * | 2001-02-15 | 2008-10-15 | 株式会社ルネサステクノロジ | 半導体装置 |
-
2001
- 2001-02-15 JP JP2001038237A patent/JP4164241B2/ja not_active Expired - Fee Related
- 2001-08-24 TW TW090120907A patent/TW538414B/zh not_active IP Right Cessation
- 2001-08-25 KR KR1020010051579A patent/KR100823673B1/ko not_active Expired - Fee Related
- 2001-08-31 US US09/942,558 patent/US6512714B2/en not_active Expired - Fee Related
-
2002
- 2002-12-11 US US10/315,938 patent/US6683813B2/en not_active Expired - Lifetime
-
2003
- 2003-09-12 US US10/660,657 patent/US6751142B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US6751142B2 (en) | 2004-06-15 |
| US20040046213A1 (en) | 2004-03-11 |
| TW538414B (en) | 2003-06-21 |
| US6683813B2 (en) | 2004-01-27 |
| US20030123313A1 (en) | 2003-07-03 |
| JP2002245775A (ja) | 2002-08-30 |
| US6512714B2 (en) | 2003-01-28 |
| KR20020067406A (ko) | 2002-08-22 |
| US20020136074A1 (en) | 2002-09-26 |
| KR100823673B1 (ko) | 2008-04-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4164241B2 (ja) | 半導体装置 | |
| US7145811B2 (en) | Semiconductor storage device | |
| JP3781270B2 (ja) | 半導体集積回路装置 | |
| JP4032039B2 (ja) | 半導体記憶装置 | |
| US6384445B1 (en) | Semiconductor memory device including memory cell transistors formed on SOI substrate and having fixed body regions | |
| US7123509B2 (en) | Floating body cell memory and reading and writing circuit thereof | |
| US7741668B2 (en) | Nonvolatile ferroelectric memory device | |
| EP1120791A1 (en) | Semiconductor device | |
| JPWO2000070682A1 (ja) | 半導体集積回路装置 | |
| US7336523B2 (en) | Memory device using nanotube cells | |
| US4803664A (en) | Dynamic random access memory having a gain function | |
| US6418073B1 (en) | Semiconductor memory device | |
| JP4373464B2 (ja) | 半導体装置 | |
| CN100461297C (zh) | 半导体存储装置 | |
| US6980474B2 (en) | Semiconductor memory device | |
| US7023752B2 (en) | Semiconductor storage apparatus | |
| JP3904359B2 (ja) | 半導体mos/バイポーラ複合トランジスタを利用した半導体メモリ素子 | |
| JP4075090B2 (ja) | 半導体装置 | |
| JPS63241787A (ja) | 半導体記憶装置 | |
| JPS62226494A (ja) | メモリ | |
| JPH09115284A (ja) | 半導体記憶装置 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20040326 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20040329 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20060912 |
|
| RD02 | Notification of acceptance of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7422 Effective date: 20060912 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20070403 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20070528 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20070703 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20070831 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20080408 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20080701 |
|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20080728 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110801 Year of fee payment: 3 |
|
| R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110801 Year of fee payment: 3 |
|
| S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313111 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110801 Year of fee payment: 3 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120801 Year of fee payment: 4 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120801 Year of fee payment: 4 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130801 Year of fee payment: 5 |
|
| S531 | Written request for registration of change of domicile |
Free format text: JAPANESE INTERMEDIATE CODE: R313531 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| LAPS | Cancellation because of no payment of annual fees |