JP4164192B2 - 半導体装置を搭載する記憶装置 - Google Patents

半導体装置を搭載する記憶装置 Download PDF

Info

Publication number
JP4164192B2
JP4164192B2 JP13133699A JP13133699A JP4164192B2 JP 4164192 B2 JP4164192 B2 JP 4164192B2 JP 13133699 A JP13133699 A JP 13133699A JP 13133699 A JP13133699 A JP 13133699A JP 4164192 B2 JP4164192 B2 JP 4164192B2
Authority
JP
Japan
Prior art keywords
operation mode
data
data bus
mode
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP13133699A
Other languages
English (en)
Japanese (ja)
Other versions
JP2000322314A (ja
JP2000322314A5 (enExample
Inventor
秀徳 三谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Technology Corp
Original Assignee
Renesas Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Priority to JP13133699A priority Critical patent/JP4164192B2/ja
Priority to US09/433,713 priority patent/US6125061A/en
Publication of JP2000322314A publication Critical patent/JP2000322314A/ja
Publication of JP2000322314A5 publication Critical patent/JP2000322314A5/ja
Application granted granted Critical
Publication of JP4164192B2 publication Critical patent/JP4164192B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0626—Reducing size or complexity of storage systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629—Configuration or reconfiguration of storage systems
    • G06F3/0632—Configuration or reconfiguration of storage systems by initialisation or re-initialisation of storage systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0658—Controller construction arrangements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7201—Logical to physical mapping or translation of blocks or pages
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7208—Multiple device management, e.g. distributing data over multiple flash devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0038—System on Chip

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System (AREA)
  • Read Only Memory (AREA)
JP13133699A 1999-05-12 1999-05-12 半導体装置を搭載する記憶装置 Expired - Fee Related JP4164192B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP13133699A JP4164192B2 (ja) 1999-05-12 1999-05-12 半導体装置を搭載する記憶装置
US09/433,713 US6125061A (en) 1999-05-12 1999-11-04 Semiconductor devices with built-in flash memory capable of easily increasing memory capacity by interconnecting them, and storage device provided with semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13133699A JP4164192B2 (ja) 1999-05-12 1999-05-12 半導体装置を搭載する記憶装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2008172421A Division JP2009015850A (ja) 2008-07-01 2008-07-01 半導体装置

Publications (3)

Publication Number Publication Date
JP2000322314A JP2000322314A (ja) 2000-11-24
JP2000322314A5 JP2000322314A5 (enExample) 2005-11-04
JP4164192B2 true JP4164192B2 (ja) 2008-10-08

Family

ID=15055570

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13133699A Expired - Fee Related JP4164192B2 (ja) 1999-05-12 1999-05-12 半導体装置を搭載する記憶装置

Country Status (2)

Country Link
US (1) US6125061A (enExample)
JP (1) JP4164192B2 (enExample)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070233955A1 (en) * 2000-01-06 2007-10-04 Super Talent Electronics Inc. Mixed-Mode ROM/RAM Booting Using an Integrated Flash Controller with NAND-Flash, RAM, and SD Interfaces
US20080256352A1 (en) * 2000-01-06 2008-10-16 Super Talent Electronics, Inc. Methods and systems of booting of an intelligent non-volatile memory microcontroller from various sources
JP3955712B2 (ja) * 2000-03-03 2007-08-08 株式会社ルネサステクノロジ 半導体装置
JP3989665B2 (ja) * 2000-03-03 2007-10-10 株式会社リコー 光情報記録媒体
JP2001306393A (ja) * 2000-04-20 2001-11-02 Mitsubishi Electric Corp 記憶装置
US6822902B2 (en) * 2001-08-20 2004-11-23 Samsung Electronics Co., Ltd. Apparatus and method for interfacing between modem and memory in mobile station
US6778436B2 (en) * 2001-10-10 2004-08-17 Fong Piau Apparatus and architecture for a compact flash memory controller
US7209252B2 (en) * 2002-01-15 2007-04-24 Lexmark International, Inc. Memory module, printer assembly, and method for storing printer code
JP4178879B2 (ja) * 2002-08-29 2008-11-12 沖電気工業株式会社 半導体記憶装置
KR100487539B1 (ko) * 2002-09-02 2005-05-03 삼성전자주식회사 직렬 에이티에이 케이블과 연결되는 불휘발성 반도체메모리 장치
KR100506062B1 (ko) * 2002-12-18 2005-08-05 주식회사 하이닉스반도체 복합형 메모리 장치
JP5010263B2 (ja) * 2006-12-12 2012-08-29 株式会社東芝 不揮発性半導体記憶装置
US8234667B2 (en) 2008-01-04 2012-07-31 International Business Machines Corporation Disk with embedded flash memory and disc drive
US20110167201A1 (en) * 2010-01-06 2011-07-07 Ching-Hsiang Simon Huang Expandable capacity solid state drive

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS603776A (ja) * 1983-06-22 1985-01-10 Matsushita Electric Ind Co Ltd １チツプマイクロコンピユ−タ
JPH01226066A (ja) * 1988-03-04 1989-09-08 Hitachi Ltd ディジタル信号処理プロセッサ
JPH1083384A (ja) * 1996-09-06 1998-03-31 Matsushita Electron Corp マイクロコンピュータ
US6034891A (en) * 1997-12-01 2000-03-07 Micron Technology, Inc. Multi-state flash memory defect management

Also Published As

Publication number Publication date
US6125061A (en) 2000-09-26
JP2000322314A (ja) 2000-11-24

Similar Documents

Publication Publication Date Title
JP4164192B2 (ja) 半導体装置を搭載する記憶装置
US7062618B2 (en) Transferring data between volatile and non-volatile memories based on system parameters using a controller
CN101689246B (zh) 存储器装置、电子装置以及主机设备
US6792501B2 (en) Universal serial bus flash memory integrated circuit device
JP4059002B2 (ja) メモリ装置
US5812814A (en) Alternative flash EEPROM semiconductor memory system
CN114974374B (zh) 具有芯片内执行能力的串行与非门快闪存储器
JP4799417B2 (ja) ホストコントローラ
US20070005829A1 (en) Memory card having memory element and card controller thereof
KR20030004022A (ko) 다기능 반도체 저장장치
WO2002075745A1 (en) Storage device, storage device controlling method, and program
JP4218522B2 (ja) 電子装置、情報処理装置、アダプタ装置及び情報交換システム
JP3556913B2 (ja) Ｐｃカード入出力制御装置
US8386694B2 (en) Memory device, its access method, and memory system
JP2000105725A (ja) チップイネーブル信号生成回路及びメモリ装置
JPH06250799A (ja) 半導体ディスク装置およびその半導体ディスク装置を使用したコンピュータシステム
JP4294894B2 (ja) メモリカード
JP2009015850A (ja) 半導体装置
JP2004192051A (ja) 共用端子制御装置
JP3635996B2 (ja) 情報処理システム
JP4793798B2 (ja) マイクロコンピュータ
JP2004021421A (ja) メモリ装置の制御方法およびそのプログラムならびに記録媒体
KR100810795B1 (ko) 집적 반도체 메모리 및 그의 작동 방법
JP2006301882A (ja) メモリカード
KR20030000017A (ko) 플래시 메모리 제어 장치 및 플래시 메모리 제어 방법

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20050811

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20050811

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20080425

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20080507

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080701

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20080722

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20080728

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110801

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110801

Year of fee payment: 3

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313111

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110801

Year of fee payment: 3

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120801

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120801

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130801

Year of fee payment: 5

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

LAPS Cancellation because of no payment of annual fees