JP4159471B2 - 非平坦性の影響を最小限にするトランジスタ金属ゲート構造の製造方法 - Google Patents

非平坦性の影響を最小限にするトランジスタ金属ゲート構造の製造方法 Download PDF

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Publication number
JP4159471B2
JP4159471B2 JP2003550282A JP2003550282A JP4159471B2 JP 4159471 B2 JP4159471 B2 JP 4159471B2 JP 2003550282 A JP2003550282 A JP 2003550282A JP 2003550282 A JP2003550282 A JP 2003550282A JP 4159471 B2 JP4159471 B2 JP 4159471B2
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Prior art keywords
control electrode
layer
gate
forming
stop layer
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Japanese (ja)
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JP2005512326A (ja
JP2005512326A5 (https=
Inventor
エム． グラント、ジョン
オー． アデトゥトゥ、オルブンミ
エス． マスグローブ、ヨランダ
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NXP USA Inc
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NXP USA Inc
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0225—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate using an initial gate mask complementary to the prospective gate location, e.g. using dummy source and drain electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00—Bonding of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01318—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/667—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/667—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers
    • H10D64/669—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers the conductor further comprising additional layers of alloy material, compound material or organic material, e.g. TaN/TiAlN

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
JP2003550282A 2001-11-30 2002-11-13 非平坦性の影響を最小限にするトランジスタ金属ゲート構造の製造方法 Expired - Lifetime JP4159471B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/997,899 US6423619B1 (en) 2001-11-30 2001-11-30 Transistor metal gate structure that minimizes non-planarity effects and method of formation
PCT/US2002/036653 WO2003049186A2 (en) 2001-11-30 2002-11-13 Transistor metal gate structure that minimizes non-planarity effects and method of formation

Publications (3)

Publication Number Publication Date
JP2005512326A JP2005512326A (ja) 2005-04-28
JP2005512326A5 JP2005512326A5 (https=) 2006-01-05
JP4159471B2 true JP4159471B2 (ja) 2008-10-01

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JP2003550282A Expired - Lifetime JP4159471B2 (ja) 2001-11-30 2002-11-13 非平坦性の影響を最小限にするトランジスタ金属ゲート構造の製造方法

Country Status (8)

Country Link
US (1) US6423619B1 (https=)
EP (1) EP1451859A2 (https=)
JP (1) JP4159471B2 (https=)
KR (1) KR20040063971A (https=)
CN (1) CN1306561C (https=)
AU (1) AU2002365768A1 (https=)
TW (1) TWI251345B (https=)
WO (1) WO2003049186A2 (https=)

Families Citing this family (80)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6974766B1 (en) 1998-10-01 2005-12-13 Applied Materials, Inc. In situ deposition of a low κ dielectric layer, barrier layer, etch stop, and anti-reflective coating for damascene application
US6620723B1 (en) 2000-06-27 2003-09-16 Applied Materials, Inc. Formation of boride barrier layers using chemisorption techniques
US7405158B2 (en) 2000-06-28 2008-07-29 Applied Materials, Inc. Methods for depositing tungsten layers employing atomic layer deposition techniques
US7964505B2 (en) 2005-01-19 2011-06-21 Applied Materials, Inc. Atomic layer deposition of tungsten materials
US6936538B2 (en) 2001-07-16 2005-08-30 Applied Materials, Inc. Method and apparatus for depositing tungsten after surface treatment to improve film characteristics
US6551929B1 (en) 2000-06-28 2003-04-22 Applied Materials, Inc. Bifurcated deposition process for depositing refractory metal layers employing atomic layer deposition and chemical vapor deposition techniques
US7101795B1 (en) * 2000-06-28 2006-09-05 Applied Materials, Inc. Method and apparatus for depositing refractory metal layers employing sequential deposition techniques to form a nucleation layer
US7732327B2 (en) 2000-06-28 2010-06-08 Applied Materials, Inc. Vapor deposition of tungsten materials
US6511911B1 (en) * 2001-04-03 2003-01-28 Advanced Micro Devices, Inc. Metal gate stack with etch stop layer
US6849545B2 (en) * 2001-06-20 2005-02-01 Applied Materials, Inc. System and method to form a composite film stack utilizing sequential deposition techniques
US7211144B2 (en) 2001-07-13 2007-05-01 Applied Materials, Inc. Pulsed nucleation deposition of tungsten layers
WO2003029515A2 (en) 2001-07-16 2003-04-10 Applied Materials, Inc. Formation of composite tungsten films
US8110489B2 (en) 2001-07-25 2012-02-07 Applied Materials, Inc. Process for forming cobalt-containing materials
US9051641B2 (en) 2001-07-25 2015-06-09 Applied Materials, Inc. Cobalt deposition on barrier surfaces
US20090004850A1 (en) 2001-07-25 2009-01-01 Seshadri Ganguli Process for forming cobalt and cobalt silicide materials in tungsten contact applications
WO2003030224A2 (en) 2001-07-25 2003-04-10 Applied Materials, Inc. Barrier formation using novel sputter-deposition method
US20030029715A1 (en) 2001-07-25 2003-02-13 Applied Materials, Inc. An Apparatus For Annealing Substrates In Physical Vapor Deposition Systems
US7049226B2 (en) 2001-09-26 2006-05-23 Applied Materials, Inc. Integration of ALD tantalum nitride for copper metallization
US6936906B2 (en) 2001-09-26 2005-08-30 Applied Materials, Inc. Integration of barrier layer and seed layer
TW589684B (en) * 2001-10-10 2004-06-01 Applied Materials Inc Method for depositing refractory metal layers employing sequential deposition techniques
US6916398B2 (en) 2001-10-26 2005-07-12 Applied Materials, Inc. Gas delivery apparatus and method for atomic layer deposition
US7780785B2 (en) 2001-10-26 2010-08-24 Applied Materials, Inc. Gas delivery apparatus for atomic layer deposition
US6809026B2 (en) 2001-12-21 2004-10-26 Applied Materials, Inc. Selective deposition of a barrier layer on a metal film
EP1324393B1 (en) * 2001-12-28 2008-04-09 STMicroelectronics S.r.l. Manufacturing process of a semiconductor non-volatile memory cell and corresponding memory-cell
US6894355B1 (en) * 2002-01-11 2005-05-17 Advanced Micro Devices, Inc. Semiconductor device with silicide source/drain and high-K dielectric
US6911391B2 (en) 2002-01-26 2005-06-28 Applied Materials, Inc. Integration of titanium and titanium nitride layers
US6998014B2 (en) 2002-01-26 2006-02-14 Applied Materials, Inc. Apparatus and method for plasma assisted deposition
US6827978B2 (en) 2002-02-11 2004-12-07 Applied Materials, Inc. Deposition of tungsten films
US6833161B2 (en) 2002-02-26 2004-12-21 Applied Materials, Inc. Cyclical deposition of tungsten nitride for metal oxide gate electrode
US6720027B2 (en) * 2002-04-08 2004-04-13 Applied Materials, Inc. Cyclical deposition of a variable content titanium silicon nitride layer
US6846516B2 (en) 2002-04-08 2005-01-25 Applied Materials, Inc. Multiple precursor cyclical deposition system
KR100476556B1 (ko) * 2002-04-11 2005-03-18 삼성전기주식회사 압전트랜스 장치, 압전트랜스 하우징 및 그 제조방법
US7279432B2 (en) * 2002-04-16 2007-10-09 Applied Materials, Inc. System and method for forming an integrated barrier layer
US7910165B2 (en) * 2002-06-04 2011-03-22 Applied Materials, Inc. Ruthenium layer formation for copper film deposition
US7404985B2 (en) 2002-06-04 2008-07-29 Applied Materials, Inc. Noble metal layer formation for copper film deposition
US7264846B2 (en) * 2002-06-04 2007-09-04 Applied Materials, Inc. Ruthenium layer formation for copper film deposition
US6838125B2 (en) 2002-07-10 2005-01-04 Applied Materials, Inc. Method of film deposition using activated precursor gases
US20040036129A1 (en) * 2002-08-22 2004-02-26 Micron Technology, Inc. Atomic layer deposition of CMOS gates with variable work functions
US6821563B2 (en) 2002-10-02 2004-11-23 Applied Materials, Inc. Gas distribution system for cyclical layer deposition
US7262133B2 (en) 2003-01-07 2007-08-28 Applied Materials, Inc. Enhancement of copper line reliability using thin ALD tan film to cap the copper line
US6924184B2 (en) * 2003-03-21 2005-08-02 Freescale Semiconductor, Inc. Semiconductor device and method for forming a semiconductor device using post gate stack planarization
US6686282B1 (en) 2003-03-31 2004-02-03 Motorola, Inc. Plated metal transistor gate and method of formation
US7071086B2 (en) * 2003-04-23 2006-07-04 Advanced Micro Devices, Inc. Method of forming a metal gate structure with tuning of work function by silicon incorporation
KR20060079144A (ko) 2003-06-18 2006-07-05 어플라이드 머티어리얼스, 인코포레이티드 배리어 물질의 원자층 증착
US20050104142A1 (en) * 2003-11-13 2005-05-19 Vijav Narayanan CVD tantalum compounds for FET get electrodes
US20050181226A1 (en) * 2004-01-26 2005-08-18 Applied Materials, Inc. Method and apparatus for selectively changing thin film composition during electroless deposition in a single chamber
US7205234B2 (en) 2004-02-05 2007-04-17 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming metal silicide
US20050253268A1 (en) * 2004-04-22 2005-11-17 Shao-Ta Hsu Method and structure for improving adhesion between intermetal dielectric layer and cap layer
US8323754B2 (en) 2004-05-21 2012-12-04 Applied Materials, Inc. Stabilization of high-k dielectric materials
US7429402B2 (en) 2004-12-10 2008-09-30 Applied Materials, Inc. Ruthenium as an underlayer for tungsten film deposition
US7265048B2 (en) * 2005-03-01 2007-09-04 Applied Materials, Inc. Reduction of copper dewetting by transition metal deposition
US7432139B2 (en) * 2005-06-29 2008-10-07 Amberwave Systems Corp. Methods for forming dielectrics and metal electrodes
US7473637B2 (en) 2005-07-20 2009-01-06 Micron Technology, Inc. ALD formed titanium nitride films
JP2007073637A (ja) * 2005-09-05 2007-03-22 Tokyo Electron Ltd 成膜方法および半導体装置の製造方法
US20070128862A1 (en) 2005-11-04 2007-06-07 Paul Ma Apparatus and process for plasma-enhanced atomic layer deposition
US7709402B2 (en) 2006-02-16 2010-05-04 Micron Technology, Inc. Conductive layers for hafnium silicon oxynitride films
US7833358B2 (en) * 2006-04-07 2010-11-16 Applied Materials, Inc. Method of recovering valuable material from exhaust gas stream of a reaction chamber
US8193641B2 (en) * 2006-05-09 2012-06-05 Intel Corporation Recessed workfunction metal in CMOS transistor gates
US7655550B2 (en) * 2006-06-30 2010-02-02 Freescale Semiconductor, Inc. Method of making metal gate transistors
JP2008171872A (ja) * 2007-01-09 2008-07-24 Elpida Memory Inc 半導体装置及びその製造方法
US7737028B2 (en) * 2007-09-28 2010-06-15 Applied Materials, Inc. Selective ruthenium deposition on copper materials
US8022472B2 (en) * 2007-12-04 2011-09-20 Rohm Co., Ltd. Semiconductor device and method of manufacturing semiconductor device
US7964487B2 (en) * 2008-06-04 2011-06-21 International Business Machines Corporation Carrier mobility enhanced channel devices and method of manufacture
US8524588B2 (en) 2008-08-18 2013-09-03 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming a single metal that performs N work function and P work function in a high-k/metal gate process
KR101574107B1 (ko) 2010-02-11 2015-12-04 삼성전자 주식회사 반도체 장치의 제조 방법
JP5937297B2 (ja) * 2010-03-01 2016-06-22 キヤノンアネルバ株式会社 金属窒化膜、該金属窒化膜を用いた半導体装置、および半導体装置の製造方法
JP5598145B2 (ja) * 2010-08-04 2014-10-01 富士通セミコンダクター株式会社 半導体装置の製造方法及び半導体装置
CN102437032B (zh) * 2010-09-29 2015-04-01 中国科学院微电子研究所 后栅工艺中金属栅的制作方法
KR101746709B1 (ko) * 2010-11-24 2017-06-14 삼성전자주식회사 금속 게이트 전극들을 갖는 반도체 소자의 제조방법
TWI512797B (zh) * 2011-01-24 2015-12-11 United Microelectronics Corp 應用於半導體元件製程中之平坦化方法
US8759219B2 (en) * 2011-01-24 2014-06-24 United Microelectronics Corp. Planarization method applied in process of manufacturing semiconductor component
CN102646580B (zh) * 2011-02-18 2016-10-05 联华电子股份有限公司 应用于半导体元件工艺中的平坦化方法以及栅极构造
US8865594B2 (en) * 2011-03-10 2014-10-21 Applied Materials, Inc. Formation of liner and barrier for tungsten as gate electrode and as contact plug to reduce resistance and enhance device performance
US20130075831A1 (en) * 2011-09-24 2013-03-28 Taiwan Semiconductor Manufacturing Company, Ltd. Metal gate stack having tialn blocking/wetting layer
US8901665B2 (en) * 2011-12-22 2014-12-02 Taiwan Semiconductor Manufacturing Company, Ltd. Gate structure for semiconductor device
US9324710B2 (en) 2014-02-24 2016-04-26 International Business Machines Corporation Very planar gate cut post replacement gate process
US9583486B1 (en) * 2015-11-19 2017-02-28 International Business Machines Corporation Stable work function for narrow-pitch devices
TWI633660B (zh) * 2017-05-22 2018-08-21 Powerchip Technology Corporation 半導體元件及其製造方法
CN109309003A (zh) * 2017-07-26 2019-02-05 中芯国际集成电路制造(上海)有限公司 鳍式场效应晶体管的形成方法
US11152222B2 (en) * 2019-08-06 2021-10-19 Taiwan Semiconductor Manufacturing Company, Ltd. Dishing prevention structure embedded in a gate electrode

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5494857A (en) * 1993-07-28 1996-02-27 Digital Equipment Corporation Chemical mechanical planarization of shallow trenches in semiconductor substrates
US5604159A (en) 1994-01-31 1997-02-18 Motorola, Inc. Method of making a contact structure
US5364817A (en) 1994-05-05 1994-11-15 United Microelectronics Corporation Tungsten-plug process
US5654589A (en) 1995-06-06 1997-08-05 Advanced Micro Devices, Incorporated Landing pad technology doubled up as local interconnect and borderless contact for deep sub-half micrometer IC application
US6040599A (en) * 1996-03-12 2000-03-21 Mitsubishi Denki Kabushiki Kaisha Insulated trench semiconductor device with particular layer structure
US6015757A (en) * 1997-07-02 2000-01-18 Taiwan Semiconductor Manufacturing Co. Ltd. Method of oxide etching with high selectivity to silicon nitride by using polysilicon layer
US5966597A (en) * 1998-01-06 1999-10-12 Altera Corporation Method of forming low resistance gate electrodes
TW379406B (en) * 1998-04-27 2000-01-11 United Microelectronics Corp Shallow trench isolation method
US6150260A (en) 1998-07-06 2000-11-21 Chartered Semiconductor Manufacturing Ltd. Sacrificial stop layer and endpoint for metal CMP
US6140224A (en) 1999-04-19 2000-10-31 Worldiwide Semiconductor Manufacturing Corporation Method of forming a tungsten plug
JP4237332B2 (ja) * 1999-04-30 2009-03-11 株式会社東芝 半導体装置の製造方法
JP2000332242A (ja) * 1999-05-21 2000-11-30 Mitsubishi Electric Corp 半導体装置及びその製造方法
US6171910B1 (en) 1999-07-21 2001-01-09 Motorola Inc. Method for forming a semiconductor device
US6248675B1 (en) * 1999-08-05 2001-06-19 Advanced Micro Devices, Inc. Fabrication of field effect transistors having dual gates with gate dielectrics of high dielectric constant using lowered temperatures
US6087231A (en) 1999-08-05 2000-07-11 Advanced Micro Devices, Inc. Fabrication of dual gates of field transistors with prevention of reaction between the gate electrode and the gate dielectric with a high dielectric constant
US6200886B1 (en) 1999-10-28 2001-03-13 United Silicon Incorporated Fabricating process for polysilicon gate

Also Published As

Publication number Publication date
JP2005512326A (ja) 2005-04-28
US6423619B1 (en) 2002-07-23
AU2002365768A8 (en) 2003-06-17
TW200300609A (en) 2003-06-01
CN1306561C (zh) 2007-03-21
AU2002365768A1 (en) 2003-06-17
CN1596460A (zh) 2005-03-16
TWI251345B (en) 2006-03-11
KR20040063971A (ko) 2004-07-15
EP1451859A2 (en) 2004-09-01
WO2003049186A3 (en) 2003-09-12
WO2003049186A2 (en) 2003-06-12

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