JP4148895B2 - Hole copper plating method - Google Patents

Hole copper plating method Download PDF

Info

Publication number
JP4148895B2
JP4148895B2 JP2003536491A JP2003536491A JP4148895B2 JP 4148895 B2 JP4148895 B2 JP 4148895B2 JP 2003536491 A JP2003536491 A JP 2003536491A JP 2003536491 A JP2003536491 A JP 2003536491A JP 4148895 B2 JP4148895 B2 JP 4148895B2
Authority
JP
Japan
Prior art keywords
electrolysis
plating
copper
current density
copper plating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2003536491A
Other languages
Japanese (ja)
Other versions
JPWO2003033775A1 (en
Inventor
健次 中村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Publication of JPWO2003033775A1 publication Critical patent/JPWO2003033775A1/en
Application granted granted Critical
Publication of JP4148895B2 publication Critical patent/JP4148895B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/18Electroplating using modulated, pulsed or reversing current
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00Electroplating: Baths therefor
    • C25D3/02Electroplating: Baths therefor from solutions
    • C25D3/38Electroplating: Baths therefor from solutions of copper
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02Electroplating of selected surface areas
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/60Electroplating characterised by the structure or texture of the layers
    • C25D5/605Surface topography of the layers, e.g. rough, dendritic or nodular layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/423Plated through-holes or plated via connections characterised by electroplating method
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14Related to the order of processing steps
    • H05K2203/1476Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Electroplating And Plating Baths Therefor (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Description

【0001】
【発明の属する技術分野】
本発明は、小径ホールの銅めっき方法に関する。
【0002】
【従来の技術】
電子部品の配線の高密度化に伴って、配線基板のスルーホールやブラインドビアが小径化し、これらの内部に確実にめっき皮膜を形成することが困難になっている。すなわち、通常のめっき方法では、スルーホール中央部やビア底のめっき厚が極端に薄くなるために、信頼性に問題がある。また、内部を厚くするために、長時間のめっきを行うと、コストがかかったり、開口部が塞がったりして、新たな不具合が発生する。
【0003】
これらの問題を解決するために、周期的に電解極性を逆転させるPPR(Periodic Pulse Reverse)めっき法(例えば特開2000−68651号公報)や、特殊な撹拌を行う方法が提案されている。
【0004】
しかしながら、従来のPPRめっき法では、ミリ秒(ms)単位のパルスを使用するため、次のような課題がある。
【0005】
すなわち、極性を連続的に高速に切り替えることができる高性能で、高価なパルス電源を必要とする。
【0006】
また、基板の表裏のパターンのめっきを行うための2台の電源の同期をとる必要があるが、パルスが高速なため同期させることが極めて困難である。
【0007】
また、逆電解電流密度が正電解電流密度の1〜5倍程度必要なため、大容量の電源が必要となる。
【0008】
また、パルスが高速(高周波数)なため、配線のインダクタンスによるロスを考慮した配線の引き回しが必要となる。
【0009】
また、被めっき物(基板)をめっき液に吊るす、ラックめっきの場合には、基板中央部にパルスの効果が届かないため、実用的でない。
【0010】
さらに、各種のめっき条件の設定が容易でないという種々の課題がある。
【0011】
また、特殊な撹拌装置を用いる場合には、全ての部分に一様に撹拌を行うのは困難であるし、またコストがかかるという課題がある。
【0012】
【発明が解決しようとする課題】
そこで、本発明の目的は、高精度、大容量のパルス電源を必要としないため、設備コストの低減化が図れると共に、小径ホール内に良好にめっきを施すことができる小径ホールの銅めっき方法を提供することである。
【0013】
【課題を解決するための手段】
上記目的を達成するために、本発明による小径ホールの銅めっき方法は、硫酸銅、硫酸、塩素イオン、硫黄化合物、界面活性剤を含む硫酸銅めっき液により、小径ホールを有する被めっき物の小径ホール内にPPR法により銅めっきを施す小径ホール内の銅めっき方法において、逆電解を0.1〜1A/dm2 の電流密度範囲で行って、被めっき物に吸着されている硫黄化合物の、小径ホールの入口付近の硫黄化合物の剥離を行うことにより、正電解時の小径ホール内の分極抵抗を小径ホールの入口付近よりも低く保って、小径ホール内に均一厚さの銅めっき皮膜を形成することを特徴とする。
【0014】
前記逆電解時、前半の逆電解を高い電流密度で、後半の逆電解を前半時よりも低い電流密度で行う2段階の逆電解を行うとさらに好適である。
【0015】
また、正電解を数十〜数百秒間行い、逆電解を数秒〜数十秒間行うようにする。
【0016】
正電解を1〜2A/dm2 の電流密度範囲で行うと好適である。
【0017】
硫酸濃度を150〜250g/l、硫酸銅濃度を130〜200g/lとした、低電気抵抗、高銅濃度の硫酸銅めっき液を用いるとよい。さらには、硫酸濃度を200g/l前後、硫酸銅濃度を150g/l前後とした硫酸銅めっき液が安定性の上で好適である。
【0018】
また、小径ホール内を銅めっきで埋めることもできる。
【0019】
【発明の実施の形態】
以下、本発明の好適な実施の形態を添付図面に基づいて詳細に説明する。
【0020】
まず硫酸銅めっき液について説明する。
【0021】
硫酸銅めっき液の組成は、銅供給源としての硫酸銅、伝導度調整のための硫酸、抑制物質としての塩素イオン(塩化物)および界面活性剤、めっき促進剤として機能する硫黄化合物からなる。
【0022】
小径ホール内へのめっきの付き回り性を向上させるため、高銅濃度の液とするのが好ましく、また、めっき液の電気抵抗を低くするため、硫酸量が多い程良好である。しかし、硫酸の量が多くなると、硫酸銅が溶解しにくくなり、過剰になると硫酸銅が析出してしまう。よって、両者のバランスが必要となる。
【0023】
図1は、硫酸濃度、硫酸銅濃度とめっき液の電気抵抗の関係を示すグラフであり、5%硫酸の電気抵抗を1とした場合の比較である。また、図2は、硫酸濃度と飽和硫酸銅濃度との関係を示すグラフである。
【0024】
図1から明らかなように、硫酸濃度が150g/l以上で電気抵抗は低く、ほぼ一定となる。したがって、低電気抵抗のめっき液とするために、硫酸濃度は150g/l以上が好ましい。また高銅濃度の液とするために、硫酸濃度は250g/l以下とするのが好ましい。
【0025】
また、図2の直線より下の領域が銅めっき液として使用できる領域であり、上記硫酸濃度の範囲(150〜250g/l)で、硫酸銅濃度は略130〜200g/lの範囲で溶解させることができる。
【0026】
上記範囲内で、高銅濃度を保って安定的に使用できるめっき液として、硫酸濃度を200g/l前後、硫酸銅濃度を150g/l前後に調整すると最適である。
【0027】
なお、上記の「前後」とは、±5%程度をいう。
【0028】
塩素イオン源としては、塩酸、塩化ナトリウム、塩化カリウム、塩化アンモニウム等を挙げることができる。これらは単独でも併用してもよい。添加量は、塩素イオンとして、10〜200mg/lの範囲で使用できるが、35mg/l前後が好適である。
【0029】
硫黄化合物は特に限定されないが、3−メルカプト−1−プロパンスルホン酸ナトリウムもしくは2−メルカプトエタンスルホン酸ナトリウム、ビス−(3−スルフォプロピル)−ジスルファイドジソディウムなどの硫黄化合物を単独もしくは併用して好適に用いることができる。
【0030】
これら硫黄化合物の添加量は、1mg/l前後の僅かな添加量で効果がある。
【0031】
界面活性剤も特に限定されないが、ポリエチレングリコール、ポリプロピレングリコールなどの界面活性剤を単独もしくは併用して使用できる。
【0032】
界面活性剤の添加量は、数mg/l〜10g/l程度の範囲で使用できる。
【0033】
界面活性剤は塩素イオンと共に存在することで、陰極での分極抵抗を高くする。
【0034】
一方、硫黄化合物は、陰極での分極抵抗を低くして、促進剤として機能する。
【0035】
硫酸銅めっき液中に、界面活性剤、塩素イオン、硫黄化合物が含まれる場合、陰極表面の分極抵抗はこれら添加剤の吸着量のバランスに依存する。特に、硫黄化合物は被めっき物の表面に吸着され、吸着した表面の分極抵抗を下げる効果が強い。したがって、硫黄化合物の吸着量を制御することは分極抵抗の制御につながる。
【0036】
本発明では、正電解時、被めっき物(配線基板等)の表面や、小径ホールの入口側の分極抵抗を高く、小径ホール内の分極抵抗を低くするように制御して、全体として、均一な厚さのめっき皮膜が形成されるようにするのである。
【0037】
そのために、逆電解を行って、被めっき物の表面側や小径ホールの入口付近に吸着されている硫黄化合物を剥離し、これにより、正電解時、上記のように、分極抵抗に差をもたせるようにする。
【0038】
めっき系の電気抵抗は、分極抵抗とめっき液の電気抵抗の和として定義される。
【0039】
したがって、めっき液の電気抵抗を分極抵抗に対して十分に小さくすれば、めっき系の電気抵抗、したがってこれに反比例する電流値は分極抵抗の大きさに依存することになる。上記のように、銅めっき液中の硫酸濃度を高くして、めっき液の電気抵抗を低く抑え、分極抵抗の制御をより行い易いようにしているのである。
【0040】
分極抵抗Rcを、
Rc=|VSCE −VO |/I(VO は平衡電位)と定義し、電位と電流値により分極抵抗を測定した。
【0041】
図3は、配線基板に逆電解を種々の電位で、10秒間行い、次いで正電解を行った際の分極抵抗の大きさを計測したグラフである。なお、分極抵抗は、被めっき物(配線基板)の表面での分極抵抗を示す。小径ホール内の分極抵抗は当然に表面の分極抵抗よりも低くなる。
【0042】
図3に見られるように、逆電解時の電解電位が0.10〜0.16V(vs SCE)の範囲で、正電解時の分極抵抗が変化し、逆電解時の電解電位により、正電解時の分極抵抗を制御できることがわかる。電解電位が高くなるほど分極抵抗が高くなる。すなわち、電極電位が高くなるほど、硫黄化合物の剥離が生じ、正電解時の分極抵抗が高くなるのである。
【0043】
しかも、逆電解の時間を10秒と長時間に設定した場合で、正電解時の分極抵抗を制御できる電位範囲が得られたことは特筆に値する。このことは、長周期のPPRめっきが行えることを示唆している。
【0044】
実験の結果、逆電解の時間は、1秒〜数十秒の範囲で十分行えることがわかった。
【0045】
なお、逆電解の制御を電位により制御すると、電流密度が暴走するおそれがあるので、電流密度で制御するのが好適である。上記電位に対応する電流密度は0.1〜1A/dm2 となる。
【0046】
また、0.5A/dm2 より大きな電流密度の場合には、被めっき物の表面が荒れてくるので、0.1〜0.5A/dm2 の範囲での電流密度で制御するのが好ましい。ただし、荒れがそれ程問題とならない被めっき物の場合には、上記以上の電流密度で制御してもよい。
【0047】
このように、逆電解時の電流密度によって硫黄化合物の剥離の程度が制御でき、その結果、正電解時の分極抵抗を制御できる。
【0048】
分極抵抗の大きさは、被めっき物の小径ホール内では計測ができないが、逆電解の効果は小径ホール内にはほとんど及ばないので、小径ホール内での硫黄化合物の剥離は入口付近を除いてほとんど生じないと考えてよい。したがって、小径ホール内の正電解時の分極抵抗は低いまま維持され、それだけ、小径ホール内への電流の流れ込みが生じ、小径ホール内であっても、めっきの付き回り正が改善される。逆電解時の電流密度設定、逆電解時間、正電解時の電流密度、電解時間の設定は、対象となる被めっき物に応じて、めっき厚を計測しつつ行えばよい。
【0049】
図4は、本実施の形態におけるPPRめっきの電流波形を模式的に示す。
【0050】
最適な逆電解時の電流密度は0.1〜0.5A/dm2 で、最適な電解時間は1〜10秒程度である。
【0051】
また、実験の結果、逆電解時、前半の逆電解を高い電流密度で、後半の逆電解を前半時よりも低い電流密度で行う2段階の逆電解を行うようにすると、より効果的であることがわかった。
【0052】
このように逆電解を2段階で行なうことにより効果が向上するのは下記の理由によると考えられる。すなわち、前半(1段目)の逆電解では、スルーホールの外部に対する剥離作用が強く、スルーホールの内部に対する剥離作用が弱い。後半(2段目)の逆電解では、剥離のための電位が極めて弱いため、スルーホールの外部では僅かに剥離が行なわれるが、内部では剥離作用がほとんどなく、むしろ硫黄化合物の吸着が進行すると考えられる。
【0053】
したがって、1段目の逆電解ではスルーホール外部の硫黄化合物を確実に剥離し、2段目の逆電解では微弱な剥離作用によりスルーホール外部の剥離された状態が維持されるながらスルーホール内部への硫黄化合物の吸着が起きる。その結果、逆電解を1段階で行なった場合に比べて、スルーホールの外部と内部での硫黄化合物の吸着濃度差が大きくなり、より大きな分極抵抗差が発生する。
【0054】
また、1段のみの逆電解ではスルーホールの形状によってはスルーホール内部を剥離し過ぎてしまい、スルーホールの外部と内部の分極抵抗差が十分得られない場合がある。このような場合にも、2段目の弱い逆電解を行なうことにより、分極抵抗差を確実に得ることができる。
【0055】
正電解時の電流密度は1.5A/dm2 程度(これは特に限定されない。めっきの付き回り性をみて決定すればよい)、電解時間は50〜200秒程度が良好である。
【0056】
【実施例】
硫酸銅めっき液は下記組成のものを共通して用いた。
【0057】
硫酸銅5水和物 150g/l
硫酸 200g/l
ポリエチレングリコール4000 3g/l
SPS 1mg/l
塩素イオン 35mg/l
なお、SPSは、ビス−(3−スルフォプロピル)−ジスルファイドジソディウムをいう。
【0058】
〔実施例1〕
開口径0.1mmのスルーホールを有する、厚さ0.8mmの配線基板に下記の条件でPPRめっきを行った。
【0059】
正電解:電流密度1.5A/dm2 、電解時間120秒
逆電解:電流密度0.5A/dm2 、電解時間10秒
めっき時間76分
その結果、膜厚比:(スルーホール中央部の膜厚/基板表面の膜厚)×100は91.3%であった。
【0060】
〔実施例2〕
開口径0.15mmのスルーホールを有する、厚さ0.8mmの配線基板に下記の条件でPPRめっきを行った。
【0061】
正電解:電流密度1.5A/dm2 、電解時間120秒
逆電解:電流密度0.5A/dm2 、電解時間10秒
めっき時間76分
その結果、膜厚比は101.4%であった。
【0062】
〔実施例3〕
開口径0.1mmのスルーホールを有する、厚さ0.8mmの配線基板に下記の条件でPPRめっきを行った。
【0063】
正電解:電流密度1.5A/dm2 、電解時間120秒
逆電解1:電流密度0.5A/dm2 、電解時間5秒
逆電解2:電流密度0.1A/dm2 、電解時間5秒
めっき時間76分
その結果、膜厚比は109.8%であった。
【0064】
〔実施例4〕
開口径0.15mmのスルーホールを有する、厚さ0.8mmの配線基板に下記の条件でPPRめっきを行った。
【0065】
正電解:電流密度1.5A/dm2 、電解時間120秒
逆電解1:電流密度0.5A/dm2 、電解時間5秒
逆電解2:電流密度0.1A/dm2 、電解時間5秒
めっき時間76分
その結果、膜厚比は110.8%であった。
【0066】
〔比較例1〕
上記硫酸銅めっき液を用いて、開口径0.1mmのスルーホールを有する、厚さ0.8mmの配線基板に下記の条件で直流めっきを行った。
【0067】
電流密度1.35A/dm2
めっき時間76分
その結果膜厚比は53.9%であった。
【0068】
〔比較例2〕
上記硫酸銅めっき液を用いて、開口径0.15mmのスルーホールを有する、厚さ0.8mmの配線基板に下記の条件で直流めっきを行った。
【0069】
電流密度1.35A/dm2
めっき時間76分
その結果膜厚比は54.8%であった。
【0070】
図5〜図10はスルーホールの断面写真(倍率75倍)であり、図5、6、7、8はそれぞれ実施例1、2、3、4のスルーホールを、図9、10はそれぞれ比較例1、2のスルーホールを示す。
【0071】
以上のように、実施例1〜4においては、膜厚比(スローイングパワー)がほぼ100%となり、表面および小径ホール内に、均一厚さの銅めっき皮膜を形成することができる。
【0072】
特に、逆電解を2段階で行った場合に、小径ホール内部のめっき厚の方が表面のめっき厚よりも厚くなる結果となった。この場合に、めっき時間を延長すれば、小径ホール内をめっきによって埋めることも可能となる。
【0073】
また、上記実施例ではスルーホールのめっきを例として説明したが、マイクロブラインドビア内のめっきも同様にして行うことができる。
【0074】
【産業上の利用可能性】
以上のように、本発明方法によれば、秒単位での長周期のPPRめっき法とすることができ、高精度、大容量のパルス電流を必要としないから、設備コストを低減できる。
【0075】
また、基板の表裏のめっきのための電流の同期も容易にとることができ、インダクタンスによるロスを考慮した配線も不用となる。
【0076】
さらに、表面、開口部、小径ホール内部の膜厚がほぼ均一となるめっき皮膜を形成することができる。
【図面の簡単な説明】
【図1】 図1は、硫酸濃度とめっき液の抵抗の関係を示すグラフである。
【図2】 図2は、硫酸の濃度と飽和硫酸銅濃度の関係を示すグラフである。
【図3】 図3は、逆電解電位と、正電解時の分極抵抗の大きさの関係を示すグラフである。
【図4】 図4は、本発明の一実施形態における電流波形を示す模式図である。
【図5】 図5は、実施例1のスルーホールの断面写真である。
【図6】 図6は、実施例2のスルーホールの断面写真である。
【図7】 図7は、実施例3のスルーホールの断面写真である。
【図8】 図8は、実施例4のスルーホールの断面写真である。
【図9】 図9は、比較例1のスルーホールの断面写真である。
【図10】 図10は、比較例2のスルーホールの断面写真である。
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a copper plating method for small-diameter holes.
[0002]
[Prior art]
As the wiring density of electronic parts is increased, the diameter of through-holes and blind vias in the wiring board is reduced, and it is difficult to reliably form a plating film inside these wiring holes. That is, in the normal plating method, the plating thickness at the center of the through hole and the via bottom becomes extremely thin, which causes a problem in reliability. In addition, if plating is performed for a long time in order to increase the thickness of the interior, costs are increased and the opening is blocked, resulting in new problems.
[0003]
In order to solve these problems, a PPR (Periodic Pulse Reverse) plating method (for example, JP 2000-68651 A) that periodically reverses the electrolytic polarity and a method of performing special stirring have been proposed.
[0004]
However, since the conventional PPR plating method uses pulses in units of milliseconds (ms), there are the following problems.
[0005]
That is, a high-performance and expensive pulse power source capable of continuously switching the polarity at high speed is required.
[0006]
In addition, it is necessary to synchronize the two power sources for plating the patterns on the front and back of the substrate, but it is extremely difficult to synchronize because the pulses are fast.
[0007]
Moreover, since the reverse electrolysis current density is required to be about 1 to 5 times the positive electrolysis current density, a large-capacity power source is required.
[0008]
Further, since the pulse is high speed (high frequency), it is necessary to route the wiring in consideration of the loss due to the inductance of the wiring.
[0009]
Further, in the case of rack plating in which an object to be plated (substrate) is suspended in a plating solution, the effect of the pulse does not reach the central portion of the substrate, which is not practical.
[0010]
Furthermore, there are various problems that it is not easy to set various plating conditions.
[0011]
Further, when a special stirring device is used, it is difficult to uniformly stir all parts, and there is a problem that costs are increased.
[0012]
[Problems to be solved by the invention]
Therefore, an object of the present invention is to provide a copper plating method for a small-diameter hole that can reduce the equipment cost because it does not require a high-accuracy and large-capacity pulse power source, and can perform good plating in the small-diameter hole. Is to provide.
[0013]
[Means for Solving the Problems]
In order to achieve the above object, a method for copper plating of a small-diameter hole according to the present invention includes a copper sulfate, sulfuric acid, chloride ion, sulfur compound, and a copper sulfate plating solution containing a surfactant. In the copper plating method in the small-diameter hole in which copper plating is performed in the hole by the PPR method, reverse electrolysis is performed in a current density range of 0.1 to 1 A / dm 2 , and the sulfur compound adsorbed on the object to be plated is By stripping sulfur compounds near the entrance of the small-diameter hole, the polarization resistance in the small-diameter hole during positive electrolysis is kept lower than that near the entrance of the small-diameter hole, and a copper plating film with a uniform thickness is formed in the small-diameter hole. It is characterized by doing.
[0014]
In the reverse electrolysis, it is more preferable to perform two-step reverse electrolysis in which the first half reverse electrolysis is performed at a high current density and the second half reverse electrolysis is performed at a lower current density than the first half.
[0015]
Further, the forward electrolysis is performed for several tens to several hundred seconds, and the reverse electrolysis is performed for several seconds to several tens of seconds.
[0016]
It is preferable to perform positive electrolysis in a current density range of 1 to 2 A / dm2.
[0017]
It is preferable to use a copper sulfate plating solution having a low electrical resistance and a high copper concentration and having a sulfuric acid concentration of 150 to 250 g / l and a copper sulfate concentration of 130 to 200 g / l. Furthermore, a copper sulfate plating solution having a sulfuric acid concentration of around 200 g / l and a copper sulfate concentration of around 150 g / l is preferable in terms of stability.
[0018]
Moreover, the inside of a small diameter hole can also be filled with copper plating.
[0019]
DETAILED DESCRIPTION OF THE INVENTION
DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, preferred embodiments of the invention will be described in detail with reference to the accompanying drawings.
[0020]
First, the copper sulfate plating solution will be described.
[0021]
The composition of the copper sulfate plating solution is composed of copper sulfate as a copper supply source, sulfuric acid for conductivity adjustment, chlorine ions (chlorides) as an inhibitor and a surfactant, and a sulfur compound that functions as a plating accelerator.
[0022]
In order to improve the ability of plating in small-diameter holes, it is preferable to use a solution having a high copper concentration, and in order to reduce the electrical resistance of the plating solution, the larger the amount of sulfuric acid, the better. However, when the amount of sulfuric acid increases, copper sulfate becomes difficult to dissolve, and when it is excessive, copper sulfate is precipitated. Therefore, a balance between both is required.
[0023]
FIG. 1 is a graph showing the relationship between the sulfuric acid concentration, the copper sulfate concentration and the electrical resistance of the plating solution, and is a comparison when the electrical resistance of 5% sulfuric acid is 1. FIG. 2 is a graph showing the relationship between the sulfuric acid concentration and the saturated copper sulfate concentration.
[0024]
As is apparent from FIG. 1, when the sulfuric acid concentration is 150 g / l or more, the electric resistance is low and becomes almost constant. Accordingly, the sulfuric acid concentration is preferably 150 g / l or more in order to obtain a plating solution with low electrical resistance. In order to obtain a high copper concentration solution, the sulfuric acid concentration is preferably 250 g / l or less.
[0025]
Moreover, the area below the straight line in FIG. 2 is an area that can be used as a copper plating solution. In the above sulfuric acid concentration range (150 to 250 g / l), the copper sulfate concentration is approximately 130 to 200 g / l. be able to.
[0026]
Within the above range, as a plating solution that can be used stably while maintaining a high copper concentration, it is optimal to adjust the sulfuric acid concentration to around 200 g / l and the copper sulfate concentration to around 150 g / l.
[0027]
In addition, said "before and after" means about +/- 5%.
[0028]
Examples of the chlorine ion source include hydrochloric acid, sodium chloride, potassium chloride, ammonium chloride and the like. These may be used alone or in combination. The addition amount can be used in the range of 10 to 200 mg / l as chloride ions, but around 35 mg / l is preferred.
[0029]
The sulfur compound is not particularly limited, but a sulfur compound such as sodium 3-mercapto-1-propanesulfonate, sodium 2-mercaptoethanesulfonate, or bis- (3-sulfopropyl) -disulfide disodium is used alone or in combination. Therefore, it can be suitably used.
[0030]
The addition amount of these sulfur compounds is effective with a slight addition amount of around 1 mg / l.
[0031]
The surfactant is not particularly limited, and surfactants such as polyethylene glycol and polypropylene glycol can be used alone or in combination.
[0032]
The addition amount of the surfactant can be used in the range of several mg / l to 10 g / l.
[0033]
The surfactant is present together with the chlorine ions, thereby increasing the polarization resistance at the cathode.
[0034]
On the other hand, the sulfur compound lowers the polarization resistance at the cathode and functions as an accelerator.
[0035]
When a surfactant, chloride ion, and sulfur compound are contained in the copper sulfate plating solution, the polarization resistance on the cathode surface depends on the balance of the adsorbed amount of these additives. In particular, the sulfur compound is adsorbed on the surface of the object to be plated, and has a strong effect of reducing the polarization resistance of the adsorbed surface. Therefore, controlling the adsorption amount of the sulfur compound leads to control of the polarization resistance.
[0036]
In the present invention, during positive electrolysis, the surface of the object to be plated (wiring board, etc.) and the polarization resistance on the entrance side of the small diameter hole are controlled to be high and the polarization resistance in the small diameter hole is controlled to be uniform as a whole. A plating film with a proper thickness is formed.
[0037]
For this purpose, reverse electrolysis is performed to remove the sulfur compound adsorbed on the surface of the object to be plated or in the vicinity of the entrance of the small-diameter hole, thereby causing a difference in polarization resistance during positive electrolysis as described above. Like that.
[0038]
The electrical resistance of the plating system is defined as the sum of the polarization resistance and the electrical resistance of the plating solution.
[0039]
Therefore, if the electric resistance of the plating solution is made sufficiently small with respect to the polarization resistance, the electric resistance of the plating system, and therefore the current value inversely proportional to this, depends on the magnitude of the polarization resistance. As described above, the sulfuric acid concentration in the copper plating solution is increased, the electric resistance of the plating solution is kept low, and the polarization resistance is more easily controlled.
[0040]
Polarization resistance Rc is
Rc = | V SCE −V O | / I (V O is an equilibrium potential), and the polarization resistance was measured by the potential and the current value.
[0041]
FIG. 3 is a graph obtained by measuring the magnitude of polarization resistance when reverse electrolysis was performed on a wiring board at various potentials for 10 seconds and then positive electrolysis was performed. The polarization resistance indicates the polarization resistance on the surface of the object to be plated (wiring substrate). Naturally, the polarization resistance in the small-diameter hole is lower than the polarization resistance of the surface.
[0042]
As shown in FIG. 3, the polarization resistance during positive electrolysis changes in the range of 0.10 to 0.16 V (vs SCE) during reverse electrolysis, and the positive electrolysis depends on the electrolysis potential during reverse electrolysis. It can be seen that the polarization resistance at the time can be controlled. The higher the electrolytic potential, the higher the polarization resistance. That is, the higher the electrode potential, the more the sulfur compound is peeled off, and the higher the polarization resistance during positive electrolysis.
[0043]
Moreover, it is worthy to note that a potential range in which the polarization resistance during the positive electrolysis can be controlled when the reverse electrolysis time is set to a long time of 10 seconds. This suggests that long-period PPR plating can be performed.
[0044]
As a result of the experiment, it was found that the time of reverse electrolysis can be sufficiently performed in the range of 1 second to several tens of seconds.
[0045]
Note that if the reverse electrolysis control is controlled by the potential, the current density may run away, so that it is preferable to control by the current density. The current density corresponding to the potential is 0. The 1~1A / dm 2.
[0046]
In addition, when the current density is larger than 0.5 A / dm 2 , the surface of the object to be plated becomes rough, and therefore it is preferable to control the current density in the range of 0.1 to 0.5 A / dm 2. . However, in the case of an object to be plated in which roughness is not so much a problem, the current density may be controlled to the above or higher.
[0047]
Thus, the degree of separation of the sulfur compound can be controlled by the current density during reverse electrolysis, and as a result, the polarization resistance during positive electrolysis can be controlled.
[0048]
The magnitude of the polarization resistance cannot be measured in the small-diameter hole of the object to be plated, but the effect of reverse electrolysis hardly affects the small-diameter hole, so exfoliation of sulfur compounds in the small-diameter hole is limited except near the entrance. You may think that it hardly occurs. Therefore, the polarization resistance during positive electrolysis in the small-diameter hole is kept low, and accordingly, current flows into the small-diameter hole, so that the positive contact with the plating is improved even in the small-diameter hole. The current density setting during reverse electrolysis, the reverse electrolysis time, the current density during normal electrolysis, and the electrolysis time may be set while measuring the plating thickness according to the object to be plated.
[0049]
FIG. 4 schematically shows a current waveform of PPR plating in the present embodiment.
[0050]
The optimum current density during reverse electrolysis is 0.1 to 0.5 A / dm 2 , and the optimum electrolysis time is about 1 to 10 seconds.
[0051]
In addition, as a result of the experiment, it is more effective to perform the two-step reverse electrolysis in which the first half reverse electrolysis is performed at a high current density and the second half reverse electrolysis is performed at a lower current density than the first half. I understood it.
[0052]
Thus, it is thought that the effect improves by performing reverse electrolysis in two stages for the following reason. That is, in the first half (first stage) reverse electrolysis, the peeling action to the outside of the through hole is strong, and the peeling action to the inside of the through hole is weak. In the second half (second stage) reverse electrolysis, the potential for stripping is very weak, so peeling is performed slightly outside the through-hole, but there is almost no peeling action inside, but rather the adsorption of sulfur compounds proceeds. Conceivable.
[0053]
Therefore, in the first stage reverse electrolysis, the sulfur compound outside the through hole is surely peeled off, and in the second stage reverse electrolysis, the peeled outside of the through hole is maintained by the weak peeling action while entering the through hole. Adsorption of sulfur compounds occurs. As a result, compared with the case where reverse electrolysis is performed in one stage, the difference in adsorption concentration of sulfur compounds between the outside and inside of the through hole is increased, and a larger polarization resistance difference is generated.
[0054]
Further, in the reverse electrolysis of only one stage, the inside of the through hole is excessively peeled depending on the shape of the through hole, and there may be a case where a sufficient polarization resistance difference between the outside and the inside of the through hole cannot be obtained. Even in such a case, the polarization resistance difference can be obtained with certainty by performing the weak reverse electrolysis in the second stage.
[0055]
The current density at the time of positive electrolysis is about 1.5 A / dm 2 (this is not particularly limited. It may be determined in view of the plating property), and the electrolysis time is about 50 to 200 seconds.
[0056]
【Example】
The copper sulfate plating solution having the following composition was commonly used.
[0057]
Copper sulfate pentahydrate 150g / l
Sulfuric acid 200g / l
Polyethylene glycol 4000 3g / l
SPS 1mg / l
Chlorine ion 35mg / l
SPS refers to bis- (3-sulfopropyl) -disulfide disodium.
[0058]
[Example 1]
PPR plating was performed on a 0.8 mm thick wiring board having a through hole with an opening diameter of 0.1 mm under the following conditions.
[0059]
Positive electrolysis: current density 1.5 A / dm 2 , electrolysis time 120 seconds Reverse electrolysis: current density 0.5 A / dm 2 , electrolysis time 10 seconds Plating time 76 minutes As a result, film thickness ratio: (film at the center of the through hole Thickness / film thickness of substrate surface) × 100 was 91.3%.
[0060]
[Example 2]
PPR plating was performed on a wiring board having a through hole with an opening diameter of 0.15 mm and a thickness of 0.8 mm under the following conditions.
[0061]
Positive electrolysis: current density 1.5 A / dm 2 , electrolysis time 120 seconds Reverse electrolysis: current density 0.5 A / dm 2 , electrolysis time 10 seconds Plating time 76 minutes As a result, the film thickness ratio was 101.4%. .
[0062]
Example 3
PPR plating was performed on a wiring board having a through hole with an opening diameter of 0.1 mm and a thickness of 0.8 mm under the following conditions.
[0063]
Positive electrolysis: current density 1.5 A / dm 2 , electrolysis time 120 seconds Reverse electrolysis 1: current density 0.5 A / dm 2 , electrolysis time 5 seconds Reverse electrolysis 2: current density 0.1 A / dm 2 , electrolysis time 5 seconds Plating time 76 minutes As a result, the film thickness ratio was 109.8%.
[0064]
Example 4
PPR plating was performed on a wiring board having a through hole with an opening diameter of 0.15 mm and a thickness of 0.8 mm under the following conditions.
[0065]
Positive electrolysis: current density 1.5 A / dm 2 , electrolysis time 120 seconds Reverse electrolysis 1: current density 0.5 A / dm 2 , electrolysis time 5 seconds Reverse electrolysis 2: current density 0.1 A / dm 2 , electrolysis time 5 seconds Plating time 76 minutes As a result, the film thickness ratio was 110.8%.
[0066]
[Comparative Example 1]
Using the copper sulfate plating solution, direct current plating was performed on a wiring board having a thickness of 0.8 mm and having a through hole having an opening diameter of 0.1 mm under the following conditions.
[0067]
Current density 1.35 A / dm 2 ,
Plating time 76 minutes As a result, the film thickness ratio was 53.9%.
[0068]
[Comparative Example 2]
Using the copper sulfate plating solution, direct current plating was performed on a 0.8 mm thick wiring board having a through hole with an opening diameter of 0.15 mm under the following conditions.
[0069]
Current density 1.35 A / dm 2 ,
Plating time 76 minutes As a result, the film thickness ratio was 54.8%.
[0070]
5 to 10 are cross-sectional photographs of the through hole (magnification 75 times), FIGS. 5, 6, 7, and 8 are the through holes of Examples 1, 2, 3, and 4, respectively, and FIGS. The through hole of Examples 1 and 2 is shown.
[0071]
As described above, in Examples 1 to 4, the film thickness ratio (throwing power) is almost 100%, and a copper plating film having a uniform thickness can be formed on the surface and in the small-diameter hole.
[0072]
In particular, when reverse electrolysis was performed in two stages, the plating thickness inside the small-diameter hole was thicker than the plating thickness on the surface. In this case, if the plating time is extended, the inside of the small-diameter hole can be filled by plating.
[0073]
In the above embodiment, the plating of the through hole has been described as an example. However, the plating in the micro blind via can be performed in the same manner.
[0074]
[Industrial applicability]
As described above, according to the method of the present invention, a long period PPR plating method in seconds can be achieved, and a high-accuracy and large-capacity pulse current is not required, so that the equipment cost can be reduced.
[0075]
In addition, the currents for plating the front and back of the substrate can be easily synchronized, and wiring considering loss due to inductance is also unnecessary.
[0076]
Furthermore, it is possible to form a plating film in which the surface, the opening, and the film thickness inside the small-diameter hole are almost uniform.
[Brief description of the drawings]
FIG. 1 is a graph showing the relationship between sulfuric acid concentration and plating solution resistance.
FIG. 2 is a graph showing the relationship between sulfuric acid concentration and saturated copper sulfate concentration.
FIG. 3 is a graph showing the relationship between the reverse electrolysis potential and the magnitude of polarization resistance during positive electrolysis.
FIG. 4 is a schematic diagram showing a current waveform in an embodiment of the present invention.
FIG. 5 is a cross-sectional photograph of a through hole of Example 1.
FIG. 6 is a cross-sectional photograph of a through hole of Example 2.
7 is a cross-sectional photograph of a through hole of Example 3. FIG.
FIG. 8 is a cross-sectional photograph of a through hole of Example 4.
FIG. 9 is a cross-sectional photograph of the through hole of Comparative Example 1.
10 is a cross-sectional photograph of a through hole of Comparative Example 2. FIG.

Claims (5)

硫酸銅、硫酸、塩素イオン、硫黄化合物、界面活性剤を含む硫酸銅めっき液により、周期的に正電解と逆電解を加え、被めっき物のホール内に銅めっきを施す銅めっき方法において、
前記逆電解を0.1〜1A/dm2 の電流密度範囲であって且つ、前半と後半とで電流密度の異なる2段階で行ない、後半の電流密度を前半の電流密度より低くすることを特徴とするホールの銅めっき方法。
Copper sulfate, sulfuric acid, chloride ions, sulfur compounds, copper sulfate plating solution containing a surface active agent, periodically positive electrolyte and reverse electrolysis addition, the copper plating method of applying a copper plating in the halls of the object to be plated ,
A the reverse electrolysis current density range of 0.1~1A / dm 2, and performs the first half and two stages with different current densities in the second half, to the second half of the current density lower than the current density in the first half copper plating method wherein the sulfo Lumpur.
正電解を50〜200秒間行い、逆電解を1〜10秒間行なうことを特徴とする請求項1記のホールの銅めっき方法。Positive electrolysis was carried out 50 to 200 seconds, the copper plating method of claim 1 Symbol placement of halls, characterized in that Nau a reverse electrolysis rows 1-10 seconds. 正電解を1〜2A/dm2 の電流密度範囲で行うことを特徴とする請求項1または2記載のホールの銅めっき方法。Claim 1 or 2 halls method of the copper plating, wherein the performing positive electrolysis at a current density range of 1-2A / dm 2. 硫酸濃度を150〜250g/l、硫酸銅濃度を130〜200g/lとした、低電気抵抗、高銅濃度の硫酸銅めっき液を用いることを特徴とする請求項1,2または3記載のホールの銅めっき方法。The sulfuric acid concentration 150 to 250 g / l, copper sulfate concentration of 130~200g / l, low electrical resistance, e of claim 1, 2 or 3, wherein the copper sulfate plating solution of high copper concentration Copper plating method. ール内を銅めっきで埋めることを特徴とする請求項1〜のうちのいずれか1項記載のホールの銅めっき方法。Any one halls method of the copper plating according to one of claims 1-4, characterized in that fill the halls with copper plating.
JP2003536491A 2001-10-16 2002-10-09 Hole copper plating method Expired - Fee Related JP4148895B2 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2001317878 2001-10-16
JP2001317878 2001-10-16
PCT/JP2002/010483 WO2003033775A1 (en) 2001-10-16 2002-10-09 Method of copper-plating small-diameter holes

Publications (2)

Publication Number Publication Date
JPWO2003033775A1 JPWO2003033775A1 (en) 2005-02-03
JP4148895B2 true JP4148895B2 (en) 2008-09-10

Family

ID=19135677

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003536491A Expired - Fee Related JP4148895B2 (en) 2001-10-16 2002-10-09 Hole copper plating method

Country Status (6)

Country Link
US (1) US20040011654A1 (en)
JP (1) JP4148895B2 (en)
KR (1) KR20040045390A (en)
CN (1) CN1283848C (en)
TW (1) TW561808B (en)
WO (1) WO2003033775A1 (en)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040074775A1 (en) * 2002-10-21 2004-04-22 Herdman Roderick Dennis Pulse reverse electrolysis of acidic copper electroplating solutions
DE102004045451B4 (en) * 2004-09-20 2007-05-03 Atotech Deutschland Gmbh Galvanic process for filling through-holes with metals, in particular printed circuit boards with copper
SE0403047D0 (en) * 2004-12-14 2004-12-14 Polymer Kompositer I Goeteborg Pulse-plating method and apparatus
KR100632552B1 (en) * 2004-12-30 2006-10-11 삼성전기주식회사 Fill plating structure of inner via hole and manufacturing method thereof
US20060226014A1 (en) * 2005-04-11 2006-10-12 Taiwan Semiconductor Manufacturing Co., Ltd. Method and process for improved uniformity of electrochemical plating films produced in semiconductor device processing
JP4764718B2 (en) 2005-12-28 2011-09-07 新光電気工業株式会社 Through-hole filling method
JP5246103B2 (en) 2008-10-16 2013-07-24 大日本印刷株式会社 Method for manufacturing through electrode substrate
JP5428280B2 (en) * 2008-10-16 2014-02-26 大日本印刷株式会社 Through electrode substrate and semiconductor device using the through electrode substrate
JP6161863B2 (en) * 2010-12-28 2017-07-12 株式会社荏原製作所 Electroplating method
KR101817823B1 (en) * 2011-01-26 2018-02-21 맥더미드 엔쏜 인코포레이티드 Process for filling vias in the microelectronics
CN102443828B (en) * 2011-09-23 2014-11-19 上海华力微电子有限公司 Method for electro-coppering in through hole of semiconductor silicon chip
TWI454422B (en) * 2012-04-12 2014-10-01 Nat Univ Tsing Hua A method for manufacturing a copper nano-wire with high density of twins
CN104109886A (en) * 2013-04-22 2014-10-22 广东致卓精密金属科技有限公司 Microvia-superfilling copper plating technology
US10154598B2 (en) 2014-10-13 2018-12-11 Rohm And Haas Electronic Materials Llc Filling through-holes
JP2017199854A (en) 2016-04-28 2017-11-02 Tdk株式会社 Through wiring board
JP7087760B2 (en) * 2018-07-18 2022-06-21 住友金属鉱山株式会社 Copper-clad laminate

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4517059A (en) * 1981-07-31 1985-05-14 The Boeing Company Automated alternating polarity direct current pulse electrolytic processing of metals
JPH0356696A (en) * 1989-07-24 1991-03-12 Canon Inc Wet electroplating device
JPH07336017A (en) * 1994-06-08 1995-12-22 Hitachi Ltd Manufacture of thin-film circuit by periodic reverse electrolyzing method and thin-film circuit board, thin-film multilayer circuit board and electronic circuit device using the same
US5486280A (en) * 1994-10-20 1996-01-23 Martin Marietta Energy Systems, Inc. Process for applying control variables having fractal structures
DE19545231A1 (en) * 1995-11-21 1997-05-22 Atotech Deutschland Gmbh Process for the electrolytic deposition of metal layers
JPH1143797A (en) * 1997-07-25 1999-02-16 Hideo Honma Method for via-filling
US6071398A (en) * 1997-10-06 2000-06-06 Learonal, Inc. Programmed pulse electroplating process
EP0991795B1 (en) * 1998-04-21 2006-02-22 Applied Materials, Inc. Electro-chemical deposition system and method of electroplating on substrates
JP4132273B2 (en) * 1998-08-25 2008-08-13 日本リーロナール有限会社 Method for manufacturing build-up printed wiring board having filled blind via holes
MY144573A (en) * 1998-09-14 2011-10-14 Ibiden Co Ltd Printed circuit board and method for its production
JP3594894B2 (en) * 2000-02-01 2004-12-02 新光電気工業株式会社 Via filling plating method
JP4339980B2 (en) * 2000-03-14 2009-10-07 沖プリンテッドサーキット株式会社 Electrolytic plating equipment

Also Published As

Publication number Publication date
WO2003033775A1 (en) 2003-04-24
JPWO2003033775A1 (en) 2005-02-03
US20040011654A1 (en) 2004-01-22
TW561808B (en) 2003-11-11
CN1476492A (en) 2004-02-18
CN1283848C (en) 2006-11-08
KR20040045390A (en) 2004-06-01

Similar Documents

Publication Publication Date Title
JP4148895B2 (en) Hole copper plating method
TWI268966B (en) Electrolytic copper plating method
KR101653438B1 (en) Method for electroplating through-hole and electroplating device
JP4248353B2 (en) Through-hole filling method
JP2009532586A (en) Electrolytic copper plating method
JP2008513985A5 (en)
US20050121314A1 (en) Electrolytic plating method and device for a wiring board
JP2002527621A (en) Electrodeposition of metals in small recesses using modulated electric fields
JP2009228124A (en) Method of filling through-hole
WO1989007162A1 (en) Electrochemical processes
KR20180110102A (en) Soluble copper anode, electrolytic copper plating apparatus, electrolytic copper plating method, and preservation method of acid electrolytic copper plating solution
JP2004176171A (en) Non-cyanogen type electrolytic solution for plating gold
KR20040057979A (en) Method for depositing lead-free tin alloy
JPWO2006018872A1 (en) Additive for copper plating and method for producing electronic circuit board using the same
JP2014030055A (en) Method for manufacturing buildup laminated substrate
TWI683931B (en) Anode for electrolytic copper plating and electrolytic copper plating device using the same
WO2003078698A1 (en) Electrolytic copper plating method, phosphorus-containing anode for electrolytic copper plating, and semiconductor wafer plated using them and having few particles adhering to it
US7918983B2 (en) Substrate plating method and apparatus
JPS644091A (en) Plating
JP3641372B2 (en) Electrolytic plating method and electrolytic plating apparatus
JP2010189733A (en) Additive for pr pulse electrolytic copper plating, and copper plating liquid for periodic reverse pulse electrolytic plating
JP2008144232A (en) Method for roughening surface of copper foil
JP2008184681A (en) Method of monitoring electrolytic copper plating solution of wiring board or semiconductor circuit
JP2014221946A (en) Additive for pr pulse electrolytic copper plating and copper plating solution for pr pulse electrolytic plating
JP2006265735A (en) Electroplating method of substrate having fine via hole

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20050905

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20050905

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20080318

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080428

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20080527

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20080624

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110704

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120704

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120704

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130704

Year of fee payment: 5

LAPS Cancellation because of no payment of annual fees